Notice of Pre-AIA or AIA Status
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Information Disclosure Statement
Acknowledgment is made of the information disclosure statements filed on December 30, 2024. U.S. patents and patent application publications, foreign patents and patent application publications, and non-patent literature documents have been considered.
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Specification
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Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-9 and 13-18 are rejected under 35 U.S.C. 103 as being unpatentable over Onufryk et al. (U.S. patent 8,554,968 hereinafter referred to as Onufryk, in view of Amad et al. (U.S. patent patent 9,336,165 hereinafter referred to Admad.
As for claims 1, 12 Onufryk teaches “a host device configured to generate a command, and including a completion queue in which completion commands for which operations have been completed are stored”. See Onufryk discloses host/controller with submission and completion queues and host-side handling of completions (¶[31]–[36], ¶[63]–[65], ¶[72]–[83]).
Onufryk teaches “a memory controller configured to receive the command and generate a control signal corresponding to the command”, See Onufryk controller receives commands and issues control/signals to memory/storage to execute operations (¶[31]–[36], ¶[72]–[83]),
Onufryk teaches “and a memory device configured to perform an operation corresponding to the command in response to the control signal”. See Onyfryk device performs operations in response to controller signaling (¶[31]–[36], ¶[72]–[83]).
Onufryk teaches wherein the memory controller comprises: a controller/firmware configured to generate a completion signal indicating completion of the operation corresponding to the command and control the host device to store the command in the completion queue based on the completion signal. Onyfryk teaches controller/firmware generating completion indications and coordinating host completion queue posting/updates accessible to host (¶[63]–[65], ¶[84]–[96]).
Onufryk does not teach the particular combination of completion signaling and “generate completion signal and control host to store the command”. However, Admad describes completion indications and host/VM handling of completions following signaling (¶[15]–[17]). It is essential for “host writes entry” expressly required, this is a known alternative implementation; adapting Onufryk to have the host perform the posting upon completion signaling would have been an obvious to avoid delay transactions from waiting of the R/W processing without knowing when the transaction is completed in view of Admad’s host/VM-managed completion handling (¶[15]–[17]).
Onufryk uses queue counters/thresholds for interrupt generation (¶[103]–[114]); recognizes queue occupancy. Further, Onufryk teaches generate interrupts based on static thresholds/counters (¶[103]–[114]). Furthermore, Onufryk teaches issue interrupts to host to trigger completion handling based on threshold queue conditions; transmits interrupts to host (¶[63]–[65], ¶[103]–[114]).
Onufryk does not expressly teach 1) “of completion commands stored in the completion queue during a preset time interval,”, 2) “dynamic reference value”, and 3) “completion count exceeds the dynamic reference value, and transmit the interrupt signal to the host device,”. Admad teaches 1) measuring counts/rates over time (IOPS) and using such measurements in coalescing/interrupt logic; counting completed I/Os and throughput over time windows (¶[19]–[26], Table 1, Pseudocode 1–2). Further, Admad teaches 2) dynamic coalescing/threshold parameterization based on IOPS (throughput) and commands-in-flight (CIF)/counts; adjusts level R from throughput and outstanding/processed counts (¶[19]–[26], Table 1). Substituting completion count (over interval) for CIF is a routine choice; both are queue/completion pressure metrics. Furthermore, Admad teaches 3) generates/suppresses interrupts based on dynamically computed coalescing/threshold conditions derived from throughput and counts; transmits signaling to host/VM (¶[23]–[26], ¶[45]–[48], Table 1, Pseudocode 1–2). Before the effective filling date of the claimed invention. It would have been obvious to one of ordinary skilled in the art to incorporate Admad’s dynamic, throughput- and count-based interrupt moderation into Onufryk’s queue/interrupt framework to reduce interrupt overhead and optimize throughput/latency tradeoffs in a host/controller memory system. The references address the same problem space (I/O completion interrupt handling) and their teachings are complementary. Implementing Admad’s time-window counts and dynamic reference computation in Onufryk’s interrupt generator would have been a routine firmware/software modification with a reasonable expectation of success.
Onufryk teaches “and wherein the host device performs the completion operation on the completion commands stored in the completion queue in response to the interrupt signal.” Onufryk teaches host handles completions in response to interrupts and processes completion queue entries (¶[63]–[65], ¶[84]–[96]).
As for claims 2, 13 Onufryk teaches “the memory device is configured to transfer, to the memory controller, a result of performing the operation corresponding to the command,”. Onufryk teaches Device completes I/O and returns status/result information to the controller/host stack (¶[31]–[36], ¶[72]–[83]).
Onufryk teaches “and the memory controller is configured to transfer, to the host device, the completion signal in response to a case where the result of performing the operation indicates completion of the operation.” Onufryk teaches a controller provides completion indications/notifications to host upon operation completion (¶[63]–[65], ¶[84]–[96]).
As for claims 3, 14 Onufryk does not expressly state that the host, rather than the controller/device, writes the completion entry into the host-resident completion queue. However, Admad teaches VM/host-managed completion handling after signaling, including updating queue structures, is taught; having the host post/update the completion entry is a known alternative implementation (¶[15]–[17]). Obvious to implement host-side posting in such architectures.
As for claims 4, 15 Onufryk does not expressly use “terminate processes,” but completion handling necessarily includes completing/terminating the associated I/O processing. However, Admad teaches Host/VM consumes completion entries and completes the associated tasks; terminating the corresponding process/thread is obvious in completion handling (¶[45]–[48]).
As for claims 5, 16 Onufryk does not expressly state that the host “delete[s]” completion commands from the queue; removal after processing is implicit. However, Admad teaches Host/VM completion handling consumes entries; removing/deleting entries after processing is a routine queue operation and an obvious implementation detail (¶[45]–[48]).
As for claims 6, 17 Onufryk does not expressly define “completion count” as “tail − head” nor define head/tail in these exact terms. However, Admad teaches Counting entries via tail–head difference is a standard queue technique; Admad relies on counts/occupancy to drive coalescing/interrupt logic, making tail–head computation an obvious implementation choice (¶[19]–[26], Table 1).
As for claim 7 Onufryk does not expressly disclose multiple sampling and selecting an average or maximum of completion count to set a dynamic reference value. However, Admad teaches sampling/monitoring counts/rates over time to set/adjust coalescing levels; choosing average or maximum of samples is a routine statistical choice to stabilize a dynamic threshold (¶[19]–[26], Table 1, Pseudocode 1–2).
As for claim 8 Onufryk does not expressly disclose evaluating preset candidates and choosing the one that maximizes throughput. However, Admad teaches tuning the interrupt/coalescing level based on measured throughput/IOPS; selecting the candidate with maximum throughput is an obvious tuning approach consistent with Admad’s performance-driven adjustment (¶[23]–[26], Table 1).
As for claims 9, 18 Onufryk does not expressly disclose iterative fitting of a coefficient/constant relating reference to completion count to maximize throughput. However, Admad teaches iterative tuning of coalescing parameters based on throughput/IOPS feedback; using iterative attempts to fit a simple linear/formulaic relationship is an obvious implementation of Admad’s adaptive tuning (¶[19]–[26], Table 1, Pseudocode 1–2).
Claims 10 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Onufryk in view of Amad and further in view of Kommineni et al. US 20150261657 referred hereon Kommineni.
As for claims 10, 19 Onufryk does not disclose using a genetic algorithm (GA) to calculate coefficients/constants for a variable used in determining a dynamic reference. Admad teaches iterative, performance-driven tuning of interrupt/coalescing parameters (throughput/IOPS feedback, sampling/counting) and the use of iterative algorithms to find parameter values that improve throughput (¶[19]–[26], Table 1, Pseudocode). Kommineni expressly teaches using a genetic algorithm—specifically multi-objective GA techniques (NSGA-II)—to determine optimal parameter subsets via evolutionary operators and multi-objective ranking (Abstract; ¶[0027], ¶[0033]–[0036]). Thus, Admad supplies the objective and need for iterative parameter tuning; Kommineni supplies the concrete GA technique that can be applied to calculate coefficients/constants. Kommineni explicitly teaches Non-domination Sorting Genetic Algorithm (NSGA-II) and the associated operators: non-dominated (Pareto) ranking and crowding-distance based population shrinking/selection, including crossover and mutation steps to evolve populations toward multi-objective optima (¶[0027], ¶[0033]–[0036], ¶[0052]–[0056], ¶[0063]). Admad provides the tuning goal and measurable performance metrics (throughput, counts) that serve as the GA objectives; Kommineni provides the known algorithmic mechanism (non-dominated ranking and crowding distance) to determine optimal coefficient/constant values. Combining Admad’s parameter-optimization goal with Kommineni’s NSGA-II algorithm supplies the claimed limitation. Onufryk supplies the completion/interrupt framework and where interrupt/coalescing parameters would be applied. Admad teaches adaptively tuning those parameters based on measured throughput and counts (i.e., iteratively searching parameter space to improve throughput). Kommineni teaches a well-known multi-objective genetic algorithm (NSGA-II) that uses non-dominated sorting and crowding-distance selection to identify Pareto-effective parameter sets in problems with multiple objectives and no closed-form solution. A person of ordinary skill, seeking to implement Admad’s iterative parameter-tuning objective within Onufryk’s interrupt framework, would have been led to apply Kommineni’s NSGA-II procedures because NSGA-II is a standard, established method for searching large parameter spaces and balancing multiple performance objectives when analytical tuning is impractical. Applying Kommineni’s GA to Admad’s performance metrics in Onufryk’s system would have been a predictable and reasonable means to obtain coefficients/constants that improve throughput.
Claims 11 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Onufryk in view of Amad and further in view of US 20230376664 Yazdanbakhsh et al. referred hereon Yazdanbakhsh.
As for claims 11, 20 Onufryk does not disclose 1) calculating coefficients/constants using Bayesian optimization or any surrogate-model/probabilistic optimizer. 2) Onufryk lacks any teaching of GP surrogates, acquisition functions, or probabilistic model selection for tuning coefficients/constants to increase throughput. However, Yazdanbakhsh explicitly discloses parameter-search policies that include 1) Bayesian optimization (e.g., “the hardware design policy may comprise a Bayesian optimization policy”) and describes generating candidate configurations, evaluating them, and updating the policy based on measured performance (Yazdanbakhsh ¶[0090]–¶[0096], ¶[0092]). Applying a Bayesian optimization policy (as taught by Yazdanbakhsh). Yazdanbakhsh teaches a framework for candidate generation, pre-evaluation, and performance-driven selection, and expressly identifies 2) Bayesian optimization as one selectable policy (Yazdanbakhsh ¶[0090]–¶[0096], ¶[0092]).
Onufryk provides the interrupt/coalescing environment and identifies coefficients/constants used by the interrupt generator. Admad establishes the iterative, performance-based tuning goal (adjust parameters based on observed throughput/count metrics). Yazdanbakhsh sets forth concrete optimization policies (including Bayesian optimization), describes generating candidate parameter sets, evaluating selected candidates, and updating the policy based on performance measurements, and explains pre-evaluation to reduce costly evaluations (Yazdanbakhsh ¶[0090]–¶[0096], ¶[0108]–¶[0113]). A person of ordinary skill, seeking to implement Admad’s iterative throughput-improvement teaching within Onufryk’s interrupt framework, would have been led to apply Yazdanbakhsh’s taught Bayesian-optimization policy (Gaussian-process surrogate + acquisition function) to efficiently identify coefficient and constant values expected to increase throughput. Applying Yazdanbakhsh’s Bayesian optimization policy to Admad’s feedback metrics in Onufryk’s system is a predictable and standard use of known optimization technology to solve the claimed parameter-tuning problem.
Pertinent Prior art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US patent 8554968 Benisty et al. – Describes host–controller storage architectures that use completion queues or buffers to record completed I/O operations and rely on signaling (interrupts, doorbells) to notify host software of completions.
Discusses basic interrupt-reduction techniques such as coalescing/batching based on queue occupancy or simple count thresholds.
Covers standard queue bookkeeping (head/tail indices) and host-side consumption of completion entries.
Overall, Benisty supplies general, well-known elements (queues, basic coalescing) but lacks the specific adaptive/time-based/throughput-driven features that make Onufryk comparatively stronger for the claimed subject matter.
US 20210096770 Yamaguchi et al.- Describes controller/host notification techniques and optimizations for moderating completion notifications to improve processing efficiency and latency/throughput tradeoffs.
May present heuristics or firmware/driver-level strategies for delaying or batching notifications under certain load conditions and provides efficient queue-management practices.
Yamaguchi typically lacks the specific teaching of computing a dynamic reference value based on both completion count and measured data throughput and using time-window sampling as recited in claims.
Benisty and Yamaguchi are cited only to provide background on conventional completion queues and interrupt moderation in host–controller I/O systems. In contrast, Onufryk discloses a completion-queue/interrupt framework that closely aligns with the claimed architecture and behaviors. Neither Benisty nor Yamaguchi teaches setting or adapting a dynamic reference value based on both measured host data throughput and time-windowed completion counts, nor do they disclose the adaptive tuning approaches recited in the claims (e.g., selecting among preset candidates or optimizing coefficients/constants via iterative algorithms). Accordingly, they are less probative of the specific limitations at issue and are relied upon merely to corroborate well-known queueing and notification practices consistent with Onufryk’s teachings.
Conclusion
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