Prosecution Insights
Last updated: April 19, 2026
Application No. 19/004,707

ENCODER, DECODER, AND MEDIUM

Non-Final OA §112§DP
Filed
Dec 30, 2024
Examiner
JIANG, ZAIHAN
Art Unit
2488
Tech Center
2400 — Computer Networks
Assignee
Panasonic Intellectual Property Corporation of America
OA Round
1 (Non-Final)
83%
Grant Probability
Favorable
1-2
OA Rounds
2y 6m
To Grant
99%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allow Rate
520 granted / 626 resolved
+25.1% vs TC avg
Strong +25% interview lift
Without
With
+25.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
32 currently pending
Career history
658
Total Applications
across all art units

Statute-Specific Performance

§101
5.1%
-34.9% vs TC avg
§103
49.5%
+9.5% vs TC avg
§102
13.2%
-26.8% vs TC avg
§112
21.0%
-19.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 626 resolved cases

Office Action

§112 §DP
DETAILED ACTION 1. The Office Action is in response to Application 19004707 filed on 12/30/2024. Claim 1 is pending. Notice of Pre-AIA or AIA Status 2. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement 3. The information disclosure statements (IDS) submitted on 12/30/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner. Double Patenting 4. The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory obviousness-type double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the conflicting application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. Effective January 1, 1994, a registered attorney or agent of record may sign a terminal disclaimer. A terminal disclaimer signed by the assignee must fully comply with 37 CFR 3.73(b). 5. Claim 1 is rejected on the ground of non-statutory obviousness-type double patenting as being unpatentable over claim 1 of US Patent US 12225220 and in view of SHARMAN et al. (CN 109155852) indicated below. For Claim 2-4, 6, 8, although the conflicting claims are not identical, they both are dealing with method for image encoder. As clearly indicated in the table below, each claimed limitations of claim 1 of the current application are anticipated by the corresponding limitations of claim 1, 4, 6, 10 of the reference patent expect for generates a bitstream including coded data indicating the position and the shape of the region of each of the plurality of subpictures. . Current Application US 12225220 Claim 1: An encoder comprising: circuitry; and memory coupled to the circuitry, wherein, in operation, the circuitry: encodes a position and a shape of a region of each of a plurality of subpictures included in a picture, the plurality of subpictures being determined according to a constraint condition that: (i) one of a plurality of tiles included in a picture is not allowed to be partially included in one of the plurality of subpictures included in the picture; (ii) one of the plurality of subpictures is not allowed to be partially included in the one of the plurality of tiles; (iii) two or more of the plurality of subpictures are allowed to be included in the one of the plurality of tiles; and (iv) two or more of the plurality of tiles are allowed to be included in the one of the plurality of subpictures; and generates a bitstream including coded data indicating the position and the shape of the region of each of the plurality of subpictures. Claim 1 An encoder comprising: circuitry; and memory coupled to the circuitry, wherein, in operation, the circuitry: encodes a position and a shape of a region of each of a plurality of subpictures included in a picture, the plurality of subpictures being determined according to a constraint condition that: (i) one of a plurality of tiles included in a picture is not allowed to be partially included in one of the plurality of subpictures included in the picture; (ii) one of the plurality of subpictures is not allowed to be partially included in the one of the plurality of tiles; (iii) two or more of the plurality of subpictures are allowed to be included in the one of the plurality of tiles; and (iv) two or more of the plurality of tiles are allowed to be included in the one of the plurality of subpictures. It is noticed that claim 1 of US Patent US 12225220 does not disclose explicitly of generates a bitstream including coded data indicating the position and the shape of the region of each of the plurality of subpictures. SHARMAN discloses of generates a bitstream including coded data indicating the position and the shape of the region of each of the plurality of subpictures (page 24… encoding the image as a plurality of image regions, the image encoder selecting at least one of the size and shape of each image region…. area shape and area position in the image, wherein the image encoder is configured to encode the data identifying the prediction direction of each sample or area selected for the image; which is bitstream including coded data indicating the position and the shape of the region of each of the plurality of subpictures ). It would have been obvious before the effective filing date of the claimed invention to one of ordinary skill in the art to incorporate the technology that generates a bitstream including coded data indicating the position and the shape of the region of each of the plurality of subpictures as a modification to the claim 1 of US Patent US 12225220 for the benefit of that encode each region (subpicture) of the image efficiently (page 24). Claim Rejections - 35 USC § 112 7. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. 8. Claim 1 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. For claim 1, it recites limitations of “encodes a position and a shape of a region of each of a plurality of subpictures included in a picture”; However, it is not clear which position (the region can have many pixels and can be divided further, therefore, there are many possibilities of “a position” within a region) and which shape (the region can been divided further, therefore, there can be many possibilities of a shape) is encoded? And it is not clear if the region in “a region of each of a plurality of subpictures included in a picture” indicates the subpicture itself or any area within the subpicture? it recites limitations of “the plurality of subpictures being determined according to a constraint condition that: (i) one of a plurality of tiles included in a picture is not allowed to be partially included in one of the plurality of subpictures included in the picture; (ii) one of the plurality of subpictures is not allowed to be partially included in the one of the plurality of tiles; (iii) two or more of the plurality of subpictures are allowed to be included in the one of the plurality of tiles; and (iv) two or more of the plurality of tiles are allowed to be included in the one of the plurality of subpictures”; However, it is not clear of the constraint condition, for example: “(i) one of a plurality of tiles included in a picture is not allowed to be partially included in one of the plurality of subpictures included in the picture”, it is satisfied when one tile is not allowed to be partially included in one of the plurality of subpictures, it is also satisfied that other tiles are allowed to be partially included in one of the plurality of subpictures, as far as one tile is not allowed to be partially included in one subpicture. Is that what the limitation means? Or it really means “any one of a plurality of tiles included in a picture is not allowed to be partially included in any one of the plurality of subpictures included in the picture”? “(ii) one of the plurality of subpictures is not allowed to be partially included in the one of the plurality of tiles;” it is satisfied when one subpicture is not allowed to be partially included in one of the plurality of titles, it is also satisfied that other subpictures are allowed to be partially included in one of the plurality of tiles, as far as one subpicture is not allowed to be partially included in one subpicture. Is that what the limitation means? Or it really means “any one of a plurality of subpictures is not allowed to be partially included in any one of the plurality of tiles”? “(iii) two or more of the plurality of subpictures are allowed to be included in the one of the plurality of tiles;” it is satisfied when two subpicture are allowed to be included in one of the plurality of titles, it is also satisfied that other subpictures are not allowed or allowed to be included in one of the plurality of tiles, as far as two subpicture are allowed to be included in one tile. Is that what the limitation means? “(iv) two or more of the plurality of tiles are allowed to be included in the one of the plurality of subpictures” it is satisfied when two tiles are allowed to be included in one of the plurality of subpictures, it is also satisfied that other tiles are not allowed or allowed to be included in one of the plurality of subpictures, as far as two tiles are allowed to be included in one subpicture. Is that what the limitation means? Therefore, can the constraint condition be interpreted as: “i) other tiles are allowed to be partially included in one of the plurality of subpictures, as far as one tile is not allowed to be partially included in one subpicture ii) other subpictures are allowed to be partially included in one of the plurality of tiles, as far as one subpicture is not allowed to be partially included in one subpicture iii) other subpictures are not allowed or allowed to be included in one of the plurality of tiles, as far as two subpicture are allowed to be included in one tile; iv) other tiles are not allowed or allowed to be included in one of the plurality of subpictures, as far as two tiles are allowed to be included in one subpicture”? It is not clear what the constraint condition is really about. Thus the scope of the claim is unclear. 9 Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. See form 892. 10. Contact Information Any inquiry concerning this communication or earlier communications from the examiner should be directed to ZAIHAN JIANG whose telephone number is (571)272-1399. The examiner can normally be reached on flexible. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sath Perungavoor can be reached on (571)272-7455. The fax phone number for the organization where this application or proceeding is assigned is 571-270-0655. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ZAIHAN JIANG/Primary Examiner, Art Unit 2488
Read full office action

Prosecution Timeline

Dec 30, 2024
Application Filed
Mar 19, 2026
Non-Final Rejection — §112, §DP (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
83%
Grant Probability
99%
With Interview (+25.1%)
2y 6m
Median Time to Grant
Low
PTA Risk
Based on 626 resolved cases by this examiner. Grant probability derived from career allow rate.

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