Prosecution Insights
Last updated: October 04, 2026
Application No. 19/005,655

CERAMIC ELECTRONIC DEVICE AND MANUFACTURING METHOD OF THE SAME

Non-Final OA §102§103
Filed
Dec 30, 2024
Priority
Sep 26, 2022 — JP 2022-152691 +1 more
Examiner
THOMAS, ERIC W
Art Unit
Tech Center
Assignee
Taiyo Yuden Co., Ltd.
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
6m
Est. Remaining
81%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allowance Rate
1053 granted / 1276 resolved
+22.5% vs TC avg
Minimal -2% lift
Without
With
+-1.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
31 currently pending
Career history
1300
Total Applications
across all art units

Statute-Specific Performance

§101
1.3%
-38.7% vs TC avg
§103
51.1%
+11.1% vs TC avg
§102
30.8%
-9.2% vs TC avg
§112
9.0%
-31.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1276 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1, and 4-10 is/are rejected under 35 U.S.C. 102(a)(1) as anticipated by Kim et al. (US 2019/0304696 A1) or, in the alternative, under 35 U.S.C. 103 as obvious over Matsuda et al. (US 2012/0147518 A1). PNG media_image1.png 392 478 media_image1.png Greyscale PNG media_image2.png 82 180 media_image2.png Greyscale Regarding claim 1, Kim et al. disclose a ceramic electronic device (100) comprising: a multilayer structure in which each of a plurality of dielectric layers (111) and each of a plurality of internal electrode layers (121, 122, 321”, 322”) are alternately stacked, wherein in at least one of the plurality of dielectric layers (311”), an average grain size of dielectric grains is 150 nm or less ([0011], when the thickness of the dielectric 0.14 µm), and a number of the dielectric grains (311”) per one metal grain (322”) of one of the plurality of internal electrode layers adjacent to the at least one of the plurality of dielectric layers is 5 in an extension direction of the one of the plurality of internal electrode layers (fig. 4C). Kim et al. do not specifically disclose the average grain size of dielectric grains is 150 nm or less. Matsuda et al. disclose a multilayer ceramic capacitor, wherein an average grain size of dielectric grains is 150 nm or less [0022]. It would have been obvious to a person of ordinary skill in the dielectric art to form the device of Kim et al. so that the average grain size of dielectric grains is 150 nm or less, since such a modification would form a thin multilayer ceramic capacitor having high reliability and capacitance. Regarding claim 4, Kim et al. disclose a thickness of the at least one of the plurality of dielectric layers is 0.5 µm or less [0011]. Regarding claim 5, Kim et al. disclose a thickness of the at least one of the plurality of dielectric layers is 0.3 µm or less [0011]. Regarding claim 6, Kim et al. disclose a thickness of the one of the plurality of internal electrode layers is 0.6 µm or less [0010]. Regarding claim 7, Kim et al. disclose a thickness of the one of the plurality of internal electrode layers is 0.4 µm or less [0010]. Regarding claim 8, Kim et al. disclose a main component of the dielectric grains is barium titanate [0050]. Regarding claim 9, Kim et al. disclose a main component of the metal grain is nickel [0019]. Regarding claim 10, Kim et al. disclose a manufacturing method of a ceramic electronic device comprising: firing a multilayer structure obtained by stacking a plurality of stack units in which each of a plurality of internal electrode patterns is formed on each of a plurality of dielectric green sheets [0050], so that in at least one of a plurality of dielectric layers formed from the plurality of dielectric green sheets, an average grain size of dielectric grains is 150 nm or less ([0011], when the thickness of the dielectric 0.14 µm), and a number of the dielectric grains (311”) per one metal grain (322”) of one of a plurality of internal electrode layers formed from the plurality of internal electrode patterns adjacent to the at least one of the plurality of dielectric layers is 5 in an extension direction of the one of the internal electrode layers (Fig. 4C). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 2019/0304696 A1) in view of Matsuda et al. (US 2012/0147518 A1). Regarding claim 2, Kim et al. disclose the claimed invention except for the average grain size of the dielectric grains in the at least one of the plurality of dielectric layers is 40 nm or more and 110 nm or less. Matsuda et al. disclose a multilayer ceramic capacitor, wherein an average grain size of dielectric grains is 40 nm to 110 nm less [0022]. It would have been obvious to a person of ordinary skill in the dielectric art to form the device of Kim et al. so that the average grain size of dielectric grains is 40 nm to 110 nm, since such a modification would form a thin multilayer ceramic capacitor having high reliability and capacitance. Claim(s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 2019/0304696 A1) in view of Kasuya et al. (US 2009/0067117 A1). Regarding claim 3, Kim et al. disclose the claimed invention except for an average grain size of metal grains in the one of the plurality of internal electrode layers is 0.6 µm or more and 1.4 µm or less. Kasuya et al. disclose a multilayer ceramic capacitor comprising Ni internal electrodes, wherein an average grain size of metal grains in the one of the plurality of internal electrode layers is 0.6 µm or more and 1.4 µm or less (Table 2) It would have been obvious to a person of ordinary skill in the internal electrode art before the invention was made to form the capacitor of Kim et al. so that an average grain size of metal grains in the one of the plurality of internal electrode layers is 0.6 µm or more and 1.4 µm or less, since such a modification would form an internal electrode having desired continuity and electrostatic capacity. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. CN 113092200A – Fig. 2 – ceramic grains contacting metal grain JP 2002-343669 A – ceramic capacitor having internal electrodes with metal grains JP 2003-077761 A – ceramic capacitor having internal electrodes with metal grains Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC THOMAS whose telephone number is (571)272-1985. The examiner can normally be reached Monday-Friday, 6:00 AM-2:30 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole can be reached at (571)272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ERIC W THOMAS/Primary Examiner, Art Unit 2847 ERIC THOMAS Primary Examiner Art Unit 2847
Read full office action

Prosecution Timeline

Dec 30, 2024
Application Filed
Sep 03, 2026
Non-Final Rejection mailed — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12749625
FILM CAPACITOR AND CAPACITOR MODULE
2y 3m to grant Granted Sep 29, 2026
Patent 12749624
MULTILAYER CERAMIC ELECTRONIC COMPONENT
2y 3m to grant Granted Sep 29, 2026
Patent 12749626
MULTILAYER CERAMIC ELECTRONIC COMPONENT
2y 1m to grant Granted Sep 29, 2026
Patent 12744161
FILM CAPACITOR AND METHOD FOR PRODUCING FILM CAPACITOR
2y 3m to grant Granted Sep 22, 2026
Patent 12731733
MULTILAYER CERAMIC CAPACITOR
2y 7m to grant Granted Sep 08, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
82%
Grant Probability
81%
With Interview (-1.9%)
2y 3m (~6m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1276 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month