DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Response to Arguments
Claim 21 has been cancelled.
Claims 1-20 and 22 are pending.
The objections to claims have been withdrawn in light of the Applicant’s amendments.
The rejections under 35 USC 112(b) have been withdrawn in light of the Applicant’s amendments.
For the fact that the Applicant did not traverse or challenge the Examiner’s assertion of fact(s) by OFFICIAL NOTICE taken for well-known features of claim 7, 11, 18 and 22 in the previous Office action, by specifically pointing out error in the Examiner’s taken OFFICIAL NOTICE, the finding(s) are deemed “applicant admitted prior art”. See MPEP § 2114.03 (C).
Applicant’s arguments in the Remarks filed on 06/11/2026 with respect to the rejection under 35 USC 102 (pages 9-10) have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Although a new ground of rejection has been used to address additional limitations that has been added to claim 1 and claim 12, a response is considered necessary for applicant’s arguments since the reference Venieris will continue to be used to meet several claimed limitations.
In response to the Applicant’s argument (page 9), Venieris does not disclose that the incoming video stream is received via a non-modem interface, Examiner respectfully disagrees.
Venieris discloses an apparatus (i.e., a smart phone, tablet, laptop, computer, etc.) for performing super-resolution on received images (¶ [0140]) including streaming content (¶ [0016] and ¶ [0069]) having processor NPUs and an image downloader (Figure 2) or an interface 110 (Figure 10). The processor NPUs is a modem (¶ [0071], ¶ [0078] and ¶ [0087]). The image downloader or the interface 110 separated from the modem NPUs is a non-modem interface (Figures 2 and 10) and receives or downloads images from a broadcaster or a content streaming service (¶ [0143]). In other words, Venieris discloses the amended limitation of “a signal receiving circuit being configured to receive an incoming video stream via a non-modem interface from an external signal source in response to the mobile chip utilizing the signal receiving circuit other than the modem circuit to receive the incoming video stream”.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 6-7, 10-14, 17-18 and 22 are rejected under 35 U.S.C. 103 as being unpatentable over Venieris et al (US 2023/0274139) in view of Xu et al (CN 114222171 A – an English translation provided herein, in which the cited paragraphs are corresponding to original document).
Regarding claim 1, Venieris discloses an image quality enhancing device for a display, the image quality enhancing device (Figures 2 and 10) comprising:
a mobile chip having a modem circuit and a signal receiving circuit (Figure 2 and ¶ [0078]-[0079] for having a modem NPC and an image receiver in a mobile SoC), the signal receiving circuit being configured to receive an incoming video stream via a non-modem interface from an external signal source in response to the mobile chip utilizing the signal receiving circuit other than the modem circuit to receive the incoming video stream (Venieris discloses an apparatus (i.e., a smart phone, tablet, laptop, computer, etc.) performing super-resolution on received images including streaming content (¶ [0016] and ¶ [0069]) and having processor NPUs and an image downloader (Figure 2) or an interface 110 (Figure 10). The processor NPUs is a modem (¶ [0071], ¶ [0078] and ¶ [0087]). The image downloader or the interface 110 separated from the modem NPUs is a non-modem interface (Figures 2 and 10) and receives or downloads images from a broadcaster or a content streaming service (¶ [0142]-[0143]), meaning that Venieris teaching meets the claimed limitations); and
a video processing circuit configured to perform an image enhancing task on the incoming video stream for generating an enhanced video stream and further to output the enhanced video stream to a display panel to correct display with minimal latency (¶ [0010]-[0016], ¶ [0083]-[0086], ¶ [0106], ¶ [0140]-[0144] and ¶ [0149] for performing super-resolution task on received image content to generate super-resolution image for outputting to a video player with less latency).
Venieris discloses the generated super-resolution images are passed to Playback/Image Buffer and eventually sent to the Video Player or App currently in use (Figure 2 and ¶ [0085]), but is silent about outputting to a display panel of a display device for driving the display panel.
Xu discloses a television interaction system for connecting with a mobile terminal through a private protocol interface (Figures 3 and 8-9), in which the mobile terminal outputs the processed real-time data content to a display panel of the television terminal for driving the display panel to correct display with minimal latency (¶ [0090] and ¶ [0127]-[0142]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Venieris system with the teaching of Xu, so to expand functions of picture application and interaction control of the mobile terminal to a television terminal for a larger and better view in the benefits of enhancing user viewing experiences.
Regarding claim 2, Venieris in view of Xu discloses the image quality enhancing device as discussed in the rejection of claim 1. The combined system further discloses wherein the modem circuit is applied to at least one of 4th generation mobile networks, 5th generation mobile networks and 6th generation mobile networks (taught by Xu; ¶ [0090] and ¶ [0140]).
Regarding claim 3, Venieris in view of Xu discloses the image quality enhancing device as discussed in the rejection of claim 1. The combined system further discloses wherein the image quality enhancing device and a display chip of the display device are mounted on a same circuit board to form a multi-chip system, or the image quality enhancing device and the display chip are packaged together to form a multi-chip package (taught by Venieris; Figure 2; ¶ [0078]-[0079] and ¶ [0112]).
Regarding claim 6, Venieris in view of Xu discloses the image quality enhancing device as discussed in the rejection of claim 1. The combined system further discloses wherein the image quality enhancing device comprises a video performing circuit configured to replace a video performing function of a display chip of the display device, and the image quality enhancing device is installed inside the display device to directly drive the display device to display the enhanced video stream (taught by Venieris; Figure 2; ¶ [0078]-[0079] and ¶ [0140]-[0144]).
Regarding claim 7, Venieris in view of Xu discloses the image quality enhancing device as discussed in the rejection of claim 1. The combined system further discloses wherein the video processing circuit is configured to execute a real-time image detail generation or recovery function on the incoming video stream having a resolution higher than standard definition (SD) and at a frame rate of 24 frames per second (FPS) (taught by Venieris; ¶ [0023]-[0028], ¶ [0069], ¶ [0106] and ¶ [0137]. It is obvious that the super-resolution is higher than standard definition (SD) and at a frame rate of 24 frames per second (FPS) as “applicant admitted prior art”).
Regarding claim 10, Venieris in view of Xu discloses the image quality enhancing device as discussed in the rejection of claim 1. The combined system further discloses wherein the video processing circuit comprises a display processing circuit configured to process the enhanced video stream and output the enhanced video stream (taught by Venieris; Figure 2; ¶ [0010]-[0016], ¶ [0083]-[0085], ¶ [0106] and ¶ [0149]) to the display device (taught by Xu; ¶ [0090] and ¶ [0127]-[0142]).
Regarding claim 11, Venieris in view of Xu discloses the image quality enhancing device as discussed in the rejection of claim 1. The combined system further discloses wherein the display device (Xu’s Figures 3 and 8) having a large size standard is indicated as having a size of 24 inches or more than 24 inches (It is a well-known feature of the television with the large size standard is indicated as the display device of 24 inches or more than 24 inches as “applicant admitted prior art”).
Regarding claim 12, all limitations of claim 12 are analyzed and rejected corresponding to claim 1.
Regarding claims 13-14, 17-18 and 22, all limitations of claims 13-14, 17-18 and 22 are analyzed and rejected corresponding to claims 2-3, 6-7 and 11 respectively.
Claims 4-5 and 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over Venieris et al (US 2023/0274139) in view of Xu et al (CN 114222171 A) as applied to claim 1 above, and further in view of Yuan (CN 113901755 B).
Regarding claim 4, Venieris in view of Xu discloses the image quality enhancing device as discussed in the rejection of claim 1. The combined system further discloses the image quality enhancing device and a display chip of the display device are connected via heterogeneous integration technology and integrate inside a same case of the display device (taught by Venieris; Figure 2; ¶ [0013], ¶ [0070]-[0079] and ¶ [0142]-[0144]), but is silent about to form a chiplet package.
Yuan discloses a multi-layer integrated circuit system in which chips are connected via heterogeneous integration technology, so as to form a chiplet package and integrate inside a same case of the device (¶ [0003]-[0004] and ¶ [0051]-[0052]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Venieris in view of Xu system with the teaching of Yuan, so to provide an alternative way of connecting chips in a circuit board of a device to take advantage of new design technology in order to shorten chip signal transmission distance, improve frequency bandwidth efficiency, reduce power consumption and save space.
Regarding claim 5, Venieris in view of Xu and further in view of Yuan discloses the image quality enhancing device as discussed in the rejection of claim 4. The combined system further discloses wherein the image quality enhancing device and a display chip of the display device are integrated (Venieris’ Figure 2 ) via wafer stacking technology to form a three-dimensional integrated circuit package (Yuan’s Figures 4-5 and 14-16).
Regarding claims 15-16, all limitations of claims 15-16 are analyzed and rejected corresponding to claims 4-5 respectively.
Claims 8-9 and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Venieris et al (US 2023/0274139) in view of Xu et al (CN 114222171 A) as applied to claim 1 above, and further in view of Jen et al (US 2021/0287340).
Regarding claim 8, Venieris in view of Xu discloses the image quality enhancing device as discussed in the rejection of claim 1. The combined system further discloses the video processing circuit comprises an image processing circuit configured to perform various image enhancing tasks for increasing image quality of the enhanced video stream (Venieris’ Figure 9), but is silent about the tasks contain noise reduction, color correction and contrast enhancement on the incoming video stream for increasing image quality of the enhanced video stream.
Jen discloses an image processing unit adapted to perform various image enhancing tasks that contain noise reduction, color correction and contrast enhancement on the incoming video stream for increasing image quality of the enhanced video stream (¶ [0024]-[0030]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Venieris in view of Xu system with the teaching of Jen, so to increase the capability of video enhancement with a more variety of tasks for increase quality of images in the benefits of improving user viewing experience.
Regarding claim 9, Venieris in view of Xu and further in view of Jen discloses the image quality enhancing device as discussed in the rejection of claim 8. The combined system further discloses wherein the image processing circuit is configured to utilize generative artificial intelligence (GAI) to perform a real-time image detail generation or recovery function on the incoming video stream so as to optimize the image enhancing task (taught by Venieris; ¶ [0040]-[0043]; and taught by Jen; ¶ [0005], ¶ [0017] and ¶ [0021]-[0026]).
Regarding claims 19-20, all limitations of claims 19-20 are analyzed and rejected corresponding to claims 8-9 respectively.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to GIGI L DUBASKY whose telephone number is (571)270-5686. The examiner can normally be reached M-F 9:00-5:00.
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/GIGI L DUBASKY/Primary Examiner, Art Unit 2421
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