DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments with respect to claims 1-4 and 6-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Allowable Subject Matter
The indicated allowability of claim 5 is withdrawn in view of applicant not including all limitations of the intervening claims and the newly discovered reference(s) to Kwon (US 2017/0309230) and Choi (US 2022/0199035). Rejections based on the newly cited reference(s) follow.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-4 and 6-20 are rejected under 35 U.S.C. 103 as being unpatentable over Kwon (US 2017/0309230) in view of Sang (US 2022/059030) and Choi (US 2022/0199035).
Regarding claims 1 and 20, Kwon teaches A display panel, comprising: a demultiplexer circuit (Fig. 1 element 140) and a plurality of driving modules (pixel driving circuits of Fig. 2), wherein the demultiplexer circuit comprises at least one select line group (Fig. 3 select lines CL1-CL6 of groups 210,220,230 )and a plurality of switching elements (Fig. 3 transistors TS1-TS6 of group 210 and respective transistors of respective 220 and 230) , the at least one select line group comprising a plurality of select lines (Fig. 3 respective select lines of groups 210, 220, 230), and a plurality of select lines of the at least one select line group being respectively connected to corresponding the plurality of driving modules through the plurality of switching elements (Fig. 3 shows respective transistor of group 210 connected to corresponding pixels RGB, where the group data lines DL1-DL6 are connected to driving module shown in Fig.2) a plurality of light-emitting pixels ([0020]), wherein the plurality of select lines of the at least one select line group are respectively connected to corresponding light-emitting pixels through the plurality of switching elements and the plurality of driving modules(Fig. 3 shows respective transistor of group 210 connected to corresponding pixels RGB, where the group data lines DL1-DL6 are connected to driving module shown in Fig.2): and a first terminal of the switching element is connected to a DDIC data line , and a second terminal of the switching element is connected to a data write terminal of the driving module (Fig. 3 shows one terminal of transistors TS1-TS6 connected to the respective pixels circuit of Fig. 2 while the other terminal is connected to data line of data driver 200). Although Kwon teaches the limitations as discussed above, he fails to teach one frame of image of the display panel comprises a plurality of hold frames; the select line is configured to receive a first pulse in the plurality of hold frames, and during the duration of the first pulse, a switching element connected to the select line conducts to cause the corresponding driving module to receive a bias voltage; and the duration of the first pulse received by the at least one of the select line in the at least one select line group covers a plurality of the hold frames.
However in the field of driving a display device, Sang teaches one frame of image of the display panel comprises a plurality of hold frames (Fig. 6-9 show a plurality of hold frames) ; the select line (any data line that receives Vdata) is configured to receive a first pulse in the plurality of hold frames (Fig. 2A shows driving circuit receiving Vdata at transistor T2, Figs. 6-9 show pulses delivered under RR1 and RR2 [0073]), and during the duration of the first pulse, a switching element connected to the select line conducts to cause the corresponding driving module to receive a bias voltage (Fig. 2A transistor T2 receives Vdata where a bias voltage is delivered during hold frames H1/H2 [0098][0101]; and the duration of the first pulse received by the at least one of the select line in covers a plurality of the hold frames(Fig. 6-9 show a plurality of hold frames).
Therefore it would have been obvious to one of ordinary skill in the art to combine the device as taught by Kwon with the driving method as taught by Sang. This combination would allow a system to improve viewing experiences by decreasing the deviation of coupling between data signal provided through a demultiplexer as taught by Kwon [0005]. Although the combination teaches the limitations as discussed above, they fail to teach the data line is a DDIC data line.
However in the field of processing display data, Choi teaches the method of using a DDIC to process data signals on data lines ([0044][0048][0051][0053][0056]).
Therefore it would have been obvious to one of ordinary skill in the art to combine the device as taught by Kwon with the driving method as taught by Sang and the manufacturing method as taught by Choi. This combination would allow a system to improve viewing experiences by decreasing the deviation of coupling between data signal provided through a demultiplexer as taught by Kwon [0005].
Regarding claim 2, Sang teaches wherein the duration of the first pulse received by all of the select lines covers a plurality of the hold frames(Fig. 6-9 show a plurality of hold frames) and Yamazaki teaches switching to select lines in select line groups(Fig. 7B line groups Vdata connected to sample circuit 38) .
Regarding claim 3, Sang teaches wherein the first pulse comprises a first type of pulse and a second type of pulse; the select line receives at least the first type of pulse in the plurality of hold frames (H1), and the select line receives the second type of pulse in each of the plurality of hold frames (H2); the duration of the first type of pulse covers a plurality of the hold frames; and the duration of the second type of pulse is less than the duration of one of the hold frames (Fig. 6 shows how hold frame H1 covers all the pulse in RR1 and RR2, however H2 only covers the pules of RR2.). Yamazaki teaches wherein the at least one select line group comprises a first type of select line and a second type of select line and sending any pulses on the select lines (Fig. 7B wiring 54 Vdata, it is obvious the data lines can be used to send any number of pulse.).
Regarding claim 4, Sang teaches wherein the first type of select line receives the second type of pulse in the plurality of hold frames(Fig. 6 shows how hold frame H1 covers all the pulse in RR1 and RR2, however H2 only covers the pulse of RR2.), and Yamazaki teaches a first type of select line and a second type of select line and sending any pulses on the select lines (Fig. 7B wiring 54 Vdata, it is obvious the data lines can be used to send any number of pulse.).
Regarding claim 6, Kwon herein the bias voltage comprises a first type of voltage and a second type of voltage, and a voltage value of the first type of voltage is different from a voltage value of the second type of voltage ([0023][0025][0030] teach the voltage applied to the data line for pixels of the same color is the same voltage [0030] teaches voltages applied to data line for pixels of a different color (green to red) are changed) and Sang teaches applying a first type of bias voltage and a second type of bias voltage (OBS1/2, VOBS) .
Regarding claim 7, Kwon teaches wherein the plurality of light-emitting pixels comprise a plurality of first color light-emitting pixels (either of the RGB sub pixels);the second type of select line is connected to the corresponding first color light-emitting pixel through the switching element and the driving module (Figs. 2 shows the driving module/pixel circuit for each RGB colored pixel shown in Fig. 3); and during the duration of the second type of pulse, the switching element connected to the second type of select line conducts to cause the corresponding driving module to receive the first type of voltage([0023][0025][0030] teach the voltage applied to the data line for pixels of the same color is the same voltage [0030] teaches voltages applied to data line for pixels of a different color (green to red to blue) are changed. Therefore it is understood that whichever color pixel is driven then the voltage would be applied to the pixel through the data line for the duration of the driving period).
Regarding claim 8, Kwon teaches wherein the voltage value of the first type of voltage is less than the voltage value of the second type of voltage; and the plurality of first color light-emitting pixels comprise a plurality of blue light-emitting pixels; or the voltage value of the first type of voltage is greater than the voltage value of the second type of voltage; and the plurality of first color light-emitting pixels comprise a plurality of green light-emitting pixels([0023][0025][0030] teach the voltage applied to the data line for pixels of the same color is the same voltage [0030] teaches voltages applied to data line for pixels of a different color (green to red to blue) are changed. Therefore it is understood that whichever color pixel is driven then the voltage would be applied to the pixel through the data line for the duration of the driving period) and Sang teaches applying a first type of bias voltage and a second type of bias voltage (OBS1/2, VOBS).
Regarding claim 9, Kwon teaches wherein the voltage further comprises a third type of voltage (voltages to driver either RGB pixels); and he voltage value of the first type of voltage, the voltage value of the second type of voltage, and a voltage value of the third type of voltage are different from each other([0023][0025][0030] teach the voltage applied to the data line for pixels of the same color is the same voltage [0030] teaches voltages applied to data line for pixels of a different color (green to red to blue) are changed.) and Sang teaches applying a first type of bias voltage and a second type of bias voltage (OBS1/2, VOBS).
Regarding claim 10, Kwon teaches wherein the plurality of light-emitting pixels comprise a plurality of first color light-emitting pixels, a plurality of second color light- emitting pixels, and a plurality of third color light-emitting pixels; during the duration of the second type of pulse, the switching element connected to the second type of select line conducts to cause the driving module corresponding to the first color light-emitting pixel to receive the first type of voltage and the driving module corresponding to the second color light-emitting pixel to receive the second type of voltage; or cause the driving module corresponding to the first color light-emitting pixel to receive the first type of voltage and the driving module corresponding to the third color light-emitting pixel to receive the third type of voltage; or cause the driving module corresponding to the second color light-emitting pixel to receive the second type of voltage and the driving module corresponding to the third color light-emitting pixel to receive the third type of voltage([0023][0025][0030] teach the voltage applied to the data line for pixels of the same color is the same voltage [0030] teaches voltages applied to data line for pixels of a different color (green to red to blue) are changed. Therefore it is understood that whichever color pixel is driven then the voltage would be applied to the pixel through the data line for the duration of the driving period) and Sang teaches applying a first type of bias voltage and a second type of bias voltage (OBS1/2, VOBS).
Regarding claim 11, Kwon teaches wherein the voltage value of the first type of voltage is less than the voltage value of the second type of voltage; the voltage value of the second type of voltage is less than the voltage value of the third type of voltage; the plurality of first color light-emitting pixels comprise a plurality of blue light-emitting pixels; the plurality of second color light-emitting pixels comprise a plurality of red light-emitting pixels; and the plurality of third color light-emitting pixels comprise a plurality of green light- emitting pixels ([0023][0025][0030] teach the voltage applied to the data line for pixels of the same color is the same voltage [0030] teaches voltages applied to data line for pixels of a different color (green to red to blue) are changed. Since the voltage values are changed based on the color pixel that is driven then it obvious that the voltages will be different based on a voltage being greater or lesser than the other voltage) and Sang teaches applying a first type of bias voltage and a second type of bias voltage (OBS1/2, VOBS).
Regarding claim 12, Kwon teaches wherein a number of the plurality of select lines in the at least one select line group is greater than or equal to 2 and less than or equal to 12 (Fig. 3 select lines CL1-CL6).
Regarding claim 13, Kwon teaches wherein numbers of the plurality of select lines in all of the select line groups are the same (Fig. 3 shows select lines CL1-CL6 being the same for groups 210-230).
Regarding claim 14, Kwon teaches wherein a number of the plurality of select lines in the at least one select line group is N, N being a multiple of 3; and the plurality of light-emitting pixels comprise a plurality of first color light- emitting pixels, a plurality of second color light-emitting pixels, and a plurality of third color light-emitting pixels; a number of the plurality of driving modules connected to the plurality of first color light- emitting pixels is N/3; a number of the plurality of driving modules connected to the plurality of second color light-emitting pixels is N/3; and a number of the plurality of driving modules connected to the plurality of third color light-emitting pixels is N/3 (Figs. 2 shows the driving module/pixel circuit for each RGB colored pixel shown in Fig. 3).
Regarding claim 15, Kwon teaches wherein the at least one select line group comprises a plurality of first color select lines, a plurality of second color select lines, and a plurality of third color select lines, wherein the first color select line is connected to the corresponding first color light-emitting pixel through the switching element and the driving module; the second color select line is connected to the corresponding second color light-emitting pixel through the switching element and the driving module; and the third color select line is connected to the corresponding third color light- emitting pixel through the switching element and the driving module3 (Figs. 2 shows the driving module/pixel circuit for each RGB colored pixel shown in Fig. 3. In Fig. 3 it is shown that CL1/CL3 are connected to red sub pixels, CL2/CL4/CL6 are connected to green sub pixels, and CL5 is connected to the blue sub pixel.).
Regarding claim 16, Kwon teaches wherein the first color select line, the second color select line, and the third color select line are alternately arranged in sequence (Fig. 3).
Regarding claim 17, Sang teaches wherein voltage values of bias voltages received by the plurality of driving modules in the plurality of hold frames are the same and remain constant ([0100]).
Regarding claim 18, Kwon teaches wherein the one frame of image of the display panel further comprises a data write frame; the plurality of select lines in the at least one select line group are configured to receive a second pulse in a time-division manner in the data write frame, and during the duration of the second pulse, the plurality of switching elements connected to the plurality of select lines conduct to cause the corresponding plurality of driving modules to receive a data write voltage (0023] select signals CL are sequentially provided from a timing controller 150, to the demultiplexer which controls the data provided through the data lines and Figs. 2 shows the driving module/pixel circuit for each RGB colored pixel shown in Fig. 3. Also discussed with respect to Fig. 4 [0030]).
Regarding claim 19, Kwon teaches wherein the plurality of select lines in the at least one select line group receive the first pulse in a time-division manner voltage (0023] select signals CL are sequentially provided from a timing controller 150, to the demultiplexer which controls the data provided through the data lines and Figs. 2 shows the driving module/pixel circuit for each RGB colored pixel shown in Fig. 3. Also discussed with respect to Fig. 4 [0030]) and Sang teaches providing a bias voltage pulse in a plurality of hold frames ([0100]).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDRE L MATTHEWS whose telephone number is (571)270-5806. The examiner can normally be reached Mon-Fri 9:00-6:00.
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/ANDRE L MATTHEWS/ Primary Examiner, Art Unit 2621