Prosecution Insights
Last updated: April 19, 2026
Application No. 19/007,934

LIGHT EMITTING DEVICE AND IMAGE FORMING APPARATUS INCLUDING LIGHT EMITTING DEVICE

Final Rejection §103§DP
Filed
Jan 02, 2025
Examiner
ZIMMERMANN, JOHN P
Art Unit
2853
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Canon Kabushiki Kaisha
OA Round
2 (Final)
83%
Grant Probability
Favorable
3-4
OA Rounds
2y 3m
To Grant
99%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allow Rate
598 granted / 724 resolved
+14.6% vs TC avg
Strong +20% interview lift
Without
With
+19.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
32 currently pending
Career history
756
Total Applications
across all art units

Statute-Specific Performance

§103
76.8%
+36.8% vs TC avg
§102
15.3%
-24.7% vs TC avg
§112
5.0%
-35.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 724 resolved cases

Office Action

§103 §DP
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment Claim 1 has been amended and examined as such. Claims 11-15 have been added and examined as such. Double Patenting Claim 1 was rejected on the ground of nonstatutory double patenting. The amendment to the independent claim differentiates it from the claims of U.S. Patent N. 11,635,793 B2, overcoming the Double Patenting rejection. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the Examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the Examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 1 & 11-15 are rejected under 35 U.S.C. 103 as being unpatentable over MISE (JP2008149678A [Machine Translation]) in view of TSUJINO et al. (US 2010/0214390 A1) in further view of FUJIKAWA et al. (US 2008/0111878 A1) and Morita et al. (US 2015/0002596 A1). As related to independent claim 1, MISE teaches an image forming apparatus comprising: a photosensitive member for being rotationally driven about a rotational axis (MISE – Paragraphs 1-4 and Figures 1-3, shown below); an exposure head including a light emitting device, a circuit board on which the light emitting device is mounted, and a lens array for guiding light emitted from the light emitting device to a surface of the photosensitive member (MISE – Paragraphs 52-58); and a controller for outputting image data to the circuit board for driving the light emitting device (MISE – Paragraphs 87 & 93-97), wherein the light emitting device comprises: a glass substrate including a driving circuit for driving the light emitting device (MISE – Paragraphs 87, 93-97, & 100 and Figure 4, Reference #101, shown below); and a laminar member including a first electrode layer that includes a plurality of electrodes arranged in a direction substantially parallel to the rotational axis of the photosensitive member, a second electrode layer through which light is transmittable and which is laminar, and a light emitting layer formed in a layer between the first electrode layer and the second electrode layer and configured to emit light by application of a voltage, the laminar member being formed on a surface of the glass substrate (MISE – Paragraphs 97-112 & 255-258), wherein the driving circuit includes a voltage generating circuit to drive a plurality of electrodes (MISE – Paragraphs 87-121). PNG media_image1.png 384 622 media_image1.png Greyscale PNG media_image2.png 456 618 media_image2.png Greyscale Continuing with claim 1, MISE does not specifically teach a D/A converter. However, TSUJINO et al. teaches an image forming apparatus comprising a photosensitive member; an exposure head; a light emitting element disposed on a substrate and a driving circuit for driving the light emitting element (TSUJINO et al. – Page 2, Paragraphs 30-32; Page 8, Paragraph 136-137; Figures 1 & 2, Reference #85, #822, & #72, shown below), and specifically teaches the driving circuit includes a D/A converter configured to convert a digital signal into an analog voltage (TSUJINO et al. – Page 8, Paragraphs 136-139). It would have been obvious to one of ordinary skill in the art at the time of filing to modify the system of MISE with the D/A converter of TSUJINO et al. in an effort to provide a voltage signal that is aligned at a predetermined timing for active control of the light emitting element (TSUJINO et al. – Page 8, Paragraphs 132-140). PNG media_image3.png 432 554 media_image3.png Greyscale PNG media_image4.png 656 408 media_image4.png Greyscale Continuing with claim 1, MISE as modified by TSUJINO et al. does not specifically teach a silicon wafer as the substrate for the circuitry. However, FUJIKAWA et al. teaches an image forming apparatus with an optical head integrated with a drive circuit which is obtained by a semiconductor process on a silicon wafer (FUJIKAWA et al. – Page 1, Paragraphs 5-8) and Morita et al. teaches forming an organic electroluminescence element and a drive circuit on the same glass substrate or silicon substrate (Morita et al. – Page 3, Paragraphs 48 & 56 and Figure 3, Reference #302 & #303, shown below). It would have been obvious to one of ordinary skill in the art at the time of filing to configure the system of MISE and TSUJINO et al. on a silicon wafer instead of a glass substrate in an effort to use the design choice that is best used to reduce the size of external circuits and reduce the cost while providing an optical head having a wide correction range with a simple structure on a silicon wafer using better precision compared with a glass substrate (Morita et al. – Page 3, Paragraph 56 and FUJIKAWA et al. – Page 1, Paragraphs 8-9). PNG media_image5.png 310 420 media_image5.png Greyscale As related to independent claim 15, the combination of MISE, TSUJINO et al, Morita et al., and FUJIKAWA et al. remains for the reasons indicated above and also teaches a light emitting device for exposing a photosensitive member rotating about a rotational axis thereof (MISE – Paragraphs 1-4; Paragraphs 52-58 & Figures 1-3, shown above; TSUJINO et al. – Page 2, Paragraphs 30-32; Page 8, Paragraph 136-139; Figures 1 & 2, Reference #85, #822, & #72, shown above; FUJIKAWA et al. – Page 1, Paragraphs 5-8; and Morita et al. – Page 3, Paragraphs 48 & 56), the light emitting device comprising: a silicon substrate (Morita et al. – Page 3, Paragraphs 48 & 56 and Figure 3, Reference #302 & #303, shown above); a first electrode layer that includes a plurality of electrodes arranged in a direction of the rotational axis of the photosensitive member; a second electrode layer through which light is transmittable; a light emitting layer formed in a layer between the first electrode layer and the second electrode layer and for emitting light by application of a voltage (MISE – Paragraphs 87-121 & 255-258 and TSUJINO et al. – Figure 2, shown above); and a driving circuit configured to drive the plurality of electrodes and built in the silicon substrate (TSUJINO et al. – Page 2, Paragraphs 30-32; Page 8, Paragraph 136-139; Figures 1 & 2, Reference #85, #822, & #72, shown above), wherein the driving circuit includes a D/A converter configured to convert a digital signal into an analog voltage, and wherein the driving circuit applies the voltage converted by the D/A converter to the plurality of electrodes (TSUJINO et al. – Page 8, Paragraphs 136-139). As related to dependent claim 11, the combination of MISE, TSUJINO et al, Morita et al., and FUJIKAWA et al. remains as applied above and continues to teach the driving circuit applies the voltage converted by the D/A converter to the plurality of electrodes (TSUJINO et al. – Page 8, Paragraph 132-139; Figures 1 & 2, Reference #85, #822, & #72, shown above; and Figure 5, Reference #853, shown below). PNG media_image6.png 446 654 media_image6.png Greyscale As related to further dependent claim 12, the combination of MISE, TSUJINO et al, Morita et al., and FUJIKAWA et al. remains as applied above and continues to teach the plurality of electrodes are arranged two-dimensionally along a direction of the rotational axis and a rotational direction of the photosensitive member (MISE – Figure 27, Reference #110, shown below and Morita et al. – Figure 3, shown above). PNG media_image7.png 376 459 media_image7.png Greyscale As related to further dependent claim 13, the combination of MISE, TSUJINO et al, Morita et al., and FUJIKAWA et al. remains as applied above and continues to teach a first substrate on which a plurality of light emitting devices are mounted; and a second substrate, wherein the controller is provided on the second substrate and outputs an image data for controlling lighting of the plurality of light emitting devices (FUJIKAWA et al. – Figure 3, Reference #10A & #50A, shown below and TSUJINO et al. – Figure 2, Reference #71, #72, #85, & #822, shown above). PNG media_image8.png 140 388 media_image8.png Greyscale As related to further dependent claim 14, the combination of MISE, TSUJINO et al, Morita et al., and FUJIKAWA et al. remains as applied above and continues to teach the light emitting devices are disposed in a staggered arrangement along the direction of the rotational axis (MISE – Figure 27, Reference #110, shown above and Morita et al. – Figure 3, shown above). Response to Arguments Applicant’s arguments with respect to claim 1 has been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Hirane et al. (US 4,967,192 A) teaches a light-emitting element array and driver circuit in a printer which uses a DAC as the driver for driving the light emitting elements. TANIMOTO (US 2019/0268498 A1) teaches an image forming apparatus using a staggered light-emitting element array and a D/A conversion circuit which outputs an analog voltage signal to drive the array. Examiner's Note: Examiner has cited particular Figures & Reference Numbers, Columns, Paragraphs and Line Numbers in the references as applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the Examiner should be directed to JOHN P ZIMMERMANN whose telephone number is (571)270-3049. The Examiner can normally be reached Monday-Thursday 0700-1730 EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the Examiner by telephone are unsuccessful, the Examiner’s supervisor, Ricardo Magallanes can be reached at (571) 272-5960. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /John P Zimmermann/Primary Examiner, Art Unit 2853
Read full office action

Prosecution Timeline

Jan 02, 2025
Application Filed
Sep 29, 2025
Non-Final Rejection — §103, §DP
Jan 29, 2026
Response Filed
Apr 02, 2026
Final Rejection — §103, §DP (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
83%
Grant Probability
99%
With Interview (+19.7%)
2y 3m
Median Time to Grant
Moderate
PTA Risk
Based on 724 resolved cases by this examiner. Grant probability derived from career allow rate.

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