DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
This Office action is in response to Applicant’s Arguments filed 5/8/2026.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 8 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Porzio et al. (US 2023/0205457 A1, hereinafter Porzio) in view of Margetts (US 2018/0260145 A1).
Regarding claim 1, Porzio discloses a host system (105, figure 1) comprising a memory controller (figure 1, 115) operable on a connection from the memory controller to a host interface (figure 2, 220) of a memory sub-system (figure 1, 130 and [0019]-[0021], a host system 105, which may be coupled with the memory system 110, including an interface with a host system controller 106, and a memory system controller 115 and one or more memory devices 130); and at least one processing device (figure 1, 106) coupled to the memory controller and configured to: provide a storage access request to the memory sub-system to instruct the memory sub-system to read a data block from a storage space of the memory sub-system into a memory space of the memory sub-system ([0022] and [0025], the memory system controller 115 may receive commands or operations from the host system 105 and may convert the commands or operations into instructions or appropriate commands to achieve the desired access of the memory devices 130, and the memory system controller 115 may exchange data with the host system 105 and with one or more memory devices 130, wherein local memory 120 may serve as a cache for the memory system controller 115 such that data may be stored in the local memory 120 if read from or written to a memory device 130, and the data may be available within the local memory 120 for subsequent retrieval for or manipulation by the host system). Porzio differs from the claimed invention in not specifically teaching to receive a completion record for the storage access request. However, it is old and notoriously well known in the art of receiving a completion record for the storage access request in reading and writing processes in a storage system to improve execution efficiency, for example see Margetts ([0050], the local processor rings the doorbell register of the memory controller to acknowledge the receipt of the completion of the command). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Porzio in receiving a completion record for the storage access request, as per teaching of Margetts, in order to improve execution efficiency.
Regarding claim 8, the limitations of the claim are rejected as the same reasons as set forth in claim 1.
Regarding claim 17, the limitations of the claim are rejected as the same reasons as set forth in claim 1.
Allowable Subject Matter
Claims 2-7, 9-16 and 18-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Response to Arguments
Applicant's arguments filed 5/8/2026 have been fully considered but they are not persuasive.
In response to applicant's argument that the references fail to show certain features of the invention, it is noted that the features upon which applicant relies (i.e., techniques to facilitate efficient access of a storage space of a memory sub-system at a granularity level smaller than the level of an atomic read or write operation in the memory sub-system in retrieving data from memory cells or programming data into the memory cells) are not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). In this case, the claims do not explicitly recite atomic read or write operation in the memory sub-system. Instead, claims 1, 8 and 17 merely recite “provide a storage access request to the memory sub-system to instruct the memory sub-system to read a data block from a storage space of the memory sub-system into a memory space of the memory sub-system; and receive a completion record for the storage access request”.
In response to applicant's argument that Porzio is limited to disclosing techniques for atomic write operations. Examiner respectfully disagreed because Porzio clearly teaches the host system 105 may use the memory system 110, for example, to write data to the memory system 110 and read data from the memory system 110 ([0019]), and the memory system controller 115 may also be coupled with and communicate with memory devices 130 to perform operations such as reading data, writing data, erasing data, or refreshing data at a memory device 130 ([0022]). Thus, Porzio is NOT limited to disclosing techniques for atomic write operations. In addition, Porzio teaches to provide a storage access request to the memory sub-system to instruct the memory sub-system to read a data block from a storage space of the memory sub-system into a memory space of the memory sub-system ([0022] and [0025], the memory system controller 115 may receive commands or operations from the host system 105 and may convert the commands or operations into instructions or appropriate commands to achieve the desired access of the memory devices 130, and data may be stored in the local memory 120 if read from or written to a memory device 130). Thus, Porzio teaches the broad claimed limitations “provide a storage access request to the memory sub-system to instruct the memory sub-system to read a data block from a storage space of the memory sub-system into a memory space of the memory sub-system”. The use of Margetts is for teaching “receive a completion record for the storage access request” because Margetts (figure 6 and [0050]) teaches the command layer processor queues a completion message into the respective local completion queue of the local processor that submitted the read command, and the local processor rings the doorbell register of the memory controller to acknowledge the receipt of the completion of the command in order to improve execution efficiency. Therefore, the combination of Porzio and Margetts teaches the broad claimed limitations as recited in claims 1, 8 and 17.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Bert (US 20260187015 A1) discloses techniques to facilitate efficient access of a storage space of a memory sub-system at a granularity level smaller than the level of an atomic read or write operation in the memory sub-system in retrieving data from memory cells or programming data into the memory cells (abstract and [0015]-[0019]).
Bert (US 20260186986 A1) discloses a system having a processing device, a memory sub-system having a memory space accessible via a memory access protocol and a storage space accessible via a storage access protocol, and a processing device is to configure a storage access request to identify a logical block address in the storage space and a first memory address in the memory space in the memory sub-system (abstract).
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ZHUO H LI whose telephone number is (571)272-4183. The examiner can normally be reached Mon. Tue. and Thurs. 8:00-4:00 PM.
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/ZHUO H LI/Primary Examiner, Art Unit 2133
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