DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-14 of U.S. Patent No. 12,253,942. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims of the instant application add additional limitations regarding what the host is doing in addition broader limitations regarding what the storage device is doing which is covered by the patent.
Instant Application
Patent 12,253,942
1. A system, comprising: a host configured to: obtain fragmented first addresses of logical block address (LBA) segments of a file; and merge the fragmented first addresses into continuous first addresses of a merged LBA segment of the file; and a storage device for storing a mapping table corresponding to the file, wherein the storage device is configured to: in response to a first command received from the host, update a mapping relation indicated by the mapping table from an original mapping relation corresponding to the fragmented first addresses to a new mapping relation corresponding to the continuous first addresses; and send an instruction to the host indicating that the mapping relation indicated by the mapping table has been updated.
2. The system of claim 1, wherein the original mapping relation corresponding to the fragmented first addresses comprises the mapping relation between the fragmented first addresses and second addresses of the file, and the new mapping relation corresponding to the continuous first addresses comprises the mapping relation between the continuous first addresses and the second addresses of the file
3. The system of claim 2, wherein the first addresses comprise logic addresses, and the second addresses comprise physical addresses.
4. The system of claim 3, wherein the storage device further comprises: a memory device; and a memory controller coupled to the memory device and the host.
5. The system of claim 4, wherein the memory controller further comprises an interface configured to receive the first command from the host and send the instruction to the host.
6. The system of claim 5, wherein the memory device is configured to store a merge log recording the new mapping relation between the continuous first addresses of the merged LBA segment of the file and the physical addresses of the file, and an updated speed of the merge log is faster than the mapping table in the memory device.
8. The system of claim 4, wherein the memory controller further comprises a controller memory configured to store the mapping table corresponding to the file, and the mapping table comprises a logical-to-physical (L2P) address mapping table.
9. The system of claim 1, wherein the host obtains the continuous first addresses of the merged LBA segment of the file before sending the first command.
10. The system of claim 1, wherein in response to a second command, the host merges the fragmented first addresses into the continuous first addresses of the merged LBA segment of the file.
11. The system of claim 1, wherein the host is further configured to update an index node of the file by pointing to a new LBA segment with the continuous first addresses of the merged LBA segment of the file after receiving the instruction.
1. A memory controller of a storage device, comprising: a controller memory for storing a logical-to-physical (L2P) address mapping table corresponding to a file; and a controller processor configured to control a memory device of the storage device, receive a mapping update command from a host, and update the L2P address mapping table according to the mapping update command by: replacing original logical addresses of logical block address (LBA) segments of the file with new continuous logical addresses of a merged LBA segment of the file, and changing an original mapping relation between the original logical addresses of the LBA segments of the file and physical addresses of the file, to a new mapping relation between the new continuous logical addresses of the merged LBA segment of the file and the physical addresses of the file, wherein the L2P address mapping table is stored in a volatile controller memory in the controller memory; and the controller processor is further configured to transmit the updated L2P address mapping table to a physical data block of the memory device and transmit an instruction to the host acknowledging that the L2P address mapping table has been updated in the physical data block of the memory device, wherein the controller processor is configured to generate a merge log by recording the new mapping relation between the new continuous logical addresses of the merged LBA segment of the file and the physical addresses of the file and transmit the merge log to the physical data block of the memory device, wherein the merge log stored in the physical data block updates faster than the L2P address mapping table stored in the physical data block.
7. The system of claim 6, wherein the memory controller further comprises a controller processor coupled to the interface and configured to: in response to a sudden power loss, rebuild the mapping table according to the merge log after the system is restarted.
3. The memory controller of the storage device of claim 1, wherein in response to a sudden power loss, the controller processor is configured to rebuild the volatile L2P address mapping table according to the merge log stored in the physical data block after a memory system is restarted.
12. The system of claim 1, wherein the storage device comprises a universal flash storage (UFS) device.
6. The memory controller of claim 1, wherein the storage device comprises a solid-state device (SSD), a personal computer memory card international association (PC) card, a compact Flash (CF) card, a smart media (SM) card, a memory stick, a multimedia card, a secure digital memory (SD) card, or a universal Flash storage (UFS).
13. A storage device, comprising: a memory device comprising a physical data block; and a memory controller comprising: a controller memory for storing a mapping table corresponding to a file; and a controller processor coupled to the controller memory and configured to: in response to a command, receive continuous first addresses of a merged logical block address (LBA) segment of the file obtained from merging fragmented first addresses of LBA segments of the file; update a mapping relation indicated by the mapping table from an original mapping relation corresponding to the fragmented first addresses to a new mapping relation corresponding to the continuous first addresses; and send an instruction indicating that the mapping relation indicated by the mapping table has been updated.
14. The storage device of claim 13, wherein the original mapping relation corresponding to the fragmented first addresses comprises the mapping relation between the fragmented first addresses and second addresses of the file, and the new mapping relation corresponding to the continuous first addresses comprises the mapping relation between the continuous first addresses and the second addresses of the file.
15. The storage device of claim 14, wherein the first addresses comprise logic addresses, and the second addresses comprise physical addresses.
16. The storage device of claim 15, wherein the physical data block is configured to store a merge log recording the new mapping relation between the continuous first addresses of the merged LBA segment of the file and the physical addresses of the file, and an updated speed of the merge log is faster than the mapping table in the memory device.
7. A storage device, comprising: a memory device comprising a physical data block; and a memory controller comprising: a controller memory for storing a logical-to-physical (L2P) address mapping table corresponding to a file; and a controller processor configured to control the memory device, receive a mapping update command from a host, and update the L2P address mapping table according to the mapping update command by: replacing original logical addresses of logical block address (LBA) segments of the file with new continuous logical addresses of a merged LBA segment of the file, and changing an original mapping relation between the original logical addresses of the LBA segments of the file and physical addresses of the file, to a new mapping relation between the new continuous logical addresses of the merged LBA segment of the file and the physical addresses of the file, wherein the L2P address mapping table is stored in a volatile controller memory in the controller memory; and the controller processor is configured to transmit the updated L2P addressing mapping table to the physical data block of the memory device and transmit an instruction to the host acknowledging that the L2P address mapping table has been updated in the physical data block of the memory device, wherein the controller processor is configured to generate a merge log by recording the new mapping relation between the new continuous logical addresses of the merged LBA segment of the file and the physical addresses of the file and transmit the merge log to the physical data block of the memory device, wherein the merge log stored in the physical data block updates faster than the L2P address mapping table stored in the physical data block.
17. The storage device of claim 16, wherein the controller processor is further configured to: in response to a sudden power loss, rebuild the mapping table according to the merge log after the storage device is restarted.
9. The storage device of claim 7, wherein in response to a sudden power loss, the controller processor is configured to rebuild the L2P address mapping table according to the merge log stored in the physical data block after the storage device is restarted.
18. A method of operating a host, comprising: obtaining fragmented logic addresses of logical block address (LBA) segments of a file; in response to a first command, merging the fragmented logic addresses into continuous logic addresses of a merged LBA segment of the file; and sending a second command to indicate updating a mapping relation indicated by a mapping table from an original mapping relation corresponding to the fragmented logic addresses to a new mapping relation corresponding to the continuous logic addresses.
19. The method of claim 18, wherein the original mapping relation corresponding to the fragmented logic addresses comprises the mapping relation between the fragmented logic addresses and physical addresses of the file, and the new mapping relation corresponding to the continuous logic addresses comprises the mapping relation between the continuous logic addresses and the physical addresses of the file.
12. A method for operating a memory controller of a storage device, comprising: receiving a mapping update command from a host; storing a logical-to-physical (L2P) address mapping table corresponding to a file in a volatile controller memory in a controller memory of the memory controller; and updating the L2P address mapping table according to the mapping update command by: replacing original logical addresses of logical block address (LBA) segments of the file with new continuous logical addresses of a merged LBA segment of the file, and changing an original mapping relation between the original logical addresses of the LBA segments of the file and physical addresses of the file, to a new mapping relation between the new continuous logical addresses of the merged LBA segment of the file and the physical addresses of the file; transmitting the updated L2P addressing mapping table to a physical data block of a memory device of the storage device; transmitting an instruction to the host acknowledging that the L2P address mapping table has been updated in the physical data block of the memory device; recording the new mapping relation between the new continuous logical addresses of the merged LBA segment of the file and the physical addresses of the file as a merge log; and transmitting the merge log to the physical data block of the memory device, wherein the merge log stored in the physical data block updates faster than the L2P address mapping table stored in the physical data block.
20. A method of operating a system, the system comprising a host and a storage device coupled to the host, wherein the method comprises: obtaining, by the host, fragmented logic addresses of logical block address (LBA) segments of a file; merging, by the host, the fragmented logic addresses into continuous logic addresses of a merged LBA segment of the file; sending, by the host, a command to the storage device; in response to the command, updating, by the storage device, a mapping relation indicated by a mapping table from an original mapping relation corresponding to the fragmented logic addresses to a new mapping relation corresponding to the continuous logic addresses; and sending, by the storage device, an instruction to the host indicating that the mapping relation indicated by the mapping table has been updated.
12. A method for operating a memory controller of a storage device, comprising: receiving a mapping update command from a host; storing a logical-to-physical (L2P) address mapping table corresponding to a file in a volatile controller memory in a controller memory of the memory controller; and updating the L2P address mapping table according to the mapping update command by: replacing original logical addresses of logical block address (LBA) segments of the file with new continuous logical addresses of a merged LBA segment of the file, and changing an original mapping relation between the original logical addresses of the LBA segments of the file and physical addresses of the file, to a new mapping relation between the new continuous logical addresses of the merged LBA segment of the file and the physical addresses of the file; transmitting the updated L2P addressing mapping table to a physical data block of a memory device of the storage device; transmitting an instruction to the host acknowledging that the L2P address mapping table has been updated in the physical data block of the memory device; recording the new mapping relation between the new continuous logical addresses of the merged LBA segment of the file and the physical addresses of the file as a merge log; and transmitting the merge log to the physical data block of the memory device, wherein the merge log stored in the physical data block updates faster than the L2P address mapping table stored in the physical data block.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-5, 8-10, 13-15 and 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Sela (US PGPub 2013/0166818) in view of Kuzmin et al. (US PGPub 2014/0215129, hereafter referred to as Kuzmin).
Regarding claim 1, Sela teaches obtain fragmented first addresses of logical block address (LBA) segments of a file, and merge the fragmented first addresses into continuous first addresses of a merged LBA segment of the file (Paragraphs [0031]-[0034], describes the defragmentation process which involves taking separated logical addresses of a file (fragmented) and merging then so the logical addresses are continuous (merged LBA segment)), and a storage device for storing a mapping table corresponding to the file (Fig. 1 and Paragraphs [0002] and [0020], show the storage device and states that the controller/host interface of the storage device can be used to translate addresses meaning that the table or equivalent would need to be present/stored in the storage device so it can use it), and update a mapping relation indicated by the mapping table from an original mapping relation corresponding to the fragmented first addresses to a new mapping relation corresponding to the continuous first addresses (Paragraphs [0031]-[0034], as stated previously, the defragmentation operation will update the logical addresses (and thus the mapping relations) of the file so the logical addresses are continuous). Sela does not teach a system, comprising: a host configured to: obtain fragmented first addresses of logical block address (LBA) segments of a file, wherein the storage device is configured to: in response to a first command received from the host, update a mapping relation indicated by the mapping table from an original mapping relation corresponding to the fragmented first addresses to a new mapping relation corresponding to the continuous first addresses, and send an instruction to the host indicating that the mapping relation indicated by the mapping table has been updated.
Kuzmin teaches a system, comprising: a host configured to: obtain fragmented first addresses of segments of a file (Paragraph [0173], states that the garbage collection process can be used for defragmentation. Paragraphs [0136]-[0139], describe the process of host/cooperative controlled garbage collection where the host will request from the memory controller a list of candidates for the procedure), wherein the storage device is configured to: in response to a first command received from the host, update a mapping relation indicated by the mapping table from an original mapping relation corresponding to the fragmented first addresses to a new mapping relation corresponding to the first addresses, and send an instruction to the host indicating that the mapping relation indicated by the mapping table has been updated (Fig. 11A and Paragraphs [0136]-[0139] and [0173], the memory controller in the process will receive from the host the updated locations (targets and sources) for the data that is to be garbage collected and update the tables to reflect the changes. Afterwards the memory controller will send confirmation back to the host). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Sela to have the host manage parts of the defragmentation process as taught in Kuzmin so to reduces performance unpredictability and overhead, thereby facilitating integration of solid state drives (SSDs) with other forms of storage (Kuzmin, Abstract).
Regarding claim 2, Sela and Kuzmin teach all the limitations to claim 1. Sela further teaches wherein the original mapping relation corresponding to the fragmented first addresses comprises the mapping relation between the fragmented first addresses and second addresses of the file, and the new mapping relation corresponding to the continuous first addresses comprises the mapping relation between the continuous first addresses and the second addresses of the file (Paragraphs [0031]-[0034], as stated in the rejection to claim 1, the defragmentation process takes logical addresses of a file that are random/separate and makes them continuous). The combination of and reason for combining are the same as those given in claim 1.
Regarding claim 3, Sela and Kuzmin teach all the limitations to claim 2. Sela further teaches wherein the first addresses comprise logic addresses, and the second addresses comprise physical addresses (Paragraph [0020], states the logical addresses have corresponding physical addresses). The combination of and reason for combining are the same as those given in claim 1.
Regarding claim 4, Sela and Kuzmin teach all the limitations to claim 3. Sela further teaches wherein the storage device further comprises: a memory device, and a memory controller coupled to the memory device and the host (Fig. 1 and Paragraph [0020], shows the storage device which includes a memory and a controller). The combination of and reason for combining are the same as those given in claim 1.
Regarding claim 5, Sela and Kuzmin teach all the limitations to claim 4. Sela further teaches wherein the memory controller further comprises an interface configured to receive the first command from the host and send the instruction to the host (Fig. 1 and Paragraph [0020], shows the storage device that includes a host interface with the controller that is used to facilitate communication with the host). The combination of and reason for combining are the same as those given in claim 1.
Regarding claim 8, Sela and Kuzmin teach all the limitations to claim 4. Kuzmin further teaches wherein the memory controller further comprises a controller memory configured to store the mapping table corresponding to the file, and the mapping table comprises a logical-to-physical (L2P) address mapping table (Paragraphs [0066]-[0068], states the controller can have a metadata storage and some of the metadata that can be used is L2P and P2L mapping tables). The combination of and reason for combining are the same as those given in claim 1.
Regarding claim 9, Sela and Kuzmin teach all the limitations to claim 1. Kuzmin further teaches wherein the host obtains the continuous first addresses of the merged LBA segment of the file before sending the first command (Paragraphs [0031]-[0034], states that the host will make a decision on the candidates and updated locations before sending the command to the memory controller). The combination of and reason for combining are the same as those given in claim 1.
Regarding claim 10, Sela and Kuzmin teach all the limitations to claim 1. Kuzmin further teaches wherein in response to a second command, the host merges the fragmented first addresses into the continuous first addresses of the merged LBA segment of the file (Fig. 11A and Paragraphs [0136]-[0139], the memory controller can detect a threshold condition and send a command to the host that garbage collection needs to be performed which can trigger the host to act. Paragraph [0173], as stated previously in claim 1, the garbage collection process can be used for defragmentation). The combination of and reason for combining are the same as those given in claim 1.
Regarding claims 13-15, claims 13-15 are the storage device claims associated with claims 1, 4, 8 (claim 13), 2 (claim 14), and 3 (claim 15). Since Sela and Kuzmin teach all the limitations to claims 1-4 and 8 and Kuzmin further teaches a controller processor coupled to the controller memory (Fig. 2, processor 202), they also teach all the limitations to claims 13-15; therefore the rejections to claims 1-4 and 8 also apply to claims 13-15.
Regarding claims 18 and 19, claims 18 and 19 are the method claims associated with claims 1 and 2. Since Sela and Kuzmin teach all the limitations to claims 1 and 2, they also teach all the limitations of claims 18 and 19; therefore the rejections to claims 1 and 2 also apply to claims 18 and 19.
Regarding claim 20, claim 20 is the method claim associated with claim 1. Since Sela and Kuzmin teach all the limitations to claim 1, they also teach all the limitations to claim 20; therefore the rejection to claim 1 also applies to claim 20.
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Sela and Kuzmin as applied to claim 1 above, and further in view of Fujita (US PGPub 2019/0065395).
Regarding claim 11, Sela and Kuzmin teach all the limitations to claim 1. Sela and Kuzmin do not teach wherein the host is further configured to update an index node of the file by pointing to a new LBA segment with the continuous first addresses of the merged LBA segment of the file after receiving the instruction.
Fujita teaches wherein the host is further configured to update an index node of the file by pointing to a new LBA segment with the continuous first addresses of the merged LBA segment of the file after receiving the instruction (Paragraphs [0039]-[0041], describe the process of defragmentation which involves updating an inode ( index node) to reflect the new addresses). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Sela and Kuzmin to use the inode mapping as taught in Fujita so to prevent an increase in the write amplification factor (WAF) due to the defragmentation (Fujita, Paragraph [0021]).
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Sela and Kuzmin as applied to claim 1 above, and further in view of Palmer et al. (US PGPub 2021/0064526, hereafter referred to as Palmer).
Regarding claim 12, Sela and Kuzmin teach all the limitations to claim 1. Sela and Kuzmin do not explicitly teach wherein the storage device comprises a universal flash storage (UFS) device.
Palmer teaches wherein the storage device comprises a universal flash storage (UFS) device (Paragraphs [0019] and [0044], show the device can be a UFS device). Since both Sela/Kuzmin and Palmer teach the use of flash devices It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to substitute the flash device of Sela and Kuzmin with the UFS device of Palmer to obtain the predictable result of wherein the storage device comprises a universal flash storage (UFS) device.
Allowable Subject Matter
Claims 6, 7, 16, 17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
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/NICHOLAS A. PAPERNO/Examiner, Art Unit 2132