DETAILED ACTION
This FINAL action is in response to Application No. 19/008,534 originally filed 01/02/2025. The amendment presented on 01/08/2026 which provides amendments to claims 1, 8, and 9 and cancels claim 7 is hereby acknowledged. Claim 8 was previously withdrawn as being directed to a non-elected embodiment. Applicant’s elected with traverse of Species B in the reply filed on 10/17/2025 is acknowledged. Claims 1-6 and 9-11 are readable on the elected species. Currently Claim 8 is withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to one or more nonelected inventions, there being no allowable generic or linking claim.
Currently Claims 1-6 and 8-11 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed 01/08/2026 have been fully considered but they are not persuasive. Applicant asserts the amendments to the claims (former claim 7) overcome the prior art of record however The Office respectfully disagrees. The Office notes that Figure 5 provides for item 148a which is the connection to the electrodes 142/143 from Figure 1. As seen in Figure 5 (and similarly in Figure 6), item 148, which is 148a/148b, connects in the peripheral area from the hole 154b back to the electrodes of Figure 142/143. As clearly seen in Figure 1, items 142/143 clearly provide a plurality of connecting parts some of which are adjacent. Additionally, layer 148a is provide above an thin film encapsulation layer 140 a portion of which was equated to Applicants claimed first insulating layer. In addition, the variation as disclosed by Figure 7 provides this as a single layer from the peripheral to the touch electrodes. Therefore, after review, Applicants claimed invention is thus still broad enough to read on the prior art of record and will be currently maintained.
Claim Rejections - 35 USC § 102
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim(s) 1-6 and 8-10 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kang et al. U.S. Patent Application Publication No. 2017/0090651 A1 hereinafter Kang.
Consider Claim 1:
Kang discloses an electronic device, comprising: (Kang, See Abstract.)
a substrate including a peripheral area; (Kang, See Fig. 6 item 123.)
a first insulating layer, disposed above the substrate and overlapped with the peripheral area; (Kang, [0081], [0043], “The first and second passivation layers 155 and 156 may include an inorganic material, such as silicon nitride (SiN.sub.x), silicon oxide (SiO.sub.x), silicon oxynitride (SiO.sub.xN.sub.y), etc., or an organic material, such as a polyacrylate resin, a polyimide resin, etc.”)
a second insulating layer, disposed between the first insulating layer and the substrate; (Kang, [0081], [0068], “A second insulating layer 128 covering first pad electrode 421 is formed on the first insulating layer 127. A second contact hole exposing the first pad electrode 421 is formed in the second insulating layer 128. The second insulating layer 128 of FIG. 5 may be formed on the same layer as the interlayer insulating layer 128 of FIG. 4. For example, the second insulating layer 128 may include a ceramic-based material, such as silicon nitride (SiN.sub.x) or silicon oxide (SiO.sub.x). The second pad electrode 423 is formed on the first pad electrode 421. The second pad electrode 423 is connected to the first pad electrode 421 via the second contact hole that is formed in the second insulating layer 128.”)
a first conductive part, disposed above the first insulating layer and overlapped with the peripheral area; and (Kang, [0081], [0079], “The upper touch wires 148b may be connected to the second pad electrode 423. In this case, a fourth contact hole 154b exposing the second pad electrode 423 may be formed in the third and fourth insulating layers 124 and 125. More particularly, the upper touch wires 148b may be connected to the second pad electrode 423, which is exposed by the fourth contact hole 154b.”)
a second conductive part, disposed between the first insulating layer and the second insulating layer and overlapped with the peripheral area, (Kang, [0081], [0069], “A third insulating layer 124 covering the second pad electrode 423 is formed on the second insulating layer 128. A fourth insulating layer 125 is formed on the third insulating layer 124. In this case, the third and fourth insulating layers 124 and 125 may be respectively formed as the same layers of the planarization layer 124 and the pixel defining layer 125 of FIG. 4. In addition, a thin film encapsulation layer 140 may be formed on the fourth insulating layer 125. However, the fourth insulating layer 125 and the thin film encapsulation layer 140 may be omitted in the pad portion PA.”)
wherein the first conductive part is electrically connected to the second conductive part via a first conductive structure penetrating the first insulating layer. (Kang, [0081], “Referring to FIG. 6, according to an exemplary embodiment of the present invention, the lower touch wires 148a may be connected to the second pad electrode 423. According to the present exemplary embodiment, the lower touch wires 148a may be formed on the thin film encapsulation layer 140, to be connected to the second pad electrode 423 exposed by the fourth contact hole 154b. That is, in FIG. 5, the upper touch wires 148b are connected to the second pad electrode 423, and in FIG. 6, the lower touch wires 148a are connected to the second pad electrode 423.”)
a first conducting layer, disposed above the first insulating layer, wherein the first conducting layer includes a plurality of first electrodes and a plurality of first connecting parts, one of the plurality of first connecting parts is electrically connected to two adjacent first electrodes of the plurality of first electrodes. (Kang, [0082], [0081], “Referring to FIG. 6, according to an exemplary embodiment of the present invention, the lower touch wires 148a may be connected to the second pad electrode 423. According to the present exemplary embodiment, the lower touch wires 148a may be formed on the thin film encapsulation layer 140, to be connected to the second pad electrode 423 exposed by the fourth contact hole 154b. That is, in FIG. 5, the upper touch wires 148b are connected to the second pad electrode 423, and in FIG. 6, the lower touch wires 148a are connected to the second pad electrode 423.”)
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Consider Claim 2:
Kang discloses the electronic device according to claim 1, wherein at least a portion of the first conductive part and at least a portion of the second conductive part extend along a first direction. (Kang, [0081], “Referring to FIG. 6, according to an exemplary embodiment of the present invention, the lower touch wires 148a may be connected to the second pad electrode 423. According to the present exemplary embodiment, the lower touch wires 148a may be formed on the thin film encapsulation layer 140, to be connected to the second pad electrode 423 exposed by the fourth contact hole 154b. That is, in FIG. 5, the upper touch wires 148b are connected to the second pad electrode 423, and in FIG. 6, the lower touch wires 148a are connected to the second pad electrode 423.”)
Consider Claim 3:
Kang discloses the electronic device according to claim 1, further comprising: a light-emitting component, disposed between the first insulating layer and the second insulating layer. (Kang, [0060], “The organic emission layer 170 is formed on the pixel electrode 160. A second electrode, i.e., a common electrode 180, may be formed on the organic emission layer 170. As such, the organic light emitting element LD including the pixel electrode 160, the organic emission layer 170, and the common electrode 180 is formed.”)
Consider Claim 4:
Kang discloses the electronic device according to claim 3, further comprising: a thin film transistor, electrically connected to the light-emitting component. (Kang, [0056], “A data line including a driving source electrode 131 and a driving drain electrode 132 is formed on the interlayer insulating layer 128. The driving source electrode 131 and the driving drain electrode 132 are respectively connected to the source and drain regions 134 and 136 of the driving semiconductor layer 137 via the contact hole 128a, which is disposed on the interlayer insulating layer 128 and the gate insulating layer 127. As such, a driving thin-film transistor 130 is formed by the driving semiconductor layer 137, the driving gate electrode 133, the driving source electrode 131, and the driving drain electrode 132. It is noted that, however, the configuration of the driving thin-film transistor 130 may be varied.”)
Consider Claim 5:
Kang discloses the electronic device according to claim 4, wherein the thin film transistor includes a semiconductor layer, and the second conducting layer is electrically connected to the semiconductor layer. (Kang, [0056], “A data line including a driving source electrode 131 and a driving drain electrode 132 is formed on the interlayer insulating layer 128. The driving source electrode 131 and the driving drain electrode 132 are respectively connected to the source and drain regions 134 and 136 of the driving semiconductor layer 137 via the contact hole 128a, which is disposed on the interlayer insulating layer 128 and the gate insulating layer 127. As such, a driving thin-film transistor 130 is formed by the driving semiconductor layer 137, the driving gate electrode 133, the driving source electrode 131, and the driving drain electrode 132. It is noted that, however, the configuration of the driving thin-film transistor 130 may be varied.”)
Consider Claim 6:
Kang discloses the electronic device according to claim 3, wherein the substrate includes a display area, and the light-emitting component is disposed on the substrate and overlapped with the display area. (Kang, [0034], “Referring to FIGS. 1 and 2, the touch sensor 150 includes sensing electrodes 142 and 143 formed on the display panel 110, and touch wires 147 and 148 connected to the sensing electrodes 142 and 143. The sensing electrodes 142 and 143 are substantially disposed in a touch sensing area TA. The touch wires 147 and 148 may be disposed in the touch sensing area TA or a non-touch sensing area DA.”)
Consider Claim 8 (WITHDRAWN):
Kang discloses the electronic device according to claim 1, further comprising: a third insulating layer, disposed between the plurality of first electrodes and the plurality of first connecting parts. (Kang, [0078], “The lower touch wires 148a are formed on the thin film encapsulation layer 140, and the first passivation layer 155 covers the lower touch wires 148a. In this case, a first contact hole 155a is formed in the first passivation layer 155, such that the upper touch wires 148b formed on the first passivation layer 155 may be connected to the lower touch wires 148a.”)
Consider Claim 9:
Kang discloses the electronic device according to claim 1, wherein at least one of the plurality of first electrodes is configured to sense a touch. (Kang, [0041], “When the first and second sensing electrodes 142 and 143 adjacent to each other form a mutual-sensing capacitor, one of the first and second sensing electrodes 142 and 143 receives the sensing input signal from the touch driving unit, such that the mutual sensing capacitor is charged with a predetermined amount of charges.”)
Consider Claim 10:
Kang discloses the electronic device according to claim 1, wherein the first insulating layer comprises: a first inorganic layer; and a second inorganic layer disposed above the first inorganic layer. (Kang, [0081], [0043], “The first and second passivation layers 155 and 156 may include an inorganic material, such as silicon nitride (SiN.sub.x), silicon oxide (SiO.sub.x), silicon oxynitride (SiO.sub.xN.sub.y), etc., or an organic material, such as a polyacrylate resin, a polyimide resin, etc.”)
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim(s) 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kang et al. U.S. Patent Application Publication No. 2017/0090651 A1 as applied to claim 10 above, and further in view of Kim et al. U.S. Patent Application Publication No. 2018/0033830 A1 hereinafter Kim.
Consider Claim 11:
Kang discloses the electronic device according to claim 10, however does specify wherein the first insulating layer further comprises: an organic layer, disposed between the first inorganic layer and the second inorganic layer and overlapped with a display area of the substrate, wherein the first inorganic layer and the second inorganic layer are in direct contact at the peripheral area.
Kim however teaches that it was a known technique to those having ordinary skill in the art before the effective filing date of the invention to provide wherein the first insulating layer further comprises: an organic layer, disposed between the first inorganic layer and the second inorganic layer and overlapped with a display area of the substrate, wherein the first inorganic layer and the second inorganic layer are in direct contact at the peripheral area. (Kim, [0097], [0068], “The circuit layer DP-CL may include at least one intermediate insulation layer, a plurality of conductive layers, and a semiconductor layer. The plurality of conductive layers of the circuit layer DP-CL may constitute signal lines or a driving circuit of a pixel. The light emitting device layer DP-OLED includes at least organic light emitting diodes. The thin film encapsulation layer TFE seals the light emitting device layer DP-OLED. The thin film is encapsulation layer TFE includes an inorganic layer and an organic layer. The thin film encapsulation layer TFE may include at least two inorganic layers and an organic layer therebetween. The inorganic layers protect the light emitting device layer DP-OLED from moisture/oxygen and the organic layer protects the light emitting device layer DP-OLED from a foreign material such as dust particles. The inorganic layer may include a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer. The organic layer may include an acryl-based organic layer, but is not limited thereto.”)
It therefore would have been obvious to those having ordinary skill in the art before the effective filing date of the invention to provide two inorganic layers surround an organic layer as this was a known technique to those in view of Kim and would have been utilized for the purpose of the inorganic layers protect the light emitting device layer DP-OLED from moisture/oxygen and the organic layer protects the light emitting device layer DP-OLED from a foreign material such as dust particles. (Kim, [0068])
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Prior art made of record and not relied upon which is still considered pertinent to applicant's disclosure is cited in a current or previous PTO-892. The prior art cited in a current or previous PTO-892 reads upon the applicants claims in part, in whole and/or gives a general reference to the knowledge and skill of persons having ordinary skill in the art before the effective filing date of the invention. Applicant, when responding to this Office action, should consider not only the cited references applied in the rejection but also any additional references made of record.
In the response to this office action, the Examiner respectfully requests support be shown for any new or amended claims. More precisely, indicate support for any newly added language or amendments by specifying page, line numbers, and/or figure(s). This will assist The Office in compact prosecution of this application. The Office has cited particular columns, paragraphs, and/or line numbers in the applied rejection of the claims above for the convenience of the applicant. Citations are representative of the teachings in the art and are applied to the specific limitations within each claim, however other passages and figures may apply. Applicant, in preparing a response, should fully consider the cited reference(s) in its entirety and not only the cited portions as other sections of the reference may expand on the teachings of the cited portion(s).
Applicant Representatives are reminded of CFR 1.4(d)(2)(ii) which states “A patent practitioner (§ 1.32(a)(1) ), signing pursuant to §§ 1.33(b)(1) or 1.33(b)(2), must supply his/her registration number either as part of the S-signature, or immediately below or adjacent to the S-signature. The number (#) character may be used only as part of the S-signature when appearing before a practitioner’s registration number; otherwise the number character may not be used in an S-signature.” When an unsigned or improperly signed amendment is received the amendment will be listed in the contents of the application file, but not entered. The examiner will notify applicant of the status of the application, advising him or her to furnish a duplicate amendment properly signed or to ratify the amendment already filed. In an application not under final rejection, applicant should be given a two month time period in which to ratify the previously filed amendment (37 CFR 1.135(c) ).
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. Granting of After Final Interviews: “Interviews merely to restate arguments of record or to discuss new limitations which would require more than nominal reconsideration or new search should be denied.” See MPEP § 713.09.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL J JANSEN II whose telephone number is (571)272-5604. The examiner can normally be reached Normally Available Monday-Friday 9am-4pm EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Temesghen Ghebretinsae can be reached on 571-272-3017. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Michael J Jansen II/ Primary Examiner, Art Unit 2626