DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Species III, figure 4, reads on claims 1 -5, 7-12, 16-18, 20-23 and 26 in the reply filed on 08/04/2026 is acknowledged. Upon further review, the examiner withdraw claim 26 because it depends from withdrawn claim 25.
Drawings
Figure 1 should be designated by a legend such as --Prior Art-- because only that which is old is illustrated. See MPEP § 608.02(g). Corrected drawings in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The replacement sheet(s) should be labeled “Replacement Sheet” in the page header (as per 37 CFR 1.84(c)) so as not to obstruct any portion of the drawing figures. If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-5, 9-12, 16-18 and 22-23 are rejected under 35 U.S.C. 102(a) (1) as being anticipated by Shreepathi Bhat et al. (US 2021/0080986 and Shreepathi hereinafter).
Regarding claim 1, Shreepathi discloses a load [104, fig. 1] switch circuit [100, fig. 1a], comprising: a switching element [116], coupled between an input terminal [Vin/114] and an output terminal [Vout terminal/112] of the load switch circuit; and a controlling circuit [118/106], coupled to the switching element, and configured to regulate a current flowing [117] through the switching element to a set current limit [using current limit amplifier circuit 108], wherein the controlling circuit is further configured to control a loop formed [loop from 148/106/118] by the controlling circuit and the switching element based on a sensed signal [Vsense_CL] indicative of the current flowing through the switching element, so that the loop remains stable when a set current limit [par. 0021-0032] of the current flowing through the switching element is changed from a first set current limit [current limit operation mode] to a second set current limit [regular operation mode].
Regarding claim 2, Shreepathi discloses wherein the controlling circuit [fig. 1a] is configured to control a loop gain [using amplifier 118] of the loop based on the sensed signal so that the loop gain remains stable when the set current limit is changed from the first set current limit to the second set current limit.
Regarding claim 3, Shreepathi discloses [fig. 1a] further comprising: a current limit adjusting terminal [terminal at 136], coupled to a current limit adjustment element [137], wherein the set current limit is adjusted from the first set current limit to the second set current limit by adjusting the current limit adjustment element.
Regarding claim 4, Shreepathi discloses [fig. 1a, par. 0021-0032] wherein the controlling circuit is further configured to regulate the current flowing through the switching element to increase when it is less than the set current limit and decrease when it is greater than the set current limit based on the sensed signal.
Regarding claim 5, Shreepathi discloses [fig. 1a] wherein the controlling circuit comprises: an operational amplification circuit [108], configured to receive the sensed signal [Vsense_CL] and a reference signal [Vref_load] and is further configured to provide a controlling signal [CNRL] for regulating the current flowing through the switching element.
Regarding claim 9, Shreepathi discloses [fig. 1a] wherein the controlling circuit further comprises: a second transistor [138], coupled to the switching element and the operational amplification circuit, and configured to control the switching element based on the controlling signal, so as to adjust the current flowing through the switching element.
Regarding claim 10, Shreepathi discloses [fig. 1a] wherein the controlling circuit further comprises: a current feedback circuit [122], configured to sense the current flowing through the switching element and obtain a sensed current [117] indicative of the current flowing through the switching element, wherein the sensed signal is generated based on the sensed current.
Regarding claim 11, Shreepathi discloses a load [104, fig. 1a] switch circuit [100, fig. 1a], comprising: a switching element [116], coupled between an input terminal [114] and an output terminal [112] of the load switch circuit; and a controlling circuit [118/106], coupled to the switching element and forming a loop [loop from 148/106/118] with the switching element, and configured to regulate a current flowing [117] through the switching element to a set current limit [using 106, par. 0021-0032], wherein the controlling circuit is configured to control a gain [using amplifier 118] of the controlling circuit to be linearly proportional to the current flowing through the switching element, so that the loop remains stable when the set current limit is changed from a first set current limit [current limit operation mode] to a second set current limit [regular operation mode].
Regarding claim 12, Shreepathi discloses [fig. 1] wherein the controlling circuit is configured to control a loop gain [using amplifier 118] of the loop to remain stable when the set current limit is changed from the first set current limit to the second set current limit.
Regarding claim 16, Shreepathi discloses a controlling circuit [102, fig. 1a, par. 0021-0032] of a load [104] switch circuit [100], wherein the load switch circuit comprises a switching element [116] coupled between an input terminal [114] and an output terminal [112] of the load switch circuit, and wherein, the controlling circuit is coupled to the switching element, and is configured to regulate a set current limit [using 106] of a current flowing [117] through the switching element, wherein the controlling circuit is configured to control a loop formed [loop from 148/106/118] by the controlling circuit and the switching element based on a sensed signal [Vsense_CL] indicative of the current flowing through the switching element, so that the loop remains stable when the set current limit is changed from a first set current limit [current limit operation mode] to a second set current limit [regular operation mode].
Regarding claim 17, Shreepathi discloses [fig. 1a] configured to control a loop gain [using amplifier 118] of the loop based on the sensed signal so that the loop gain remains stable when the set current limit is changed from the first set current limit to the second set current limit.
Regarding claim 18, Shreepathi discloses [fig. 1a] comprising: an operational amplification circuit [108], configured to receive the sensed signal [Vsense_CL] and a reference signal [Vref_load] and further configured to provide a controlling signal [148] for regulating the current flowing through the switching element.
Regarding claim 22, Shreepathi discloses a controlling circuit [102, fig. 1a, par. 0021-0032] of a load switch circuit [100], wherein the load switch circuit comprises a switching element [116] which is coupled between an input terminal [114] and an output terminal [112] of the load switch circuit, and wherein, the controlling circuit is coupled to the switching element and forms a loop [loop from 148/106/118] with the switching element, and is configured to regulate the current flowing through the switching element to a set current limit [using 106], and wherein the controlling circuit is configured to control a gain [using 118] of the controlling circuit to be linearly proportional to the current flowing through the switching element, so that the loop remains stable when the set current limit is changed from a first set current limit [current limit operation mode] to a second set current limit [regular operation mode].
Regarding claim 23, Shreepathi discloses configured to control a loop gain [using 108] of the loop to remain stable when the set current limit is changed from a first set current limit [current limit operation mode] to a second set current limit [regular operation mode].
Claims 1-4, 11-12, 16-17 and 22-23 are rejected under 35 U.S.C. 102(a) (1) as being anticipated by Jordanger et al. (US 2021/0288621 and Jordanger hereinafter).
Regarding claim 1, Jordanger discloses a load switch circuit [201, fig. 2, par. 0035-0040], comprising: a switching element [203], coupled between an input terminal [Vin/216] and an output terminal [VOUT terminal] of the load switch circuit; and a controlling circuit [202/204/212/214], coupled to the switching element, and configured to regulate a current flowing [current flow through 203] through the switching element to a set current limit [using current limit IL], wherein the controlling circuit is further configured to control a loop formed [loop 202/204/203] by the controlling circuit and the switching element based on a sensed signal [sense signal at 207] indicative of the current flowing through the switching element, so that the loop remains stable when a set current limit of the current flowing through the switching element is changed from a first set current limit [current limit value CS2A] to a second set current limit [current limit value CS2B].
Regarding claim 2, Jordanger discloses [fig. 2] wherein the controlling circuit is configured to control a loop gain [using control amplifier 206] of the loop based on the sensed signal so that the loop gain remains stable when the set current limit is changed from the first set current limit to the second set current limit [par. 0035-0040].
Regarding claim 3, Jordanger discloses [fig. 2] further comprising: a current limit adjusting terminal [gate terminal], coupled to a current limit adjustment element [MP1/MP2], wherein the set current limit is adjusted from the first set current limit to the second set current limit by adjusting the current limit adjustment element [par. 0035-0040].
Regarding claim 4, Jordanger discloses [fig. 2] wherein the controlling circuit is further configured to regulate the current flowing through the switching element to increase when it is less than the set current limit and decrease when it is greater than the set current limit based on the sensed signal [par. 0035-0040].
Regarding claim 11, Jordanger discloses a load switch circuit [201, fig. 2], comprising: a switching element [203], coupled between an input terminal [VIN] and an output terminal [VOUT] of the load switch circuit; and a controlling circuit [204/206\202], coupled to the switching element and forming a loop [loop 202/204/203] with the switching element, and configured to regulate a current flowing [current flow through 203] through the switching element to a set current limit [using current limit IL], wherein the controlling circuit is configured to control a gain [206] of the controlling circuit to be linearly proportional to the current flowing through the switching element, so that the loop remains stable when the set current limit is changed from a first set current limit [current limit value CS2A] to a second set current limit [current limit value CS2B].
Regarding claim 12, Jordanger discloses [fig. 2] wherein the controlling circuit is configured to control a loop gain [using 206] of the loop to remain stable when the set current limit is changed from the first set current limit to the second set current limit.
Regarding claim 16, Jordanger discloses a controlling circuit of a load switch circuit [200, fig. 2], wherein the load switch circuit comprises a switching element [203] coupled between an input terminal [VIN] and an output terminal [VOUT] of the load switch circuit, and wherein, the controlling circuit is coupled to the switching element, and is configured to regulate a set current limit [IL] of a current flowing [current flowing through 203] through the switching element, wherein the controlling circuit is configured to control a loop formed [loop 202/204/203] by the controlling circuit and the switching element based on a sensed signal [sense signal at 207] indicative of the current flowing through the switching element, so that the loop remains stable when the set current limit is changed from a first set current limit [current limit value CS2A] to a second set current limit [current limit value CS2A].
Regarding claim 17, Jordanger discloses [fig. 2] configured to control a loop gain [using 206] of the loop based on the sensed signal so that the loop gain remains stable when the set current limit is changed from the first set current limit to the second set current limit.
Regarding claim 22, Jordanger discloses a controlling circuit of a load switch circuit [200, fig. 2], wherein the load switch circuit comprises a switching element [203] which is coupled between an input terminal [VIN] and an output terminal [VOUT] of the load switch circuit, and wherein, the controlling circuit is coupled to the switching element and forms a loop [loop 202/204/203] with the switching element, and is configured to regulate the current flowing through the switching element to a set current limit [IL], and wherein the controlling circuit is configured to control a gain [using 206] of the controlling circuit to be linearly proportional to the current flowing through the switching element, so that the loop remains stable when the set current limit is changed from a first set current limit [current limit value CS2A] to a second set current limit [current limit value CS2B].
Regarding claim 23, Jordanger discloses [fig. 2] configured to control a loop gain [using 206] of the loop to remain stable when the set current limit is changed from a first set current limit to a second set current limit.
Allowable Subject Matter
Claims 7-8 and 20-21 are objected to as being dependent upon a rejected base claim but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claims 7 and 20, Shreepathi discloses [fig. 1a] wherein the operational amplification circuit comprises: a first-stage differential operational amplification circuit [108], configured to receive the sensed signal [Vsense_CL] and the reference signal [Vref_load], but silent with respect to the above structure in combination with a second-stage differential operational amplification circuit, coupled in series to the first-stage differential operational amplification circuit, and configured to provide the controlling signal.
Conclusion
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/METASEBIA T RETEBO/Primary Examiner, Art Unit 2836
