DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claim 1 of 19/009,799
A system comprising: a substrate; one or more electronic components on the substrate; a dam surrounding the one or more electronic components, the dam comprising a dam material; an encapsulation material in a space contained by the dam, the encapsulation material encapsulating the one or more electronic components, the encapsulating material comprising a first surface; and a cover above the first surface of the encapsulation material that encapsulates the one or more electronic components; wherein the cover comprises an electrically conductive material and an electrically non-conductive material.
Claim 1 of 11882411
A method for covering one or more electronic components on a substrate, the method comprising: providing a dam on the substrate, wherein the dam is provided around the one or more electronic components, the dam comprising a dam material, wherein the dam material comprises an electrically conductive material; providing a liquid encapsulation material in a space contained by the dam, wherein the liquid encapsulation material is provided to encapsulate the one or more electronic components, the liquid encapsulation material configured to solidify to form a solidified encapsulating material having a first surface; and after the liquid encapsulation material is solidified to form the solidified encapsulating material encapsulating the one or more electronic components, applying a cover material on the first surface of the solidified encapsulation material; wherein the cover material forms a first layer of a cover, the cover comprising a second layer, wherein one of the first layer and the second layer is a non-conductive layer, and another one of the first layer and the second layer is a conductive layer.
Claim 12 of 19/009,799
A system comprising: a substrate; an electronic component on the substrate; a dam surrounding the electronic component, the dam comprising a dam material; an encapsulation material in a space contained by the dam, the encapsulation material encapsulating the electronic component, the encapsulating material comprising a first surface; and a cover above the first surface of the encapsulation material that encapsulates the electronic component; wherein the cover comprises a first layer and a second layer, wherein one of the first layer and the second layer comprises an electrically conductive material.
Claim 13 of 19/009,799
The system of claim 12, wherein another one of the first layer and the second layer comprises an electrically non-conductive material.
Claim 22 of 11882411
A system comprising: a substrate; one or more electronic components on the substrate; a dam on the substrate, the dam surrounding the one or more electronic components, the dam comprising a dam material, wherein the dam material comprises an electrically conductive material; an encapsulation material in a space contained by the dam, the encapsulation material encapsulating the one or more electronic components, the encapsulating material comprising a first surface; a cover material disposed on the first surface of the encapsulation material that encapsulates the one or more electronic components; wherein the cover material forms a first layer of a cover, the cover comprising a second layer, wherein one of the first layer and the second layer is a non-conductive layer, and another one of the first layer and the second layer is a conductive layer.
Claims 1 & 12-13 of application 19/009,799 (hereinafter referred to as ‘799) are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1 & 22 of U.S. Patent No. 11882411 (hereinafter referred to as ‘411).
Although the claims at issue are not identical, they are not patentably distinct from each other because ‘799 claims 1 & 12-13 are broader recitations of ‘411 claims 1 & 22. Therefore, the recitations of ‘411 claims 1 & 22 are encompassed within the recitations of ‘799 claims 1 & 12-13.
Claim 1 of 19/009,799
A system comprising: a substrate; one or more electronic components on the substrate; a dam surrounding the one or more electronic components, the dam comprising a dam material; an encapsulation material in a space contained by the dam, the encapsulation material encapsulating the one or more electronic components, the encapsulating material comprising a first surface; and a cover above the first surface of the encapsulation material that encapsulates the one or more electronic components; wherein the cover comprises an electrically conductive material and an electrically non-conductive material.
Claim 1 of 12273688
A method for covering one or more electronic components on a substrate, the method comprising: providing a dam on the substrate, wherein the dam is provided around the one or more electronic components, the dam comprising a dam material; providing an encapsulation material in a space contained by the dam, wherein the encapsulation material is provided to encapsulate the one or more electronic components, the encapsulation material having a first surface; and after the encapsulation material is provided to encapsulate the one or more electronic components, applying a cover on the first surface of the encapsulation material; wherein the cover comprises an electrically conductive material and an electrically non-conductive material.
Claim 18 of 12273688
A system comprising: a substrate; one or more electronic components on the substrate; a dam on the substrate, the dam surrounding the one or more electronic components, the dam comprising a dam material; an encapsulation material in a space contained by the dam, the encapsulation material encapsulating the one or more electronic components, the encapsulating material comprising a first surface; a cover disposed on the first surface of the encapsulation material that encapsulates the one or more electronic components; wherein the cover comprises an electrically conductive material and an electrically non-conductive material.
Claim 29 of 12273688
A system comprising: a substrate; one or more electronic components on the substrate; a dam on the substrate, the dam surrounding the one or more electronic components, the dam comprising a dam material; an encapsulation material in a space contained by the dam, the encapsulation material encapsulating the one or more electronic components, the encapsulating material comprising a first surface; a cover disposed on the first surface of the encapsulation material that encapsulates the one or more electronic components; wherein the cover comprises a first layer and a second layer, wherein one of the first layer and the second layer is an electrically non-conductive layer, and another one of the first layer and the second layer is an electrically conductive layer.
Claim 12 of 19/009,799
A system comprising: a substrate; an electronic component on the substrate; a dam surrounding the electronic component, the dam comprising a dam material; an encapsulation material in a space contained by the dam, the encapsulation material encapsulating the electronic component, the encapsulating material comprising a first surface; and a cover above the first surface of the encapsulation material that encapsulates the electronic component; wherein the cover comprises a first layer and a second layer, wherein one of the first layer and the second layer comprises an electrically conductive material.
Claim 13 of 19/009,799
The system of claim 12, wherein another one of the first layer and the second layer comprises an electrically non-conductive material.
Claim 17 of 12273688
A method for covering one or more electronic components on a substrate, the method comprising: providing a dam on the substrate, wherein the dam is provided around the one or more electronic components, the dam comprising a dam material; providing an encapsulation material in a space contained by the dam, wherein the encapsulation material is provided to encapsulate the one or more electronic components, the encapsulation material having a first surface; and after the encapsulation material is provided to encapsulate the one or more electronic components, applying a cover on the first surface of the encapsulation material; wherein the cover comprises a first layer and a second layer, wherein one of the first layer and the second layer is an electrically non-conductive layer, and another one of the first layer and the second layer is an electrically conductive layer.
Claims 1 & 12-13 of application 19/009,799 (hereinafter referred to as ‘799) are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 17-18 & 29 of U.S. Patent No. 12273688 (hereinafter referred to as ‘688).
Although the claims at issue are not identical, they are not patentably distinct from each other because ‘799 claims 1 & 12-13 are broader recitations of ‘688 claims 1, 17-18 & 29. Therefore, the recitations of ‘688 claims 1, 17-18 & 29 are encompassed within the recitations of ‘799 claims 1 & 12-13.
Claims 1-23 would be allowable once double patenting rejection is overcome.
Contact
Any inquiry concerning this communication or earlier communications from the examiner should be directed to GEORGE C MONIKANG whose telephone number is (571)270-1190. The examiner can normally be reached Mon. - Fri., 9AM-5PM, ALT. Fridays off.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Carolyn R Edwards can be reached at 571-270-7136. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/GEORGE C MONIKANG/Primary Examiner, Art Unit 2692 08/20/2026
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