Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-2 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lei et al., CN101610625 (hereinafter referred to as Lei).
In regards to claim 1, Lei teaches a solid-state circuit breaker (dynamic energy-saving lighting power supply; [Fig. 1]), comprising a first switch (switch K1; [Fig. 1]), a second switch (emitter tube T1; [Fig. 2]), a first capacitor (capacitor Ci; [Fig. 2]), and a first diode (diode D4; [Fig. 2]), wherein, a first terminal of the first switch (left node of K1; [Fig. 1]) is connected to a positive electrode of an input terminal (Uin; [Fig. 1]) (implicit; [Fig. 1]), a second terminal of the first switch (right node of K1; [Fig. 1]) is connected to a first terminal of the second switch (left node of T1; [Fig. 2]) (implicit; [Fig. 1 & 2]), a second terminal of the second switch (right node of T1; [Fig. 2]) is connected to a positive electrode of an output terminal (upper connection of OUT; [Fig. 2]) (implicit; [Fig. 2]), a first terminal of the first capacitor (top node of Ci; [Fig. 2]) is connected to the first terminal of the second switch (implicit; [Fig. 2]), a second terminal of the first capacitor (bottom node of Ci; [Fig. 2]) is connected to a negative electrode of the input terminal (lower connection of IN; [Fig. 2]) (implicit; [Fig. 2]), a cathode of the first diode (top node of D4; [Fig. 2]) is connected to the second terminal of the second switch (implicit; [Fig. 2]), and an anode of the first diode (bottom node of D4; [Fig. 2]) is connected to a negative electrode of the output terminal (lower connection of OUT; [Fig. 2]) (implicit; [Fig. 2]).
In regards to claim 2, Lei teaches the solid-state circuit breaker of claim 1, further comprising a transient voltage suppressor (TVS1; [Fig. 2]) and a second diode (diode D1; [Fig. 2]), wherein the transient voltage suppressor is connected in parallel with the first capacitor (implicit; [Fig. 2]), the second diode is connected in parallel with the second switch (implicit; [Fig. 2]), and a cathode of the second diode (left node of D1; [Fig. 2]) is connected to the first terminal of the second switch (implicit; [Fig. 2]) and an anode of the second diode (right node of D1; [Fig. 2]) is connected to the second terminal of the second switch (implicit; [Fig. 2]).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lei et al., CN101610625 (hereinafter referred to as Lei) in view of Barone, US5742495 (hereinafter referred to as Barone).
In regards to claim 5, Lei teaches wherein: the first switch is an intelligent mechanical switch (solid-state relay; [Pg. 6, Para. 1]) configured to disconnect a contact of a main circuit though an electrical control command (control of the solid-state relay) and having a current breaking capability (implicit of the rating of a solid-state relay).
Lei does not teach wherein: the second switch is a metal oxide semiconductor field effect transistor (MOSFET) with an anti-parallel diode or an insulated-gate bipolar transistor (IGBT).
Barone teaches wherein: the second switch is a metal oxide semiconductor field effect transistor (MOSFET) (MOSFET; [Col. 15, Ln. 46-49]) with an anti-parallel diode or an insulated-gate bipolar transistor (IGBT) (IGBT; [Col. 15, Ln. 46-49]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Lei in order to incorporate wherein: the second switch is a metal oxide semiconductor field effect transistor (MOSFET) with an anti-parallel diode or an insulated-gate bipolar transistor (IGBT) as taught by Barone. The motivation for doing so would be engineering design choice in order to electrically control the switch quickly.
Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lei et al., CN101610625 (hereinafter referred to as Lei) in view of Mayama, US20020093293 (hereinafter referred to as Mayama).
In regards to claim 6, Lei does not teach wherein: the first diode can also be replaced by a silicon controlled rectifier.
Mayama teaches wherein: the first diode can also be replaced by a silicon controlled rectifier (substitute for a diode… SCR; [0055]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Lei in order to incorporate wherein: the first diode can also be replaced by a silicon controlled rectifier as taught by Mayama. The motivation for doing so would be engineering design choice for selecting a diode functioning component.
Claim(s) 3-4 and 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lei et al., CN101610625 (hereinafter referred to as Lei) in view of Cai et al., CN216121792 (hereinafter referred to as Cai) and in further view of McWilliams et al., US3651378 (hereinafter referred to as McWilliams).
In regards to claim 3, Lei does not teach the solid-state circuit breaker of claim 2, further comprising a first overcurrent protection apparatus and a second overcurrent protection apparatus wherein the first overcurrent protection apparatus is connected in series with the first capacitor, and the second overcurrent protection apparatus is connected in series with the first diode.
Cai teaches the solid-state circuit breaker of claim 2, further comprising a first overcurrent protection apparatus (fuse F2; [Pg. 4, Para. 7-Pg. 5, Para. 1]) wherein the first overcurrent protection apparatus is connected in series with the first capacitor (connected between the resistor R1 and the capacitor C5; [Pg. 4, Para. 7-Pg. 5, Para. 1]).
Cai does not teach the solid-state circuit breaker of claim 2, further comprising a second overcurrent protection apparatus wherein the second overcurrent protection apparatus is connected in series with the first diode.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Lei in order to incorporate the solid-state circuit breaker of claim 2, further comprising a first overcurrent protection apparatus wherein the first overcurrent protection apparatus is connected in series with the first capacitor as taught by Cai. The motivation for doing so would be to prevent a capacitor short circuit by allowing the fuse to create an open circuit from a fatal fault.
McWilliams teaches the solid-state circuit breaker of claim 2, further comprising a second overcurrent protection apparatus (fuse 40 within unit 38 for protection; [Col. 2, Ln. 30-34] & [Fig. 1]) wherein the second overcurrent protection apparatus is connected in series with the first diode (implicit; [Fig. 1]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Lei & Cai in order to incorporate a second overcurrent protection apparatus wherein the second overcurrent protection apparatus is connected in series with the first diode as taught by McWilliams. The motivation for doing so would be to provide protection to the diode in order to have a protection against transients on the positive output electrode.
In regards to claim 4, Lei teaches the solid-state circuit breaker of claim 3, further comprising a first inductor (inductance L1; [Fig. 2]) and a second inductor (inductance Lo; [Fig. 2]), wherein, the first inductor is connected in series between the positive electrode of the input terminal and a node where the first terminal of the second switch and the first terminal of the first capacitor are connected (implicit; [Fig. 2]), and the second inductor is connected in series between a node where the second terminal of the second switch and a first terminal of the first inductor are connected and the positive electrode of the output terminal (implicit; [Fig. 2]).
In regards to claim 7, Lei does not teach wherein: the first overcurrent protection apparatus and the second overcurrent protection apparatus are fuses.
Cai teaches wherein: the first overcurrent protection apparatus is a fuse (fuse F2; [Pg. 4, Para. 7-Pg. 5, Para. 1]).
Cai does not teach wherein: the second overcurrent protection apparatus is a fuse.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Lei in order to incorporate wherein: the first overcurrent protection apparatus is a fuse as taught by Cai. The motivation for doing so would be to prevent a capacitor short circuit by allowing the fuse to create an open circuit from a fatal fault.
McWilliams teaches wherein: the second overcurrent protection apparatus is a fuse (fuse 40; [Col. 2, Ln. 30-34] & [Fig. 1]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Lei & Cai in order to incorporate wherein: the second overcurrent protection apparatus is a fuse as taught by McWilliams. The motivation for doing so would be to provide protection to the diode in order to have a protection against transients on the positive output electrode.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SAMANTHA L FAUBERT whose telephone number is (703)756-1311. The examiner can normally be reached Monday - Friday 8AM - 5PM.
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SAMANTHA LYNETTE FAUBERT
Examiner
Art Unit 2836
/CRYSTAL L HAMMOND/Supervisory Primary Examiner, Art Unit 2838
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