Prosecution Insights
Last updated: April 19, 2026
Application No. 19/010,693

DISPLAY DEVICE AND METHOD FOR OPERATING PIXELS OF THE DISPLAY DEVICE

Non-Final OA §103§112
Filed
Jan 06, 2025
Examiner
PIZIALI, JEFFREY J
Art Unit
2628
Tech Center
2600 — Communications
Assignee
LG Display Co., Ltd.
OA Round
1 (Non-Final)
42%
Grant Probability
Moderate
1-2
OA Rounds
3y 1m
To Grant
47%
With Interview

Examiner Intelligence

Grants 42% of resolved cases
42%
Career Allow Rate
247 granted / 587 resolved
-19.9% vs TC avg
Moderate +5% lift
Without
With
+5.1%
Interview Lift
resolved cases with interview
Typical timeline
3y 1m
Avg Prosecution
22 currently pending
Career history
609
Total Applications
across all art units

Statute-Specific Performance

§101
1.5%
-38.5% vs TC avg
§103
37.1%
-2.9% vs TC avg
§102
18.9%
-21.1% vs TC avg
§112
41.5%
+1.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 587 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file. Claim Interpretation The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph: An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked. As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph: (A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function; (B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and (C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function. Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function. Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function. Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “demultiplexer unit(s)” in claims 1 and 19. Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-11 and 14-19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. Claim 1 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, due to the claimed subject matter: “a plurality of demultiplexer unit.” It would be unclear to one having ordinary skill in the art whether the claim requires multiple units, or just a single unit. The term “adjacent” in claim 2 is a relative term which renders the claim indefinite. The term “adjacent” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. The commonly accepted definition of “adjacent” is “lying near, close” (e.g., see Random House dictionary, Dictionary.com). It would be unclear to one having ordinary skill in the art precisely how “near” or “close” the corresponding elements must be before they would be considered “adjacent,” as instantly claimed. Claim 6 recites the limitation “the edge area.” There is insufficient antecedent basis for this limitation in the claim. The claim contains no earlier recitation or limitation of an “edge area.” Claim 6 recites the limitation “the center area.” There is insufficient antecedent basis for this limitation in the claim. The claim contains no earlier recitation or limitation of a “center area.” Claim 7 recites the limitation “the same pulse width.” There is insufficient antecedent basis for this limitation in the claim. The claim contains no earlier recitation or limitation of a “same pulse width.” Claim 15 recites the limitation “the third scan signal.” There is insufficient antecedent basis for this limitation in the claim. The claim contains no earlier recitation or limitation of a “third scan signal.” Claim 15 recites the limitation “the light emission control signal.” There is insufficient antecedent basis for this limitation in the claim. The claim contains no earlier recitation or limitation of a “light emission control signal.” Claim 16 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, due to having two periods (see lines 3 and 6). Claim 16 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, due to the claimed subject matter: “a light emission control signals.” It would be unclear to one having ordinary skill in the art whether the claim requires multiple signals, or just a single signal. Claim 19 recites the limitation “the plurality of demultiplexer units.” There is insufficient antecedent basis for this limitation in the claim. The claim contains no earlier recitation or limitation of a “the plurality of demultiplexer units.” Claim 19 recites the limitation “the same sizes.” There is insufficient antecedent basis for this limitation in the claim. The claim contains no earlier recitation or limitation of a “same size.” Any remaining claim(s) is/are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being dependent upon one or more rejected base claims. The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claim 19 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Claim 19 recites, “each of the plurality of demultiplexer units has the same sizes.” The above subject matter was not described in the original disclosure of the invention. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 1, 5-11, 15, 16, and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Ko et al (US 10,004,124 B1) in view of Park et al (US 2018/0083078 A1) and Kim et al (US 2024/0087519 A1). Regarding claim 1, Ko discloses a display device comprising: a display panel [e.g., Fig. 1: 100] in which a plurality of pixels [e.g., Fig. 2: P] are disposed; a data driver [e.g., Fig. 1: 102] supplying a data voltage [e.g., Fig. 6: Vdata] to the plurality of pixels; a gate driver including a light-emitting control driver [e.g., Fig. 1: 104], a first scan driver [e.g., Fig. 1: 103, Fig. 26: ST(1)], and a second scan driver [e.g., Fig. 1: 103, Fig. 26: ST(2)]; and wherein each of the plurality of pixels includes: a light-emitting element [e.g., Fig. 6: OLED] including an anode electrode [e.g., Column 9, Lines 15-26: anode], a cathode electrode [e.g., Column 9, Lines 15-26: cathode], and a light-emitting layer [e.g., Column 9, Lines 15-26: emission layer EML] between the anode electrode and the cathode electrode; and a pixel circuit configured to control the light-emitting element, wherein the pixel circuit includes: a capacitor [e.g., Fig. 6: Cst] connected to and disposed between a first node [e.g., Fig. 6: N1] and a second node [e.g., Fig. 6: N2]; and a driving transistor [e.g., Fig. 6: DT] including a gate electrode connected to the second node, a first electrode receiving a driving voltage [e.g., Fig. 6: VDD], and a second electrode connected to a third node [e.g., Fig. 6: N3], a first transistor [e.g., Fig. 6: T1] is turned on by a first scan signal [e.g., Fig. 6: 1st SCAN(n)] output from the first scan driver and applies the data voltage to the first node; a second transistor [e.g., Fig. 6: T2] is turned on by a second scan signal [e.g., Fig. 6: 2nd SCAN(n)] output from the e.g., see Column 6, Line 30 – Column 34, Line 45). Ko doesn’t appear to expressly disclose a plurality of demultiplexer unit is disposed between the data driver and a display area of the display panel, as instantly claimed. However, Park discloses a plurality of demultiplexer unit [e.g., Fig. 5: DS1-2; Fig. 7: 121; Fig. 9: SD3-4] is disposed between the data driver [e.g., Fig. 5: CH1-4 driver; Fig. 7: 121; Fig. 9: 14A driver; Paragraphs 87-88: source drive IC SDIC, DACs] and a display area [e.g., Fig. 9: 14A_1-2 area] of the display panel [e.g., Fig. 7: 10], wherein the demultiplexer unit distribute the data voltage [e.g., Paragraph 60: data voltage] output from one channel [e.g., Fig. 5: CH1-4] of the data driver in a time division manner [e.g., Fig. 6: DMUX1-2 alternate in a time division manner] and supplies to the plurality of pixels [e.g., Fig. 9: 14A_1-2] (e.g., see Paragraphs 40-121). Ko and Park are analogous art because they are from the shared inventive field of light emitting diode display devices. Therefore, it would have been obvious to one having ordinary skill in the art at the time of filing to combine Park’s plurality of demultiplexer unit with Ko’s display, so as to provide a luminance uniformity. Moreover, it would have been obvious to one of ordinary skill in the art at the time of filing because all the claimed elements were known in the prior art and one skilled in the art could have combined Park’s plurality of demultiplexer unit with Ko’s display as claimed by known methods with no change in their respective functions, and the combination would have yielded predictable results to one of ordinary skill in the art at the time of the filing. See KSR International Co. v. Teleflex Inc., et al., Docket No. 04-1350 (U.S. 30 April 2007). Ko and Park don’t appear to expressly disclose a second transistor is turned on by a second scan signal output from the second scan driver, as instantly claimed. However, Kim discloses a pixel circuit configured to control the light-emitting element [e.g., Fig. 2: OLED], wherein the pixel circuit includes: a capacitor [e.g., Fig. 2: C2] connected to and disposed between a first node [e.g., Fig. 2: N1] and a second node [e.g., Fig. 2: N2]; and a driving transistor [e.g., Fig. 2: TD] including a gate electrode connected to the second node, a first electrode receiving a driving voltage [e.g., Fig. 2: VDD], and a second electrode connected to a third node [e.g., Fig. 2: N3], a first transistor [e.g., Fig. 2: T1] is turned on by a first scan signal [e.g., Fig. 2: SCAN[n] ] output from the first scan driver [e.g., Fig. 2: inherent SCAN[n] driver] and applies the data voltage to the first node; a second transistor [e.g., Fig. 2: T4] is turned on by a second scan signal [e.g., Fig. 2: SCAN[n-1] ] output from the second scan driver [e.g., Fig. 2: inherent SCAN[n-1] driver] and is diode-connected to the driving transistor (e.g., see Paragraphs 27-75). Ko, Park and Kim are analogous art because they are from the shared inventive field of light emitting diode display devices. Therefore, it would have been obvious to one having ordinary skill in the art at the time of filing to combine Kim’s pixel circuitry with Ko’s display device, so as to provide a more accurate pixel compensation result. Moreover, it would have been obvious to one of ordinary skill in the art at the time of filing because all the claimed elements were known in the prior art and one skilled in the art could have combined Kim’s pixel circuitry with Ko’s display device as claimed by known methods with no change in their respective functions, and the combination would have yielded predictable results to one of ordinary skill in the art at the time of the filing. See KSR International Co. v. Teleflex Inc., et al., Docket No. 04-1350 (U.S. 30 April 2007). Regarding claim 5, Ko discloses the pixel circuit is configured to supply a reference voltage [e.g., Figs. 6, 7: Vref] to the first node and the anode electrode during a portion of an operation period of the pixel circuit (e.g., see Figs. 8A, 8C; Column 14, Line 1 – Column 16, Line 67). Regarding claim 6, Park discloses the demultiplexer unit supplies a signal [e.g., Paragraph 60: data voltage] to the display area so that no signal delay occurs between the edge area [e.g., Fig. 9: 14A_1-2 edge area] and the center area [e.g., Fig. 9: 14A_1-2 center area] of the display area (e.g., see Paragraphs 40-121). Regarding claim 7, Ko discloses the first scan signal and the second scan signal have the same pulse width (e.g., see Fig. 7; Column 14, Line 1 – Column 16, Line 67). Kim discloses the first scan signal and the second scan signal have different phases and the same pulse width (e.g., see Figs. 4-5; Paragraphs 27-75). Regarding claim 8, Kim discloses the pixel circuit operates in a driving period including an initialization period [e.g., Fig. 3], a sampling period [e.g., Fig. 4], a holding period [e.g., Fig. 5], and a light emission period [e.g., Fig. 6], wherein each of the initialization period, the sampling period, the holding period, and the light-emission period is separately activated based on the first scan signal, the second scan signal, a third scan signal [e.g., Figs. 3-4: COMP[n] ] having a different pulse width from the pulse width of each of the first scan signal and the second scan signal, and a light-emission control signal [e.g., Fig. 6: EM[n] ] (e.g., see Paragraphs 27-75). Regarding claim 9, Kim discloses the pulse width of the first scan signal and the second scan signal is smaller than the pulse width of the third scan signal (e.g., see Figs. 3-6; Paragraphs 27-75). Regarding claim 10, Ko discloses the light-emission control signal includes: a first light-emission control signal [e.g., Fig. 6: 1st EM[n] ]; and a second light-emission control signal [e.g., Fig. 6: 2nd EM[n] ] having a different phase from a phase of the first light-emission control signal (e.g., see Column 14, Line 1 – Column 16, Line 67). Regarding claim 11, Ko discloses a pulse width of the first light-emission control signal is equal to a pulse width of the second light-emission control signal (e.g., see Fig. 6; Column 14, Line 1 – Column 16, Line 67). Regarding claim 15, Ko discloses the pixel circuit further includes: a third transistor [e.g., Fig. 6: T2] connected to and disposed between the second node and the third node, wherein the third transistor is turned on in response to the third scan signal [e.g., Fig. 6: 3rd SCAN(n)] to connect the gate electrode and a drain electrode of the driving transistor to form a diode path using the driving transistor; a fourth transistor [e.g., Fig. 6: T4] turned on in response to the light-emission control signal [e.g., Fig. 6: EM(n&n+1)] to electrically connect the driving transistor to the light-emitting element; and a fifth transistor [e.g., Fig. 6: T5] turned on in response to the third scan signal to initialize the light-emitting element (e.g., see Column 6, Line 30 – Column 34, Line 45). Regarding claim 16, Ko discloses the display panel further includes a plurality of data lines [e.g., Fig. 1: 11], a plurality of scan lines [e.g., Fig. 1: 12], and a plurality of light-emission control lines [e.g., Fig. 1: 13], each connected to a plurality of pixels [e.g., Fig. 2: P]. wherein the gate driver sequentially supplies the first and the second scan signals to the plurality of scan lines and sequentially supplies a light-emission control signals [e.g., Fig. 7: EM(n&n+1)] to the plurality of light-emission control lines (e.g., see Column 6, Line 30 – Column 34, Line 45). Regarding claim 19, Park discloses each of the plurality of demultiplexer units has the same sizes (e.g., see Figs. 5, 9; Paragraphs 40-121). Claims 2-4 are rejected under 35 U.S.C. 103 as being unpatentable over Ko et al (US 10,004,124 B1) in view of Park et al (US 2018/0083078 A1) and Kim et al (US 2024/0087519 A1) as applied to claim 1 above, and further in view of Won et al (US 2018/0151633 A1). Regarding claim 2, Ko, Park and Kim don’t appear to expressly disclose a bank layer, as instantly claimed. However, Won discloses a bank layer [e.g., Fig. 2: 138] formed of an opaque material to prevent optical interference between adjacent pixels in the plurality of pixels (e.g., see Paragraphs 44-45). Ko, Park, Kim and Won are analogous art because they are from the shared inventive field of light emitting diode display devices. Therefore, it would have been obvious to one having ordinary skill in the art at the time of filing to combine Won’s bank layer with Ko’s pixels, so as to provide a clear image. Moreover, it would have been obvious to one of ordinary skill in the art at the time of filing because all the claimed elements were known in the prior art and one skilled in the art could have combined Won’s bank layer with Ko’s pixels as claimed by known methods with no change in their respective functions, and the combination would have yielded predictable results to one of ordinary skill in the art at the time of the filing. See KSR International Co. v. Teleflex Inc., et al., Docket No. 04-1350 (U.S. 30 April 2007). Regarding claim 3, Won discloses the bank layer include a black material (e.g., see Paragraphs 44-45). Regarding claim 4, Won discloses the bank layer includes a light-shielding material made of a combination of two or more of a color pigment, organic black, or carbon (e.g., see Paragraphs 44-45). Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Ko et al (US 10,004,124 B1) in view of Park et al (US 2018/0083078 A1) and Kim et al (US 2024/0087519 A1) as applied to claim 1 above, and further in view of Kim et al (US 2014/0375616 A1). Regarding claim 14, Ko, Park and Kim (‘519) don’t appear to expressly disclose the first scan signal and the second scan signal have a pulse width of less than 1 horizontal period, as instantly claimed. However, Kim (‘616) discloses the first scan signal [e.g., Fig. 4: S1] and the second scan signal [e.g., Fig. 4: S2] have a pulse width [e.g., Fig. 4: S1, S2 low level pulse width] of less than 1 horizontal period [e.g., Fig. 4: 1H] (e.g., see Paragraph 54-91). Ko, Park, Kim (‘519) and Kim (‘616) are analogous art because they are from the shared inventive field of light emitting diode display devices. Therefore, it would have been obvious to one having ordinary skill in the art at the time of filing to combine Kim (‘616)’s shortened pulse width with Ko’s and Kim (‘519)’s scan signals, so as to reduce power consumption and/or manufacturing cost. Moreover, it would have been obvious to one of ordinary skill in the art at the time of filing because all the claimed elements were known in the prior art and one skilled in the art could have combined Kim (‘616)’s shortened pulse width with Ko’s and Kim (‘519)’s scan signals as claimed by known methods with no change in their respective functions, and the combination would have yielded predictable results to one of ordinary skill in the art at the time of the filing. See KSR International Co. v. Teleflex Inc., et al., Docket No. 04-1350 (U.S. 30 April 2007). Claims 17 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Ko et al (US 10,004,124 B1) in view of Park et al (US 2018/0083078 A1) and Kim et al (US 2024/0087519 A1) as applied to claim 1 above, and further in view of Choe et al (US 2021/0151542 A1). Regarding claim 17, Ko, Park and Kim (‘519) don’t appear to expressly disclose the display panel is recessed inwardly, as instantly claimed. However, Choe discloses the display panel [e.g., Fig. 4: 100] has a shape in which at least a portion [e.g., Fig. 4: DNT, NNDA] of one side [e.g., Fig. 4: top side] of the display panel is recessed inwardly in a plan view [e.g., Fig. 4] of the display panel (e.g., see Paragraphs 83-99). Ko, Park, Kim (‘519) and Choe are analogous art because they are from the shared inventive field of light emitting diode display devices. Therefore, it would have been obvious to one having ordinary skill in the art at the time of filing to combine Choe’s recessed display shape with Ko’s display device, so that a display area of the display panel may be formed so as to not overlap with an optical sensor. Moreover, it would have been obvious to one of ordinary skill in the art at the time of filing because all the claimed elements were known in the prior art and one skilled in the art could have combined Choe’s recessed display shape with Ko’s display device as claimed by known methods with no change in their respective functions, and the combination would have yielded predictable results to one of ordinary skill in the art at the time of the filing. See KSR International Co. v. Teleflex Inc., et al., Docket No. 04-1350 (U.S. 30 April 2007). Regarding claim 16, Choe discloses the display panel has a shape in which at least a portion [e.g., Fig. 4: DNT, NNDA] of one side [e.g., Fig. 4: top side] of the display panel is recessed inwardly of a remaining portion [e.g., Fig. 4: DA] of the side by a first length [e.g., Fig. 4: length of DNT, NNDA] in a plan view [e.g., Fig. 4] of the display panel (e.g., see Paragraphs 83-99). Election/Restrictions Applicant’s election without traverse of Species 1, 8 and 9 in the reply filed on 21 October 2025 is acknowledged. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The documents listed on the attached 'Notice of References Cited' are cited to further evidence the state of the art pertaining to display devices. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jeff Piziali whose telephone number is (571)272-7678. The examiner can normally be reached on Monday - Friday (7:30AM - 4PM). The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Jeff Piziali/ Primary Examiner, Art Unit 2628 30 October 2025
Read full office action

Prosecution Timeline

Jan 06, 2025
Application Filed
Oct 31, 2025
Non-Final Rejection — §103, §112
Apr 06, 2026
Response Filed

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Prosecution Projections

1-2
Expected OA Rounds
42%
Grant Probability
47%
With Interview (+5.1%)
3y 1m
Median Time to Grant
Low
PTA Risk
Based on 587 resolved cases by this examiner. Grant probability derived from career allow rate.

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