DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2, 4-5, 8, and 11 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ragab et al. (US 2016/0149582).
Regarding claim 1, Ragab discloses a background calibration of time-interleaved ADC architecture in figures 3-5 that teaches: a first analogue-to-digital converter (307,ADC1), arranged to sample an analogue input 305) and produce a digital output (D1) based on the sampled analogue input (308); a second analogue-to-digital converter (307, ADC2), arranged to sample the analogue input (305) and produce a digital output (D2) based on the sampled analogue input (308); a third analogue-to-digital converter (ADC M), arranged to sample the analogue input (305) and produce a digital output (Dm) based on the sampled analogue input; and a signal interleaving portion (309), arranged to combine the digital outputs from the first analogue-to-digital converter and the second analogue-to-digital converter to produce a digital output signal (output of 309); the time-interleaved analogue-to-digital converter (300) configured for operation both in an operational mode, and in a compensation mode, wherein the time-interleaved analogue-to-digital converter (300) is configured to operate in the compensation mode when the third analogue-to-digital converter is non-functional; wherein, in the operational mode, the first analogue-to-digital converter is arranged to sample the analogue input at a first frequency and the second analogue-to- digital converter is arranged to sample the analogue input at a second frequency; and wherein, in the compensation mode, the first analogue-to-digital converter is arranged to sample the analogue input at a third frequency and the second analogue-to- digital converter is arranged to sample the analogue input at a fourth frequency, wherein the third frequency is higher than the first frequency, and wherein the fourth frequency is higher than the second frequency (see para. 0035 – 0042 and see descriptions of figure 3).
Regarding claim 2, Ragab also teaches wherein the time-interleaved analogue-to-digital converter is configured to operate in the operational mode when all analogue-to-digital converters of the time-interleaved analogue-to-digital converter are functional (see para. 0035, 0036).
Regarding claim 4, Ragab also teaches wherein the first frequency and the second frequency are the same.
Regarding claim 5, Ragab also teaches wherein the third frequency and the fourth frequency are the same.
Regarding claim 8, claim 8 is similar to claim 1 in method format. Therefore, claim 8 is rejected as well as rejected in claim 1, such as: Ragab discloses a background calibration of time-interleaved ADC architecture in figures 3-5 that teaches: a first analogue-to-digital converter (307,ADC1), arranged to sample an analogue input 305) and produce a digital output (D1) based on the sampled analogue input (308); a second analogue-to-digital converter (307, ADC2), arranged to sample the analogue input (305) and produce a digital output (D2) based on the sampled analogue input (308); a third analogue-to-digital converter (ADC M), arranged to sample the analogue input (305) and produce a digital output (Dm) based on the sampled analogue input; and a signal interleaving portion (309), arranged to combine the digital outputs from the first analogue-to-digital converter and the second analogue-to-digital converter to produce a digital output signal (output of 309); the time-interleaved analogue-to-digital converter (300) configured for operation both in an operational mode, and in a compensation mode, wherein the time-interleaved analogue-to-digital converter (300) is configured to operate in the compensation mode when the third analogue-to-digital converter is non-functional; wherein, in the operational mode, the first analogue-to-digital converter is arranged to sample the analogue input at a first frequency and the second analogue-to- digital converter is arranged to sample the analogue input at a second frequency; and wherein, in the compensation mode, the first analogue-to-digital converter is arranged to sample the analogue input at a third frequency and the second analogue-to- digital converter is arranged to sample the analogue input at a fourth frequency, wherein the third frequency is higher than the first frequency, and wherein the fourth frequency is higher than the second frequency (see para. 0035 – 0042 and see descriptions of figure 3).
Regarding claim 11, Ragab discloses a time-interleaved ADC architecture in figure 3-5 that teaches: at least two analogue-to-digital converters (307,ADC1, ADC2) arranged to sample an analogue input (305) sequentially in a sampling sequence, and output a respective digital output (D1, D2) based on the sampled analogue input; the time-interleaved analogue-to-digital converter (300) configured for operation in a data-interpolation mode when at least one of the analogue-to-digital converters is in a non-functional state; wherein in the data-interpolation mode the time-interleaved analogue-to-digital converter (300) is arranged to estimate a value for the digital output associated with the at least one non-functional analogue-to-digital converter by interpolating based on values of the digital outputs of the analogue-to-digital converters arranged to sample before and after the at least one non-functional analogue-to-digital converter in the sampling sequence (see figures 3-5, descriptions, para. 0035-0042).
Allowable Subject Matter
Claim 3 is objected to as being dependent upon a rejected base claim, but it would be considered for allowable if it is rewritten in independent form including all of the limitations of the base claim and any intervening claims. The closest prior art considered individually or in combination, fails to fairly teach or suggest objected features, which is: wherein the time-interleaved analogue-to-digital converter is configured such that all functional analogue-to-digital converters sample the analogue input at a higher frequency in the compensation mode than in the operational mode.
Claim 6 is objected to as being dependent upon a rejected base claim, but it would be considered for allowable if it is rewritten in independent form including all of the limitations of the base claim and any intervening claims. The closest prior art considered individually or in combination, fails to fairly teach or suggest objected features, which is: wherein the frequencies of the analogue-to-digital converters are increased in the compensation mode such that a total sampling frequency of the time-interleaved analogue-to-digital converter in the operational mode is the same as the total sampling frequency in the compensation mode.
Claim 7 is objected to as being dependent upon a rejected base claim, but it would be considered for allowable if it is rewritten in independent form including all of the limitations of the base claim and any intervening claims. The closest prior art considered individually or in combination, fails to fairly teach or suggest objected features, which is: wherein the analogue-to-digital converters of the time-interleaved analogue-to-digital converter, comprising the first and second analogue-to-digital converters, are arranged to sample the analogue input sequentially in a sampling sequence, wherein the time-interleaved analogue-to-digital converter is configured for operation in a data-interpolation mode in the event that at least one of the analogue-to-digital converters is in a non-functional state; wherein, in the data-interpolation mode, the time-interleaved analogue-to- digital converter is arranged to estimate a value for a digital output associated with the at least one non-functional analogue-to-digital converter by interpolating based on values of the digital outputs of the analogue-to-digital converters arranged to sample before and after the at least one non-functional analogue-to-digital converter in the sampling sequence.
Claim 9 is objected to as being dependent upon a rejected base claim, but it would be considered for allowable if it is rewritten in independent form including all of the limitations of the base claim and any intervening claims. The closest prior art considered individually or in combination, fails to fairly teach or suggest objected features, which is: increasing the sampling frequency of all of the remaining functional analogue-to-digital converters of the time-interleaved analogue-to-digital converter, compared to their respective operating frequencies in an operational mode.
Claim 10 is objected to as being dependent upon a rejected base claim, but it would be considered for allowable if it is rewritten in independent form including all of the limitations of the base claim and any intervening claims. The closest prior art considered individually or in combination, fails to fairly teach or suggest objected features, which is: wherein the time-interleaved analogue-to-digital converter comprises at least two analogue-to-digital converters arranged to sample an analogue input sequentially in a sampling sequence, and output a respective digital output based on the sampled analogue input; the method comprising, in a data-interpolation mode in which at least one of the analogue-to-digital converters is non-functional, estimating a value for a digital output associated with the at least one non-functional analogue-to-digital converter by interpolating based on values of the digital outputs of the analogue-to-digital converters arranged to sample before and after the at least one non-functional analogue-to-digital converter in the sampling sequence.
Claim 12 is objected to as being dependent upon a rejected base claim, but it would be considered for allowable if it is rewritten in independent form including all of the limitations of the base claim and any intervening claims. The closest prior art considered individually or in combination, fails to fairly teach or suggest objected features, which is: wherein the value for the digital output associated with the at least one non-functional analogue- to-digital converter is estimated by linear interpolation.
Claim 13 is objected to as being dependent upon a rejected base claim, but it would be considered for allowable if it is rewritten in independent form including all of the limitations of the base claim and any intervening claims. The closest prior art considered individually or in combination, fails to fairly teach or suggest objected features, which is: wherein the analogue-to-digital converter arranged to sample before the at least one non- functional analogue-to-digital converter in the sampling sequence produces a first digital output, wherein the analogue-to-digital converter arranged to sample after the at least one non-functional analogue-to-digital converter in the sampling sequence produces a second digital output, and wherein the value for the digital output associated with a first non-functional analogue-to-digital converter of the at least one non- functional analogue-to-digital converter is calculated by dividing the difference between the first digital output and the second digital output by the number of non- functional analogue-to-digital converters.
Claim 14 is objected to as being dependent upon a rejected base claim, but it would be considered for allowable if it is rewritten in independent form including all of the limitations of the base claim and any intervening claims. The closest prior art considered individually or in combination, fails to fairly teach or suggest objected features, which is: wherein, in the data interpolation mode, the time-interleaved analogue-to-digital converter is arranged to estimate a value for the digital output associated with a non-functional analogue-to-digital converter of the at least one non-functional analogue-to-digital converters by interpolating based on values of the digital outputs of the analogue-to- digital converters arranged to sample immediately before the non-functional analogue- to-digital converter in the sampling sequence and immediately after the non-functional analogue-to-digital converter in the sampling sequence.
Cited References
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Cited references are related to instant application subject matters.
Conclusion
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/LAM T MAI/Primary Examiner, Art Unit 2845
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