DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-15 and 21 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (US PGPub 2023/0075226) in view of Zhang et al. (US PGPub 2025/0131880) and Park et al. (US PGPub 2020/0160792).
Regarding claim 1, Lee discloses a display device (fig. 2, display device 160), comprising:
a display panel (fig. 2, display panel 250) including a pixel ([0057], “pixel of the display panel 250”);
a data driver (fig. 2, source driver 220) connected to the pixel through a data line, the data driver generating a first data voltage for a low driving frequency ([0055], “the source driver 220 may generate output data supplied to the display panel 250, in response to the source control signal” and [0056], “A signal corresponding to the output data may be supplied to the source driver 220, under the control of a timing controller inside the display driving circuit 210” where the signal is output during a normal driving frequency and during a low driving frequency); and
a scan driver (fig. 2, gate driver 230) connected to the pixel through a gate line, the scan driver generating a first scan signal for the low driving frequency having a low-frequency scan-on time, generating a second scan signal for the high driving frequency having a high-frequency scan-on time different from the low-frequency scan-on time, and providing the first scan signal or the second scan signal to the pixel ([0096], “when the duty-ratio difference is equal to or greater than the first reference value, the display driving circuit 210 may insert a bridge frame BF at the time point to change the operating frequency and may correct the duty ratio for the at least one of the light emitting control signal PCS included in the bridge frame BF, in operation 940. For example, when the duty-ratio difference is equal to or greater than the first reference value, the duty-ratio difference has a greater value. Accordingly, it is difficult to prevent the flicker phenomenon through the method as in illustrated FIG. 4A. The display driving circuit 210 may insert the bridge frame BF at the time point to change the operating frequency and may set (or adjust) the lengths (or times) of pulses included in the light emitting control signal PCS in the bridge frame BF through the method as illustrated in FIG. 5 or 6. The display driving circuit 210 may correct the duty ratio in a frame right after the time point to change the operating frequency through the method as illustrated in FIG. 5 or 6, and may perform the operation 930 again”).
While Lee discloses improving the problem of flicker by inserting a bridge frame during transition from one frequency to another frequency, however other solutions to the problem of flicker are known including having multiple gamma voltages for different frequencies. In a similar field of endeavor of display devices, Zhang discloses a low frequency gamma voltage and a high frequency gamma voltage; wherein the low-frequency scan-on time is determined when a difference between a low-frequency gamma voltage range of the low-frequency gamma voltage and a target gamma voltage range calculated based on a high-frequency gamma voltage range of the high-frequency gamma voltage is within a reference range ([0100], “gamma adjustment is performed on refresh frames (and the normal driving mode) of the LTPO display module in the low frequency driving mode, and hold frames use the gamma of refresh frames, and an image quality difference of different frequencies is reduced by adjusting a related voltage of the hold frames. However, due to same setting of anode reset voltages of different gray scales under the same DBV Band, brightness differences of high gray scale and low gray scale display patterns in a frequency switching process are different, and it is difficult to meet the image quality display requirements of LTPO adaptively refreshing frequency by using same voltage setting. Therefore, using different voltage adjustment designs for different gray scales in the same DBV Band is an effective guarantee to improve the image quality of the LTPO display module”).
In view of the teachings of Lee and Zhang, it would have been obvious to include the gamma voltages of Zhang, within the device of Lee, for the purpose of improving image quality during a frequency switching process (Zhang: [0100]).
While Lee and Zhang teaches high and low frequency, changing a high and low frequency and a high and low gamma voltage has been known. In a similar field of endeavor of display devices, Park discloses the low-frequency scan-on time is changed to a different value when the difference between the low-frequency gamma voltage range and the target gamma voltage range based on the high-frequency gamma voltage range is not within the reference range ([0009], “a device controller changing a driving frequency of a device to a first frequency or a second frequency higher than the first frequency in response to a frequency change signal, and a data voltage applied to the display panel is compensated on the basis of a higher gamma voltage than that during operation at the first frequency when the driving frequency is changed to the second frequency higher than the first frequency” and [0100], “For example, when the first control signal CS1 is applied, the source gamma unit 145 can perform a normal operation with a first gamma set. When the second control signal CS2 is applied, the source gamma unit 145 can perform an optical compensation operation with a second gamma set. The second gamma set is used in a higher frequency environment than that in which the first gamma set is used. Accordingly, the second gamma set can have gamma values for generating a higher gamma voltage level than the first gamma set for data voltage compensation according to a higher frequency environment”).
In view of Lee, Zhang and Park, it would have been obvious to one of ordinary skill in the art to include the first and second gamma set of Park as the high and low frequency of Lee and Zhang, for the purpose of improving display quality and/or operation reliability when a driving frequency of a display panel is changed (Park: [0006]).
Regarding claim 2, the combination of Lee, Zhang and Park further discloses wherein the target gamma voltage range is equal to the high-frequency gamma voltage range (Zhang: [0100], “gamma adjustment is performed on refresh frames (and the normal driving mode) of the LTPO display module in the low frequency driving mode, and hold frames use the gamma of refresh frames, and an image quality difference of different frequencies is reduced by adjusting a related voltage of the hold frames”).
Regarding claim 3, the combination of Lee, Zhang and Park further discloses wherein the low-frequency gamma voltage range is defined from a first reference low-frequency gamma voltage corresponding to a first reference grayscale to a second reference low-frequency gamma voltage corresponding to a second reference grayscale higher than the first reference grayscale (Zhang: [0102], “a driving mode of the display panel includes a low frequency driving mode and a normal driving mode, the low frequency driving mode including a refresh frame stage configured to write data to the pixel unit and a hold frame stage configured to hold the data written to the pixel unit, and the display method includes: in the low frequency driving mode, acquiring a current DBV band and a pattern to be displayed; quantizing the pattern to be displayed to get an average picture level, wherein the average picture level is positively correlated with a brightness of a pixel unit by which the pattern to be displayed is started and negatively correlated with a brightness of the display panel when displaying an all-white pattern; determining a corresponding anode reset voltage according to the current DBV band and the average picture level; and in the hold frame stage, outputting the corresponding anode reset voltage to the pixel drive circuit to reset an anode of the light emitting element”), and
wherein the target gamma voltage range is defined from a first reference high-frequency gamma voltage corresponding to the first reference grayscale to a second reference high-frequency gamma voltage corresponding to the second reference grayscale (Zhang: [0100], “However, due to same setting of anode reset voltages of different gray scales under the same DBV Band, brightness differences of high gray scale and low gray scale display patterns in a frequency switching process are different, and it is difficult to meet the image quality display requirements of LTPO adaptively refreshing frequency by using same voltage setting. Therefore, using different voltage adjustment designs for different gray scales in the same DBV Band is an effective guarantee to improve the image quality of the LTPO display module”).
Regarding claim 4, the combination of Lee, Zhang and Park further discloses wherein the low-frequency scan-on time decreases by an offset when the low-frequency gamma voltage range is higher than the target gamma voltage range, and wherein the low-frequency scan-on time increases by the offset when the low-frequency gamma voltage range is lower than the target gamma voltage range (Lee: [0072], “The first region 401, the second region 402, or the third region 403 may be classified based on a first brightness value BR1, a second brightness value BR2, a first illuminance value IL1, or a second illuminance value IL2. The flicker sensitivity may be increased in the first region 401. The first region 401 may include a low brightness state or a low illuminance state. The first region 401 may include a portion having a brightness less than the first brightness value BR1 and having an illuminance less than the second illuminance value IL2, or a portion having a brightness less than the second brightness value BR2 and having an illuminance less than the first illuminance value IL1 The flicker sensitivity may be increased in the third region 403. The third region 403 may include a higher brightness state or a lower illuminance state. The third region 403 may include a portion having a brightness greater than the second brightness value BR2 or an illuminance greater than the second illuminance value IL2. The third region 403 may include a high brightness mode (HBM) region. The flicker sensitivity in the second region 402 is lower than the flicker sensitivity in the first region 401, and higher than the flicker sensitivity in the third region 403. The second region 402 may include a portion having a brightness between the first brightness value BR1 and the second brightness value BR2 and an illuminance between the first illuminance value IL1 and the second illuminance value IL2. For example, the first brightness value BR1 and the first illuminance value IL1 may be experimentally determined, based on whether flicker occurs. As another example, the second brightness value BR2 may be determined as a maximum brightness value of the display device 160. For example, the second illuminance value IL2 may be determined depending on a condition of entering into the high brightness mode (HBM)”).
Regarding claim 5, the combination of Lee, Zhang and Park further discloses wherein the offset is determined based on a difference between the low-frequency gamma voltage range and the target gamma voltage range (Lee: [0062], “When the duty-ratio difference between the duty ratio of pulses right before and after the target time point to change the operating frequency, and the duty ratio in each frame is equal to or greater than a reference value (e.g., 5%), a flicker phenomenon may be viewed by a user on the display panel 250. A method for controlling the display device 160 to reduce (or prevent) the flicker phenomenon will be described below with reference to FIGS. 4A, 4B, and 5 to 9”).
Regarding claim 6, the combination of Lee, Zhang and Park further discloses wherein the offset has a predetermined value (Lee: [0062], “For example, the pulse width of the light emitting control signal PCS in the frame FA may be “a” (e.g., 2.1 ms), and the pulse width of the light emitting control signal PCS in the frame FB may be “b” (e.g., 2.8 ms). The duty ratio (or the ratio between “a” to “b”; the duty ratio of pulses=the length of a high-level pulse/(the length of a low-level pulse+the length of the high-level pulse; (b/(a+b))*100=2.8/(2.1+2.8)*100=57.1%)) of pulses right before and after the target time point to change the operating frequency may be changed to be different from the duty ratio in the frame FA. In each frame, the duty ratio of the light emitting control signal PCS may be set to a specified ratio (e.g., 50%). When the duty-ratio difference between the duty ratio of pulses right before and after the target time point to change the operating frequency, and the duty ratio in each frame is equal to or greater than a reference value (e.g., 5%), a flicker phenomenon may be viewed by a user on the display panel 250”).
Regarding claim 7, the combination of Lee, Zhang and Park further discloses further comprising:
an emission driver (Zhang: fig. 1, light emitting driver) connected to the pixel through an emission signal line (Zhang: fig. 1, light emitting driver connected to Pxij), the emission driver generating an emission signal based on an emission start signal having an emission cycle that varies depending on a driving frequency (Zhang: [0037], “The light emitting driver may generate a transmit signal to be provided to the light emitting signal lines E1, E2, E3, . . . , and Eo by receiving the clock signal, the transmit stop signal, etc., from the timing controller. For example, the light emitting driver may sequentially provide a transmit signal with an off-level pulse to the light emitting signal lines E1 to Eo”); and
a controller (Zhang: fig. 1, timing controller) generating the emission start signal (Zhang: [0037], “the timing controller may provide the data driver with a gray scale value and a control signal which are suitable for a specification of the data driver, provide the scan driver with a clock signal and a scan start signal, etc., which are suitable for a specification of the scan driver, and provide the light emitting driver with a clock signal and a transmit stop signal, etc., which are suitable for a specification of the light emitting driver”).
Regarding claim 8, the combination of Lee, Zhang and Park further discloses wherein a buffer frame is inserted between a low-frequency frame driven at the low driving frequency and a high-frequency frame driven at the high driving frequency when the driving frequency changes between the low driving frequency and the high driving frequency (Lee: [0077] and fig. 5, “the display driving circuit 210 may insert a bridge frame BF between the frame FA and the frame FB”), and
wherein a buffer emission cycle of the emission start signal in the buffer frame is calculated based on a low-frequency emission cycle of the emission start signal in the low- frequency frame and a high-frequency emission cycle of the emission start signal in the high- frequency frame (Lee: [0077], “The difference between the duty ratio of the adjacent pulses of the light emitting control signal PCS and the specific duty ratio may be set to be less than the second reference value, between the frame FA and the bridge frame BF, and between the bridge frame BF and the frame FB, and the flicker phenomenon may be reduced (or prevented) when the operating frequency is changed”).
Regarding claim 21, the combination of Lee, Zhang and Park further discloses an electronic apparatus (Lee: fig. 1, electronic device 101) including a display device which displays an image (Lee: [0038], “The display device 160 may visually provide information to the outside (e.g., a user) of the electronic device 101”) and a processor which controls the display device (Lee: [0032], “The processor 120 may be configured to execute, for example, software (e.g., a program 140) to control at least one other component (e.g., a hardware or software component) of the electronic device 101 coupled with the processor 120, and may perform various data processing or computation”), the electronic apparatus comprising: the limitations of the display device of claim 1 and therefore interpreted and rejected based on similar reasoning.
Claims 9-15 are rejected under 35 U.S.C. 103 as being unpatentable over Lee, and Zhang further in view of Song et al. (US 11,928,999).
Claim 9 is within the scope of the combination of claims 1, 7 and 8 and is therefore interpreted and rejected based on similar reasoning.
While the combination of Lee and Zhang teaches sequentially changing an emission-off period when changing frequencies (Lee: [0077]), it has been known to keep a width of the emission-off period in the buffer frame the same. In a similar field of endeavor of display devices, Song discloses wherein the emission start signal includes a plurality of emission-off periods, and a width of each of the plurality of emission-off periods in the buffer frame is the same as one another and is different from a width of each of the plurality of emission-off periods in the low-frequency frame and in the high-frequency frame (fig. 4B and column 8, lines 61-65, “the first to fourth duty periods T1 to T4 represent duty periods of the light emission control signal EM when the frame frequencies are 60 Hz, 70 Hz, 80 Hz, and 90 Hz, respectively. In one frame, the light emission control signal EM may have the same duty period” and column 9, lines 34-37, “Among lengths of the duty periods, the length of the first duty period T1 is longest, and the lengths are reduced in the order of the second, third, and fourth duty periods T2, T3, and T4”).
In view of the teachings of Lee, Zhang and Song it would have been obvious to one of ordinary skill in the art to include the light emission control signal having the same duty period as taught by Song, as the emission control signal of Lee and Zhang, for the purpose of improving a display quality where when a frame frequency is changed, a frame frequency and gamma correction data can be gradually changed and thus a user cannot recognize a change in luminance (column 10, lines 40-44).
Regarding claim 10, the combination of Lee, Zhang and Song further discloses wherein the buffer emission cycle is an average value of the low-frequency emission cycle and the high-frequency emission cycle (Lee: [0077], “The difference between the duty ratio of the adjacent pulses of the light emitting control signal PCS and the specific duty ratio may be set to be less than the second reference value, between the frame FA and the bridge frame BF, and between the bridge frame BF and the frame FB”).
Regarding claim 11, the combination of Lee, Zhang and Song further discloses wherein the buffer emission cycle is obtained by multiplying a weighted value to an average value of the low-frequency emission cycle and the high-frequency emission cycle (Lee: [0077], “For example, the length (or time) of one pulse of the light emitting control signal PCS in the frame FA may be “a” (e.g., 2.1 ms), the length (or time) of one pulse of the light emitting control signal PCS in the frame FB may be “b” (e.g., 4.2 ms), and the length (or time) of one pulse of the light emitting control signal PCS in the bridge frame BF may be 2.8 ms. According to various embodiments, the display driving circuit 210 may employ the method for correcting the duty ratio as illustrated in FIG. 4A, with respect to the bridge frame BF. The display driving circuit 210 may set the length (or time) of each of pulses of the light emitting control signal PCS to a value ranging from “m1” to “m8” in the bridge frame BF. The display driving circuit 210 may set “m1” to “m8” to sequentially increase from “m1” to “m8”, between “a” and “b”. Alternatively, the display driving circuit 210 may change at least two values of “m1” to “m8” and set the remaining values to be equal to “b”. The pulses corresponding to at least two values, which are different from “b”, among “m1” to “m8” may not adjacent to each other”).
Regarding claim 12, the combination of Lee, Zhang and Song further discloses wherein the buffer emission cycle when the driving frequency changes from the low driving frequency to the high driving frequency is different from the buffer emission cycle when the driving frequency changes from the high driving frequency to the low driving frequency (Lee: [0062], “For example, the pulse width of the light emitting control signal PCS in the frame FA may be “a” (e.g., 2.1 ms), and the pulse width of the light emitting control signal PCS in the frame FB may be “b” (e.g., 2.8 ms). The duty ratio (or the ratio between “a” to “b”; the duty ratio of pulses=the length of a high-level pulse/(the length of a low-level pulse+the length of the high-level pulse; (b/(a+b))*100=2.8/(2.1+2.8)*100=57.1%)) of pulses right before and after the target time point to change the operating frequency may be changed to be different from the duty ratio in the frame FA. In each frame, the duty ratio of the light emitting control signal PCS may be set to a specified ratio (e.g., 50%). When the duty-ratio difference between the duty ratio of pulses right before and after the target time point to change the operating frequency, and the duty ratio in each frame is equal to or greater than a reference value (e.g., 5%), a flicker phenomenon may be viewed by a user on the display panel 250”).
Regarding claim 13, the combination of Lee, Zhang and Song further discloses wherein the buffer frame is inserted when a difference between the low driving frequency and the high driving frequency is higher than a threshold frequency (Lee: [0076], “The duty-ratio difference is equal to or greater than a specific value (or the degree beyond the range for the method for correcting the duty ratio of FIG. 4A). The flicker phenomenon may not be solved through the method for correcting the duty ratio as illustrated in FIG. 4A). The duty-ratio difference may refer to the difference between the duty ratio of adjacent pulses (e.g., a high-level pulse and a low-level pulse) of the light emitting control signal PCS, and the specific duty ratio (e.g., 50%)”).
Regarding claim 14, the combination of Lee, Zhang and Song further discloses wherein the buffer frame is selectively inserted when the driving frequency changes from the low driving frequency to the high driving frequency or when the driving frequency changes from the high driving frequency to the low driving frequency (Lee: [0077], “the display driving circuit 210 may insert a bridge frame BF between the frame FA and the frame FB”).
Regarding claim 15, the combination of Lee, Zhang and Song further discloses wherein an inserting time of the buffer frame is delayed by a delay time duration from a transition time of the driving frequency (Lee: [0077], “For example, the length (or time) of one pulse of the light emitting control signal PCS in the frame FA may be “a” (e.g., 2.1 ms), the length (or time) of one pulse of the light emitting control signal PCS in the frame FB may be “b” (e.g., 4.2 ms), and the length (or time) of one pulse of the light emitting control signal PCS in the bridge frame BF may be 2.8 ms”).
Response to Arguments
Applicant’s arguments with respect to claims 1, 9 and 21 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to EMILY J FRANK whose telephone number is (571)270-7255. The examiner can normally be reached Monday-Thursday 8AM-6PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Benjamin C Lee can be reached at (571)272-2963. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/EJF/
/BENJAMIN C LEE/Supervisory Patent Examiner, Art Unit 2629
