DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-3 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Mabuchi, US Patent Publication 2015/0381917.
Regarding independent claim 1, Mabuchi teaches a display device (display device 105 of figure 26 as given in paragraph 0220) comprising:
a plurality of pixels arrayed in a matrix having a row-column configuration in a first direction and a second direction intersecting the first direction of a display region (pixel array section 12 of figure 25 shows the R, G, and B pixels arranged in an array as given in paragraph 0215);
a plurality of gate lines extending in the first direction and arrayed in the second direction (paragraph 0194 explains that the transmission lines are gate driving lines of the gate electrode that drive the columns);
a plurality of signal lines extending in the second direction and arrayed in the first direction (paragraph 0080 explains that the signals of the pixels are supplied to the rows); and
a drive circuit configured to supply a pixel signal to the pixels via the signal lines and drive the pixels via the gate lines (paragraphs 0080 and 0194 explain the driving of the columns and rows through the signals), wherein
when M is the total number of the pixels arrayed in ascending order from the first column to the m-th column (m is a natural number) from one end in the first direction to the other end, and N is the total number of the pixels arrayed in ascending order from the first row to the n-th row (n is a natural number) from one end in the second direction to the other end (figure 25 shows the array of pixels in the given column and row formation),
the total number of the gate lines is N, and the total number of the signal lines is M+1 (paragraph 0051 explains the vertical and horizontal lines used that are given in paragraphs 0080 and 0194 explain the use of gate and signal lines),
the n-th gate line is coupled to the pixels arrayed in the n-th row of the respective columns (paragraph 0051 explains that one line is couple to each row of pixels), and
the m-th signal line is coupled to:
first side pixels that are the pixels arrayed in the m-1-th column of odd-numbered rows (G pixels in first and third columns in odd rows as depicted in figure 25); and
second side pixels that are the pixels arrayed in the m-th column of even-numbered rows (G pixels in the second and fourth columns in even rows as depicted in figure 25), such that the m-th signal line is coupled alternately to:
one of the first side pixels in one of the odd-numbered rows (G pixel in the first column and first row of figure 25); and
one of the second side pixels in one of the even-numbered rows adjacent to the one of the odd-numbered rows (G pixel in the second column and second row that is adjacent to the first row), along the second direction (paragraph 0051 explains that one line is coupled to each column of pixels and figure 25 shows that column circuit for G of 122g is coupled to the G pixels described alternately).
Regarding claim 2, Mabuchi teaches the display device according to claim 1, wherein
the pixel in the n-th row and the m-th column and the pixel in the n-th row and the m+1-th column display different colors (figure 25 shows that the pixel in the 2nd row and 1st column is green and the pixel in the 2nd row and the 2nd column is blue),
the pixel in the n-th row and the m-th column and the pixel in the n+1-th row and the m-th column display different colors (figure 25 shows that the pixel in the 2nd row and 1st column is green and the pixel in the 3rd row and the 1st column is red), and
the pixel in the n-th row and the m-th column and the pixel in the n+1-th row and the m+1-th column display the same color (figure 25 shows that the pixel in the 2nd row and 1st column is green and the pixel in the 3rd row and the 2nd column is green).
Regarding claim 3, Mabuchi teaches the display device according to claim 2, wherein
the pixels include:
a first pixel configured to display a first color (paragraph 0070 explains the use of the R red color);
a second pixel configured to display a second color different from the first color (paragraph 0070 explains the use of the G green color); and
a third pixel configured to display a third color different from the first color and the second color (paragraph 0070 explains the use of the B blue color).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 4-7 are rejected under 35 U.S.C. 103 as being unpatentable over Mabuchi, US Patent Publication 2015/0381917 in view of Yamanaka, US Patent Publication 2018/0047348.
Regarding claim 4, Mabuchi teaches the display device according to claim 3. Mabuchi does not teach the device wherein
the first pixel, the second pixel, and the third pixel are sequentially arrayed in ascending order in the first direction, and
the first pixel, the second pixel, and the third pixel are sequentially arrayed in descending order in the second direction.
Yamanaka teaches the device wherein the first pixel, the second pixel, and the third pixel are sequentially arrayed in ascending order in the first direction (as depicted in figure 24(a) and described in paragraph 0148), and
the first pixel, the second pixel, and the third pixel are sequentially arrayed in descending order in the second direction (as depicted in figure 25(a) and described in paragraph 0149).
It would have been obvious to one of ordinary skill in the art before the effective filing date to use the layout taught by Yamanaka in the system of Mabuchi. The rationale to combine would be to provide a liquid crystal display device capable of providing high quality moving image display (paragraph 0029 of Yamanaka).
Regarding claim 5, Mabuchi teaches the display device according to claim 4, wherein
the first color is red (paragraph 0070 explains the use of the R red color),
the second color is green (paragraph 0070 explains the use of the G green color), and
the third color is blue (paragraph 0070 explains the use of the B blue color).
Regarding claim 6, Mabuchi teaches the display device according to claim 1. Mabuchi does not specify the device wherein the drive circuit sequentially drives the pixels arrayed in ascending order in the second direction (although paragraphs 0077, 0080, and 0161 discuss the order of driving without these details). Yamanaka teaches the device wherein the drive circuit sequentially drives the pixels arrayed in ascending order in the second direction (paragraph 0109 explains that the circuit drives the pixels in ascending vertical order).
It would have been obvious to one of ordinary skill in the art before the effective filing date to use the layout taught by Yamanaka in the system of Mabuchi. The rationale to combine would be to provide a liquid crystal display device capable of providing high quality moving image display (paragraph 0029 of Yamanaka).
Regarding claim 7, Mabuchi teaches the display device according to claim 1. Mabuchi does not teach the device wherein the drive circuit simultaneously drives the pixels in an odd- numbered row and the pixels in an even-numbered row adjacently arrayed in ascending order in the second direction (paragraph 0080 explains that the signal of the odd row is first input and then the even row but does not specify the order between just the two rows).
Yamanaka teaches the device teach the device wherein the drive circuit simultaneously drives the pixels in an odd- numbered row and the pixels in an even-numbered row adjacently arrayed in ascending order in the second direction (paragraph 0109 explains that the circuit drives the pixels in ascending vertical order).
It would have been obvious to one of ordinary skill in the art before the effective filing date to use the layout taught by Yamanaka in the system of Mabuchi. The rationale to combine would be to provide a liquid crystal display device capable of providing high quality moving image display (paragraph 0029 of Yamanaka).
Response to Arguments
Applicant's arguments filed 11/25/25 have been fully considered but they are not persuasive. Applicant contends that the layout now described was not taught by the prior art, rendering the claims to be allowable. The examiner disagrees. These features were not previously claimed and have now been rejected above in view of figure 25 of Mabuchi. In response to applicant's argument that the references fail to show certain features of the invention, it is noted that the features upon which applicant relies (i.e., layout of m-th signal line) are not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The closest prior art is made of record in the attached notice of references cited.
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PARUL H GUPTA whose telephone number is (571)272-5260. The examiner can normally be reached Monday through Friday, from 10 AM to 7 PM.
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/PARUL H GUPTA/Primary Examiner, Art Unit 2627