Prosecution Insights
Last updated: April 19, 2026
Application No. 19/014,055

MEASUREMENT OF REPRESENTATIVE CHARGE LOSS IN A BLOCK TO DETERMINE CHARGE LOSS STATE

Non-Final OA §DP
Filed
Jan 08, 2025
Examiner
VERBRUGGE, KEVIN
Art Unit
2132
Tech Center
2100 — Computer Architecture & Software
Assignee
Micron Technology, Inc.
OA Round
1 (Non-Final)
89%
Grant Probability
Favorable
1-2
OA Rounds
2y 2m
To Grant
86%
With Interview

Examiner Intelligence

Grants 89% — above average
89%
Career Allow Rate
505 granted / 570 resolved
+33.6% vs TC avg
Minimal -2% lift
Without
With
+-2.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
14 currently pending
Career history
584
Total Applications
across all art units

Statute-Specific Performance

§101
4.2%
-35.8% vs TC avg
§103
37.2%
-2.8% vs TC avg
§102
22.3%
-17.7% vs TC avg
§112
8.0%
-32.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 570 resolved cases

Office Action

§DP
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over the claims of U.S. Patent No. 12,223,190. Although the claims at issue are not identical, they are not patentably distinct from each other because the differences are not material to patentability. The claims have merely been reworded and some limitations have been removed. It is obvious to remove limitations from patented claims. Instant claim 1 is compared to patented claim 5 in the table below: Instant claim 1 Patented claim 5 (including independent claim 1) 1. A system comprising: a memory device; and a processing device, operatively coupled with the memory device, to perform operations comprising: 1. A system comprising: a memory device; and a processing device, operatively coupled with the memory device, to perform operations comprising: receiving a request to perform a read operation on a block of the memory device; accessing an entry associated with the block in a data store, the entry comprising an indication of whether the block is in a mixed charge loss state, wherein the indication is based on whether a difference between respective levels of charge loss associated with a plurality of representative wordlines of a block of a memory device are greater than or equal to a threshold amount; determining respective levels of charge loss associated with a plurality of representative wordlines of a block of the memory device; determining whether a difference between the respective levels of charge loss is greater than or equal to a threshold amount; and responsive to determining that the difference between the respective levels of charge loss is greater than or equal to the threshold amount, determining that the block is in a mixed charge loss state. and responsive to the entry indicating that the block is in the mixed charge loss state, performing the read operation on the block using a mixed charge loss compensation technique. 5. The system of claim 1, wherein the processing device is to perform operations further comprising: receiving a request to perform a read operation on the block of the memory device; and responsive to determining that the block is in the mixed charge loss state, performing the read operation on the block using a mixed SCL compensation technique. Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over the claims of U.S. Patent No. 11,797,205. Although the claims at issue are not identical, they are not patentably distinct from each other because the differences are not material to patentability. The claims have merely been reworded and some limitations have been removed. It is obvious to remove limitations from patented claims. Instant claim 1 is compared to patented claim 5 in the table below: Instant claim 1 Patented claim 8 (including independent claim 1 and intervening claim 7) 1. A system comprising: a memory device; and a processing device, operatively coupled with the memory device, to perform operations comprising: 1. A system comprising: a memory device; and a processing device, operatively coupled with the memory device, to perform operations comprising: receiving a request to perform a read operation on a block of the memory device; accessing an entry associated with the block in a data store, the entry comprising an indication of whether the block is in a mixed charge loss state, wherein the indication is based on whether a difference between respective levels of charge loss associated with a plurality of representative wordlines of a block of a memory device are greater than or equal to a threshold amount; detecting an occurrence of a triggering event; determining respective levels of charge loss associated with a first representative wordline of a block of the memory device and with a second representative wordline of the block of the memory device; determining whether a difference between the respective levels of charge loss satisfies a threshold criterion; and responsive to determining that the difference between the respective levels of charge loss satisfies the threshold criterion, determining that the block is in a uniform charge loss state. and responsive to the entry indicating that the block is in the mixed charge loss state, performing the read operation on the block using a mixed charge loss compensation technique. 7. The system of claim 1, wherein the processing device is to perform operations further comprising: responsive to determining that the difference between the respective levels of charge loss does not satisfy the threshold criterion, determining that the block is not in a uniform charge loss state. 8. The system of claim 7, wherein the processing device is to perform operations further comprising: receiving a request to perform a read operation on the block of the memory device; and responsive to determining that the block is not in the uniform charge loss state, performing the read operation on the block using a mixed SCL compensation technique. Conclusion Any inquiry concerning this Office action should be directed to the Examiner by phone at (571) 272-4214. Any response to this Office action should be labeled appropriately (including serial number, Art Unit 2132, and type of response) and mailed to Commissioner for Patents, P.O. Box 1450, Alexandria, VA 22313-1450; hand-carried or delivered to the Customer Service Window at the Knox Building, 501 Dulany Street, Alexandria, VA 22314; faxed to (571) 273-8300; or filed electronically using the Patent Center. Information regarding the status of published or unpublished applications may be obtained from the Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about the Patent Center and visit https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Kevin Verbrugge/ Kevin Verbrugge Primary Examiner Art Unit 2132
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Prosecution Timeline

Jan 08, 2025
Application Filed
Feb 05, 2026
Non-Final Rejection — §DP (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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POWER-LOSS PROTECTION FOR ADDRESS CONVERSION TABLE USING A CHARGED CAPACITOR IN A STORAGE DEVICE
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Patent 12585583
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2y 5m to grant Granted Mar 24, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
89%
Grant Probability
86%
With Interview (-2.5%)
2y 2m
Median Time to Grant
Low
PTA Risk
Based on 570 resolved cases by this examiner. Grant probability derived from career allow rate.

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