DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
1. ACKNOWLEDGEMENT OF REFERENCES CITED BY APPLICANT
Information Disclosure Statement
As required by M.P.E.P. ' 609 (C), the applicant's submission of the Information Disclosure Statement, dated 1/9/25, is acknowledged by the examiner and the cited references have been considered in the examination of the claims now pending. As required by M.P.E.P. ' 609 C(2), a copy of the PTOL-1449 initialed and dated by the examiner is attached to the instant office action.
2. CLAIM OBJECTIONS
Claim Objections – Minor Informalities
Claims 1-18 are objected to because of the following informalities: antecedent basis. Claim 1 recites the limitation of “the first time” in line 6. It should recite “a first time” as it is the first recitation of this limitation. Independent claims 7 and 13 have a similar limitation; and the dependent claims inherit the deficiencies of their respective independent claim. Appropriate correction is required.
3. REJECTIONS NOT BASED ON PRIOR ART
Claim Rejections - 35 USC ' 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 13-18 are rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter. The claim(s) does/do not fall within at least one of the four categories of patent eligible subject matter because the claims could be directed towards a transitory computer readable medium. Claims 13-18 recites the limitations of “A data storage medium configured to store a plurality of instructions, wherein the plurality of instructions are executed by a controller to perform a data refresh method …”. (emphasis added) The Applicant’s specification does not explicitly teach which mediums they are limited to, and thus open-ended and could be construed as a transitory computer readable medium, i.e. signal per se. The Examiner suggests amended the claims to be directed to a “non-transitory storage medium” to overcome the rejections noted above.
4. REJECTIONS BASED ON PRIOR ART
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC ' 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-18 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ciocchini (US 20240071522).
With respect to claim 1, the Ciocchini reference teaches a data refresh method applicable to a data storage device comprising a non-volatile flash memory and a controller, wherein the non-volatile flash memory comprises a plurality of data blocks, (see fig. 1, memory device 140/130 and controller 115; and paragraphs 25-26 and 51-52) and the data refresh method is performed by the controller which comprises:
receiving a data reading instruction from a host; (paragraph 38, where data integrity manager 113 uses the logical address or translated physical address from a read command to determine which wordline group is targeted by the read command. Data integrity manager 113 uses lookup table 210 to find the slope factor for the corresponding wordline group)
determining whether a data block is read for the first time within a cycle, wherein the data block is searched for based on the data reading instruction; (see fig. 3; and paragraph 39, where FIG. 3 includes read window budget graph 305, representing initial RWB intercept and slope values for different wordline groups determined at a first point in time, read window budget graph 320, representing the same wordline groups with values determined at a second point in time, and an intercept adjusted lookup table 310 [The Examiner notes the time between first and second point in time is analogous to the ‘cycle’ as claimed]; and paragraph 38, where data integrity manager 113 uses the logical address or translated physical address from a read command to determine which wordline group is targeted by the read command)
in response to that the data block is read for the first time within the cycle, adding a first value to a read count of the data block; (paragraph 32, where the data integrity manager 113 can adjust a read counter increment amount based on a read disturb stress slope factor for a specific wordline or wordline group [including the ‘first time’])
determining whether the read count increased is greater than a refresh threshold; (paragraph 52, where the processing device executes a read disturb scan. For example, the data integrity manager 113 scans the block (or other unit of read counter granularity) to determine whether the data stored in the block satisfies a refresh threshold) and
in response to that the read count increased is greater than the refresh threshold, performing a refresh operation on the data block. (paragraph 53, where the data integrity manager 113 uses the results of the read disturb scan from operation 435 to determine whether the number of errors detected in the data integrity scan satisfies a refresh threshold. If the number of errors detected satisfies the refresh threshold, the data integrity manager 113 uses an error correction scheme to rewrite the data (e.g., to a different block))
With respect to claim 2, the Ciocchini reference teaches the data refresh method according to claim 1, further comprising: in response to that the data block is not read for the first time within the cycle, adding a second value to the read count of the data block, wherein the second value is less than the first value. (paragraph 32, where the data integrity manager 113 can adjust a read counter increment amount based on a read disturb stress slope factor for a specific wordline or wordline group [which would be different for the ‘second time’ and could be less than the first value])
With respect to claim 3, the Ciocchini reference teaches the data refresh method according to claim 2, wherein the second value is 1. (paragraph 32, where the data integrity manager 113 can adjust a read counter increment amount based on a read disturb stress slope factor for a specific wordline or wordline group [which could be any number including ‘1’])
With respect to claim 4, the Ciocchini reference teaches the data refresh method according to claim 1, wherein the cycle is at least 120 seconds. (paragraph 33, where as shown in read window budget slope graph 205, RWB slopes are measured in millivolts (mV) per decade or similar metrics. In some embodiments, a decade is measured as a number of block cycles, such as 10,000 block program/erase cycles. In other embodiments, a decade may be measured as an amount of elapsed time or another metric [i.e. could be any time or metric])
With respect to claim 5, the Ciocchini reference teaches the data refresh method according to claim 1, wherein the first value is at least 120. (paragraph 32, where the data integrity manager 113 can adjust a read counter increment amount based on a read disturb stress slope factor for a specific wordline or wordline group [which could be any number including ‘120’])
With respect to claim 6, the Ciocchini reference teaches the data refresh method according to claim 1, wherein the refresh threshold is at least 50,000. (paragraph 51, where the threshold may be changed depending on the tasks of the overall system, the environment for the overall system, and other factors. In some embodiments, each of the blocks (or other unit of read counter granularity) has a different threshold based on characteristics of that block [which could be any number including ’50,000’])
Claims 7-12 are the data storage device implementation of claims 1-6, and rejected under the same rationale as shown above. The Examiner notes the limitations of “a non-volatile flash memory comprising a plurality of data blocks; and a controller coupled to the non-volatile flash memory and configured to perform a data refresh method” noted above are taught by fig. 1, memory device 140/130 and controller 115; and paragraphs 25-26 and 51-52)
Claims 7-12 are the data storage medium implementation of claims 1-6, and rejected under the same rationale as shown above.
5. RELEVANT ART CITED BY THE EXAMINER
The following prior art made of record and not relied upon is cited to establish the level of skill in the applicant's art and those arts considered reasonably pertinent to applicant's disclosure. See MPEP 707.05(c).
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. These references include:
Goda (US 20240168879), which teaches an apparatus can comprise a memory array comprising a plurality of strings of memory cells each comprising: a first group of memory cells coupled to a first group of access lines and corresponding to a first erase block; and a second group of memory cells coupled to a second group of access lines and corresponding to a second erase block. A controller is configured to determine a cumulative amount of read disturb stress experienced by the first erase block by monitoring read disturb stress experienced by the first erase block due to: read operations performed on the first erase block; read operations performed on the second erase block; and program verify operations performed on the second erase block. The controller can perform an action on the first erase block responsive to the cumulative amount of read disturb stress experienced by the first erase block meeting a criteria;
Kanno (US 20190004964), which teaches a memory system copies content of a first logical-to-physical address translation table corresponding to a first region of a nonvolatile memory to a second logical-to-physical address translation table corresponding to a second region of the nonvolatile memory. When receiving a read request specifying a logical address in the second region, the memory system reads a part of the first data from the first region based on the second logical-to-physical address translation table. The memory system detects a block which satisfies a refresh condition from a first group of blocks allocated to the first region, corrects an error of data of the detected block and writes the corrected data back to the detected block; and
Wang (US 20220044744), which teaches methods, systems, devices, and computer-readable media for performing read disturb management of a memory device. In one embodiment, a method is disclosed comprising retrieving a value of a read counter for a block associated with a read request issued to a memory array; refreshing valid word lines in the block if the value of the read counter exceeds a first threshold; identifying a set of valid word lines in the block if the value of the read counter exceeds a second threshold, the second threshold lower than the first threshold; identifying a subset of the set of valid word lines, the subset of the set of valid word lines including word lines having an error rate above a pre-configured error rate threshold; and refreshing the subset of the set of valid word lines.
6. CLOSING COMMENTS
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PRASITH THAMMAVONG whose telephone number is (571) 270-1040. The examiner can normally be reached Monday - Friday 12-8 PM EST.
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/PRASITH THAMMAVONG/
Primary Examiner, Art Unit 2137