DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 4-8, 10 and 13-15 are rejected under 35 U.S.C. 102(a) (1) as being anticipated by Fletcher et al. (US 2023/0353048 and Fletcher hereinafter)
Regarding claim 1, Fletcher discloses an apparatus [figs. 1-10], comprising: a plurality of switch circuit groups [801A-802B and B02A; 801C-801D and B02B; 803A-803B and 802C; fig. 8], wherein each switch circuit group comprises a primary power switch circuit [200/300/400/500, figs. 2-5] and a set of secondary power switch circuits [200/300/400/500, figs. 2-5]; and a connection circuit [a connection node between 101 and 104 including buffer circuits 204-206, 304-306, 404-406, 504-506; figs. 2-5] coupled to the plurality of switch circuit groups, the connection circuit configured to: receive a first control signal [control signals 807, fig. 8] from a control circuit [101, fig. 1] and provide the first control signal to the plurality of switch circuit groups in a serial order [one at a time], wherein the plurality of switch circuit groups is configured to initialize based on the first control signal; and receive a second control signal [control signals 809, fig. 8] from the control circuit and provide the second control signal in parallel to the switch circuit groups, wherein selected ones of the switch circuit groups are turned on and unselected ones of the switch circuit groups are turned off based on the second control signal [par. 76-83].
Regarding claim 4, Fletcher discloses [figs. 1-10] wherein each primary power switch circuit comprises: a first power switch [e.g., 401, fig. 4] coupled to an input power supply signal [407] and an output power supply signal [408]; and a first set of devices configured to [par. 0042-0045]: turn on the first power switch in response to the first control signal; provide the first control signal [409] to a next secondary power switch circuit [e.g., 801B, fig. 8]; turn on or turn off the first power switch based on the second control signal [410]; and provide the second control signal to the next secondary power switch circuit [e.g., power switches in figs. 2-5 in plurality of switch circuit groups in fig. 8].
Regarding claim 5, Fletcher discloses [figs. 1-10] wherein each secondary power switch circuit [power switches in figs. 2-5 in plurality of switch circuit groups in fig. 8] comprises: a second power switch [e.g., 401, fig. 4] coupled to the input power supply signal and the output power supply signal; and a second set of devices configured to [par. 0042-0045]: turn on the second power switch in response to the first control signal [409]; provide the first control signal to a following secondary power switch circuit [e.g., power switches in figs. 2-5 in plurality of switch circuit groups in fig. 8]; turn on or turn off the second power switch based on the second control signal; and provide the second control signal the following secondary power switch circuit.
Regarding claim 6, Fletcher discloses [figs. 1-10] wherein the switch circuit groups are initialized in a serial order [activate one at a time] and the power switch circuits within each switch circuit group are initialized in a serial order [activate one at a time].
Regarding claim 7, Fletcher discloses [fig. 8] wherein the plurality of switch groups is configured to generate a regulated output voltage [805/806]; and the selected ones of the switch circuit groups vary over time based on a comparison [par. 0075] of the regulated output voltage to a target voltage [first reference voltage, par. 0048 and 0075].
Regarding claim 8, Fletcher discloses [figs. 1-10] wherein each of the switch circuit groups outputs a substantially different amount of current than other ones of the switch circuit groups [par. 0005, 0022-0026 and 0085-0086].
Regarding claim 10, Fletcher discloses a method [see figs. 1-10], comprising: initializing [activating using control signal], in response to a first control signal [control signals 807, fig. 8], a plurality of switch circuit groups [801A-802B and B02A; 801C-801D and B02B; 803A-803B and 802C; fig. 8], wherein the switch circuit groups are initialized in a serial order [one at a time], and wherein each switch circuit group comprises a primary power switch circuit [200/300/400/500, figs. 2-5] and a set of secondary power switch circuits [200/300/400/500, figs. 2-5]; and receiving a second control signal [control signals 809, fig. 8] in parallel by the switch circuit groups, wherein selected ones of the switch circuit groups are turned on and unselected ones of the switch circuit groups are turned off based on the second control signal [par. 76-83].
Regarding claim 13, Fletcher discloses [see figs. 1-10] wherein initializing the plurality of switch circuit groups comprises: initializing the switch circuit groups in a serial order [activate one at a time]; and initializing the power switch circuits within each switch circuit group in a serial order [activate one at a time].
Regarding claim 14, Fletcher discloses [see figs. 1-10] further comprising generating, by the plurality of switch groups, a regulated output voltage [805/806], wherein the selected ones of the switch circuit groups vary over time based on a comparison [par. 0075] of the regulated output voltage to a target voltage [first reference voltage, par. 0048 and 0075].
Regarding claim 15, Fletcher discloses [see figs. 1-10] wherein each of the switch circuit groups outputs a substantially different amount of current than other ones of the switch circuit groups [par. 0005, 0022-0026 and 0085-0086].
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 17 and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Fletcher et al. in view of Kim et al. (US 10535394 and Kim hereinafter).
Regarding claim 17, Fletcher discloses a system [figs. 1-10], comprising: a switch control circuit [101, fig. 1]; a plurality of switch circuit groups [801A-802B and B02A; 801C-801D and B02B; 803A-803B and 802C; fig. 8], wherein each switch circuit group comprises a primary power switch circuit [200/300/400/500, figs. 2-5] and a set of secondary power switch circuits [200/300/400/500, figs. 2-5]; and a connection circuit [a connection node between 101 and 104 including buffer circuits 204-206, 304-306, 404-406, 504-506; figs. 2-5] coupled to the switch control circuit and the plurality of switch circuit groups, the connection circuit configured to: receive a first control signal [control signals 807, fig. 8] from the switch control circuit and provide the first control signal to the plurality of switch circuit groups in a serial order [one at a time], wherein the plurality of switch circuit groups are configured to initialize based on the first control signal; and receive a second control signal [control signals 809, fig. 8] from the switch control circuit and provide the second control signal in parallel to the switch circuit groups, wherein selected ones of the switch circuit groups are turned on and unselected ones of the switch circuit groups are turned off based on the second control signal [par. 76-83]. Fletcher does not explicitly disclose a circuit block and plurality of switch circuit groups coupled to the circuit block.
However, Kim discloses [see fig. 1] a circuit block [130] and plurality of switch circuit groups [120, cl. 4, ln. 52-62] coupled to the circuit block. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to modify the invention of Fletcher by incorporating circuit block as taught in Kim in order to control operation performance.
Regarding claim 19, Fletcher discloses [figs. 1-8] wherein each primary power switch circuit comprises: a first power switch [e.g., 401, fig. 4] coupled to an input power supply signal [407] and an output power supply signal [408]; and a first set of devices configured to [par. 0042-0045]: turn on the first power switch in response to the first control signal; provide the first control signal [409] to a next secondary power switch circuit [e.g., 801B, fig. 8]; turn on or turn off the first power switch based on the second control signal [410]; and provide the second control signal to the next secondary power switch circuit [e.g., power switches in figs. 2-5 in plurality of switch circuit groups in fig. 8].
Regarding claim 20, Fletcher discloses [figs. 1-8] wherein each secondary power switch circuit [power switches in figs. 2-5 in plurality of switch circuit groups in fig. 8] comprises: a second power switch [e.g., 401, fig. 4] coupled to the input power supply signal and the output power supply signal; and a second set of devices [par. 0042-0045] configured to: turn on the second power switch in response to the first control signal [409]; provide the first control signal to a following secondary power switch circuit [e.g., power switches in figs. 2-5 in plurality of switch circuit groups in fig. 8]; turn on or turn off the second power switch based on the second control signal; and provide the second control signal to the following secondary power switch circuit.
Claims 2, 9, 11 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Fletcher et al.
Regarding claims 2 and 11, Fletcher discloses all the features with respect to claims 2 and 10 as outlined above. Fletcher further discloses [see fig. 8] wherein the connection circuit is further configured to: receive a third control signal [808] from the control circuit and provide the third control signal to the plurality of switch circuit groups in parallel. Fletcher does not explicitly disclose wherein the plurality of switch circuit groups are all turned on based on the third control signal. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the switching sequence so that the plurality of switch circuit groups are all turned on based on the third control signal is a predictable and routine modification of known control techniques for power switching applications.
Regarding claims 9 and 16, Fletcher discloses all the features with respect to claims 8 and 15 as outlined above. Fletcher does not explicitly disclose wherein the amount of current approximately doubles from each one of the switch circuit groups to a next one of the switch circuit groups. One of ordinary skill in the art would have been motivated to have used the claimed range since such a range, absent any criticality (i.e. unobvious and/or unexpected result(s)), is generally achievable through routine optimization/experimentation, and since discovering the optimum or workable ranges, where the general conditions of a claim are disclosed in the prior art, involves only routing skill in the art, In re Alter, 105 USPQ 233 (CCPA 1955). Moreover, in the absence of any criticality (i.e. unobvious and/or unexpected result(s)), the parameter set forth above would have been obvious to a person having ordinary skill in the art at the time the invention was made, In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990)
Allowable Subject Matter
Claims 3, 12 and 18 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
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/METASEBIA T RETEBO/Primary Examiner, Art Unit 2836
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