DETAILED ACTION
This office action is in response to the correspondence filed 01/09/2025. This application has a provisional application 63/271,651 filed on 10/25/2021. Claims 1-21 are pending and are examined.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Applicant's claim for the benefit of a prior-filed application under 35 U.S.C. 119(e) or under 35 U.S.C. 120, 121, 365(c), or 386(c) is acknowledged.
Information Disclosure Statement
The information disclosure statement (IDS) was submitted on 11/18/2025. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-5 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. The claims recite encoding a data vector using a bit position register and detecting a mismatch in the data vector based on a bit position update.
The limitation of encoding a data vector and determining a mismatch, as drafted, is a process that, under its broadest reasonable interpretation, covers performance of the limitation in the mind but for the recitation of generic computer components. That is, other than reciting “by one or more processor,” nothing in the claim element precludes the step from practically being performed in the mind. For example, but for the “by a processor” language, “encoding” and “determining” in the context of the claims encompass the user mentally transforming some data and deciding if there is a mismatch. If a claim limitation, under its broadest reasonable interpretation, covers performance of the limitation in the mind but for the recitation of generic computer components, then it falls within the “Mental Processes” grouping of abstract ideas. Accordingly, the claim recites an abstract idea.
This judicial exception is not integrated into a practical application. In particular, the claim only recites one additional element – using a processor to perform both the encoding and determining steps. The processor in both steps is recited at a high-level of generality (i.e., as a generic processor performing a generic computer function of encoding a data vector and determining a mismatch) such that it amounts no more than mere instructions to apply the exception using a generic computer component. Accordingly, this additional element does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea. The claim is directed to an abstract idea.
The claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional element of using a processor to perform both the encoding and determining steps amounts to no more than mere instructions to apply the exception using a generic computer component. Mere instructions to apply an exception using a generic computer component cannot provide an inventive concept. The claims are not patent eligible.
Allowable Subject Matter
Claims 1-5 contain allowable subject matter but remain rejected under 101 rejections.
Claims 6-8 are objected to as being dependent upon rejected base claims, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 9-21 are allowed.
The following is an examiner’s statement of reasons for allowance:
Bahrenburg; Matthew et al. (US Pub. No. 20210226788 A1) discloses authenticating computing system requests across tenants of a multi-tenant database system. While Bahrenburg discloses authentication of computing system requests across tenants of multi-tenant database system; authentication is facilitated using a central registry that is accessible by and independent from the tenants of the multi-tenant database system, it fails to disclose inverting one or more bits at one or more bit positions of protected data vector, generated by a second tenant, to generate a reconstructed data vector based on a bit position register value associated with a first tenant; and responsive to detecting an uncorrectable error in the reconstructed data vector, blocking access to the protected data vector for the first tenant as described in the claims.
Cai; Liang et al. (US Pub. No. 20220342573 A1) discloses access control configurations for shared memory. While Cai discloses a creation of a new shared memory resource, using a subregion of an existing memory resource, where the additional fields may indicate a parent memory resource for the new memory resource; the additional fields may also include a value which may indicate a processor which has write permission for a respective memory region of the shared memory, where other processors of the device may be prevented from writing to the memory region, it fails to disclose inverting one or more bits at one or more bit positions of protected data vector, generated by a second tenant, to generate a reconstructed data vector based on a bit position register value associated with a first tenant; and responsive to detecting an uncorrectable error in the reconstructed data vector, blocking access to the protected data vector for the first tenant as described in the claims.
Kappes et al. (NPL – “Multitenant Access Control for Cloud-Aware Distributed Filesystems”) discloses enabling data sharing in a virtualization environment that serves multiple tenants. While Kappes discloses the Dike system design including secure protocols to natively support multitenant access control; authorized file access is restricted to a specific tenant and user as requested by the protocols that establish a key and a data ticket, it fails to disclose inverting one or more bits at one or more bit positions of protected data vector, generated by a second tenant, to generate a reconstructed data vector based on a bit position register value associated with a first tenant; and responsive to detecting an uncorrectable error in the reconstructed data vector, blocking access to the protected data vector for the first tenant as described in the claims.
Therefore, the pending claims are allowable as the prior art of record does not disclose all the combination of features as described in the claims; nor would it have been obvious to one of ordinary skill in the art to further modify the prior art to include all of the deficient features, as set forth in the allowable claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
YAKAN; Hani US-PGPUB US 20200213313 A1 Methods for establishing shared memory spaces for data access and distribution
Rachapudi; Amarnath et al. US-PGPUB US 20210326218 A1 Methods for protecting multitenant databases in networked storage systems
Keeth; Brent et al. US-PGPUB US 20200285498 A1 Protected regions management of memory
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KA SHAN CHOY whose telephone number is (571)272-1569. The examiner can normally be reached on MON - FRI: 9AM-5:30PM EST Alternate Fridays.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Amir Mehrmanesh can be reached at (571) 270-3351. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/KA SHAN CHOY/Primary Examiner, Art Unit 2435
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