Prosecution Insights
Last updated: April 19, 2026
Application No. 19/016,702

CANCELING PREFETCH OF CACHE BLOCKS BASED ON AN ADDRESS AND A BIT FIELD

Non-Final OA §DP
Filed
Jan 10, 2025
Examiner
GIARDINO JR, MARK A
Art Unit
2135
Tech Center
2100 — Computer Architecture & Software
Assignee
Sifive Inc.
OA Round
1 (Non-Final)
85%
Grant Probability
Favorable
1-2
OA Rounds
2y 7m
To Grant
87%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allow Rate
566 granted / 669 resolved
+29.6% vs TC avg
Minimal +2% lift
Without
With
+2.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
21 currently pending
Career history
690
Total Applications
across all art units

Statute-Specific Performance

§101
2.7%
-37.3% vs TC avg
§103
62.6%
+22.6% vs TC avg
§102
7.6%
-32.4% vs TC avg
§112
8.7%
-31.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 669 resolved cases

Office Action

§DP
DETAILED ACTION The instant application having Application No. 19/016,702 has a total of 20 claims pending in the application, there are 3 independent claims and 17 dependent claims, all of which are ready for examination by the examiner. INFORMATION CONCERNING DRAWINGS Drawings The applicant's drawings submitted 1/10/2025 are acceptable for examination purposes. ACKNOWLEDGEMENT OF REFERENCES CITED BY APPLICANT Information Disclosure Statement As required by M.P.E.P. ' 609 (C), the applicant's submission of the Information Disclosure Statement, dated 3/26/2025, is acknowledged by the examiner and the cited references have been considered in the examination of the claims now pending. As required by M.P.E.P. ' 609 C(2), a copy of the PTOL-1449 initialed and dated by the examiner is attached to the instant office action. DOUBLE PATENTING The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory obviousness-type double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the conflicting application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. Effective January 1, 1994, a registered attorney or agent of record may sign a terminal disclaimer. A terminal disclaimer signed by the assignee must fully comply with 37 CFR 3.73(b). Claims 1-20 are rejected on the ground of nonstatutory obviousness-type double patenting as being unpatentable over US 12,197,335. Although the conflicting claims are not identical, they are not patentably distinct from each other. Instant Application US 12,197,335 An apparatus comprising: a cache configured to: receive a prefetch message to generate a prefetch of one or more cache blocks of a group of cache blocks; and receive a cancel message that causes canceling the prefetch of the one or more cache blocks of the group of cache blocks, the cancel message including an address that indicates the group of cache blocks and a bit field that indicates the cache block of the one or more cache blocks of the group; and a processor core to use the cache to prefetch data. 1. An apparatus comprising: prefetch circuitry configured to: transmit a prefetch message to generate a prefetch of one or more cache blocks of a group of cache blocks; and transmit a cancel message that causes canceling the prefetch of the one or more cache blocks of the group of cache blocks, the cancel message including an address that indicates the group of cache blocks and a bit field that indicates the cache block of the one or more cache blocks of the group; and a processor core to use the prefetch circuitry to prefetch data. It would have been obvious to modify claim 1 of US 12,197,335 for the benefit of obtaining the invention as specified in claim 1 of the instant application, as it would be obvious to have circuitry to receive a message (as claimed in the instant application) that is transmitted (as claimed in US 12,197,335). The other independent claims correspond as follows: Instant Application US 12,197,335 Claim 7 Claim 8 Claim 15 Claim 11 Further, the dependent claims of both cases contain substantially similar limitations. STATEMENTS OF REASONS FOR ALLOWANCE The following is an examiner’s statement of reasons for allowance: In independent claims 1, 7, and 15 the following features taken in combination with the remaining limitations of the independent claims are not found in and/or are not obvious in view of the closest prior art of record. Claim 1 (and similarly for claims 7 and 15), "receive a cancel message that causes canceling the prefetch of the one or more cache blocks of the group of cache blocks, the cancel message including an address that indicates the group of cache blocks and a bit field that indicates the cache block of the one or more cache blocks of the group; and a processor core to use the cache to prefetch data;" Though a cancel message that causes canceling of a prefetch is known in the art, see for example, Gschwind et al (US 9,535,696), Fig. 5, and Arimilli et al (US 6,438,656), abstract, the cited prior art does not teach the cancel message including an address that indicates the group of cache blocks and a bit field that indicates the cache block of the one or more cache blocks of the group as required by claim 1. Claims 7 and 15 contain allowable subject matter for similar reasons. The dependent claims are allowable as they depend from an allowable base claim. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” RELEVANT ART CITED BY THE EXAMINER The following prior art made of record and not relied upon is cited to establish the level of skill in the applicant's art and those arts considered reasonably pertinent to applicant's disclosure. See MPEP 707.05(c). The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. These references include: Pierson et al (US 9,239,798) teaches Prefetcher With Arbitrary Downstream Prefetch Cancelation. CLOSING COMMENTS Conclusion STATUS OF CLAIMS IN THE APPLICATION The following is a summary of the treatment and status of all claims in the application as recommended by M.P.E.P. ' 707.07(i): CLAIMS REJECTED IN THE APPLICATION Per the instant office action, claims 1-20 have been rejected. DIRECTION OF FUTURE CORRESPONDENCES Any inquiry concerning this communication or earlier communications from the examiner should be directed to Mark Giardino whose telephone number is (571) 270-3565 and can normally be reached on M-F 9:00-5:30pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Mr. Jared Rutz can be reached at 571-272-5535. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300. /MARK A GIARDINO JR/Primary Examiner, Art Unit 2135
Read full office action

Prosecution Timeline

Jan 10, 2025
Application Filed
Feb 13, 2026
Non-Final Rejection — §DP (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
85%
Grant Probability
87%
With Interview (+2.3%)
2y 7m
Median Time to Grant
Low
PTA Risk
Based on 669 resolved cases by this examiner. Grant probability derived from career allow rate.

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