DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Claims 13-18 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected Group II, there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on 6/22/2026.
Applicant’s election of Group I in the reply filed on 6/22/2026 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-2 and 10-11 are rejected under 35 U.S.C. 103 as being unpatentable over Meiri et al. (US 2023/0009529 hereinafter Meiri) in view of Wang (US 2025/0068332 A1).
Regarding claim 1, Meiri discloses a method, comprising, based on a request from a memory writing process, locking, by a system comprising one or more processors, a portion of memory with a first write lock that grants exclusive write access to the memory writing process ([0156], at least one existing technique may require that a lock be acquired that provides exclusive access to the target logical address, or page mapped to the target logical address, on both systems before the write is allowed to proceed to modify the target logical address); based on a releasing of the first write lock, designating, by the system, the portion of memory with a write available designation ([0165]-[0168], releasing the lock on the page of the system after completing responsive to acquiring the lock for the page on all systems of the metro cluster, on each system of the metro cluster), as: available for acquisition of a second write lock that grants exclusive write access ([0176], the write originator system that received the current write tries to acquire the lock of its own local page for the target logical address; the originator system acquires its local lock for the page if the lock for the page on the write originator system is already held by another system or thread for another write, processing of the current write blocks and waits until the lock for the page on the originator system is released where, upon its release). Meiri differs from the claimed invention in not specifically teaching unavailable for access by a memory reading process; and based on a condition being determined to be present, removing, by the system, the write available designation. However, Wang teaches no other process currently performs a read operation on the target data if the read identification bit is the third bit value ([0049], read as unavailable for access by a memory reading process) and data editing operation can be performed on the target data, such as modifying or deleting any element in the target data after the first process completes the pre-write operation ([0042]-[0043], read as removing, by the system, the write available designation based on a condition being determined to be present) in order to reduce low concurrency efficiency of read-write data. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Meiri in having unavailable for access by a memory reading process; and based on a condition being determined to be present, removing, by the system, the write available designation, as per teaching of Wang, in order to reduce low concurrency efficiency of read-write data.
Regarding claim 2, Meiri teaches that after the designating of the portion of memory with the write available designation, no writes to the portion of memory occur, and wherein, after the removal of the write available designation, the memory reading process reads the portion of memory ([0157]-[0161], the lock providing exclusive access for the page including the target logical address is acquired and executing the write to the target logical address on all systems of the metro cluster, releasing the lock for the page on all systems of the metro cluster).
Regarding claim 10, Meiri differs from the claimed invention in not specifically teaching based on the designating of the portion of memory as write available, communicating, by the system to the memory reading process, a signal indicating that the memory writing process continues to write to the portion of memory, wherein the portion of memory is unavailable for access by the memory reading process in response to communicating the signal. However, Wang teaches such ([0038], if the pre-write identification bit is a first bit value, a pre-write approval instruction is fed back to the first process, the pre-write identification bit is set to a second bit value, and the first process is controlled to perform a pre-write operation based on a requested pre-write lock and read lock application requests initiated by the other process are responded when the pre-write identification bit is the second bit value). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Meiri in having communicating, by the system to the memory reading process, a signal indicating that the memory writing process continues to write to the portion of memory based on the designating of the portion of memory as write available, wherein the portion of memory is unavailable for access by the memory reading process in response to communicating the signal, as per teaching of Wang, in order to achieve a purpose of sharing the target data.
Regarding claim 11, Meiri does not specifically disclosing that the portion of memory is unavailable for access by the memory reading process based on the memory with the write available designation appearing to the memory reading process as memory at an end of a file. However, Wang teaches pre-write application requests and write application requests of other threads are blocked to response when the pre-write identification bit is configured as the second value ([0040]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Meiri in having that the portion of memory is unavailable for access by the memory reading process based on the memory with the write available designation appearing to the memory reading process as memory at an end of a file, as per teaching of Wang, in order to prevent other processes from performing pre-write operations and write operations.
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Meiri et al. (US 2023/0009529 hereinafter Meiri) in view of Wang (US 2025/0068332 A1) as applied in claim 1 above, and further in view of Le et al. (US 9,325,790 B).
Regarding claim 12, the combination of Meiri and Wang differs from the claimed invention in not specifically teaching that the portion of memory is unavailable for access by the memory reading process is based on the portion of memory with the write available designation appearing to the memory reading process as memory where exclusive write access has been granted. However, Le teaches to check the lock state data in the session data to determine which client is permitted to write to file N, and the D-blade will determine that only the first client has the exclusive lock state and is permitted to write to file N in order to prevent conflict in access (col. 17 lines 37-50). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combination of Meiri and Wang, in having that the portion of memory is unavailable for access by the memory reading process is based on the portion of memory with the write available designation appearing to the memory reading process as memory where exclusive write access has been granted, as per teaching of Le, in order to prevent conflict in access.
Allowable Subject Matter
Claims 19-20 are allowed.
Claims 3-9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: The prior art of record fails nor suggest “based on an estimated speed determined to be applicable to the memory writing process, selecting, by the system, a buffer value corresponding to usage of a buffer to use for the memory reading process, wherein the condition comprises the buffer value” as recited in claim 3; and “based on the write prediction, designating the second data blocks as being in a write reserved state; and based on the write reserved state: rejecting a first request from a reading process to read the second data blocks, and granting a second request from another memory writing process to acquire a second lock that grants exclusive writing capability to the second data blocks” as recited in claim 19. Claims 4-9 and 20 are allowed because of depending on claims 3 and 19, respectively, containing the same allowable subject matter.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ZHUO H LI whose telephone number is (571)272-4183. The examiner can normally be reached Mon. Tue. and Thurs. 8:00-4:00 PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Rocio Del Mar Perez-Velez can be reached at (571)-270-5935. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ZHUO H LI/Primary Examiner, Art Unit 2133
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