MEMBER FOR SEMICONDUCTOR MANUFACTURING EQUIPMENT

§102 §103

Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 2 and 6 are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Kosakai (JP 2006049352 A). Regarding claim 2, Kosakai teaches (reproduced and annotated Figs. below) a member for a semiconductor manufacturing equipment (“plasma processing apparatus”) comprising a ceramic substrate (dielectric plate 21), PNG media_image1.png 64 886 media_image1.png Greyscale wherein the ceramic substrate comprises an upper surface (36) having a plurality of protrusions (protrusions 31) for placing a wafer (W), wherein each of the plurality of protrusions (31) has an upper end surface (32a), and at least one of the upper end surfaces has a patterned concave-convex shape, wherein at least one of the upper end surfaces having the patterned concave-convex shape has a pattern composed of a plurality of dimples. PNG media_image2.png 1163 1306 media_image2.png Greyscale Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1 and 4-5 are rejected under 35 U.S.C. 103 as being unpatentable over Kosakai in view of Liao (US 11448955 B2). Regarding claim 1, Kosakai teaches (reproduced and annotated Figs. above) a member for a semiconductor manufacturing equipment (“plasma processing apparatus”) comprising a ceramic substrate (dielectric plate 21), PNG media_image1.png 64 886 media_image1.png Greyscale wherein the ceramic substrate comprises an upper surface (36) having a plurality of protrusions (protrusions 31) for placing a wafer (W), wherein each of the plurality of protrusions (31) has an upper end surface (32a), and at least one of the upper end surfaces has a patterned concave-convex shape, wherein at least one of the upper end surfaces having the patterned concave-convex shape has a pattern composed of a plurality of dimples. Liao teaches a mask support (Fig. 6F) with a plurality of streak-like convex portions extending from a center of gravity of the upper surface of the ceramic substrate toward an outer periphery (col. 8, lines 2-4: “as shown in FIG. 6F, the bumps viewed from the top direction are in a radial-strip distribution”; col. 8, lines 11-13: “ said patterns would make said surface uneven, so that the connection between the mask and the electrostatic chuck becomes more difficult”). It would have been obvious to one having ordinary skill in the art before effective filing date of the claimed invention to make bumps/dimples of Kosakai streak-like convex shape. Doing so would reduce connection between the ceramic substrate and the wafer. Regarding claims 4-5, both Kosakai and Liao teach the patterned concave-convex shape has a convex portion region and a concave portion region, the concave portion region has a first height, the convex portion region has a second height, the first height is lower than the second height. However they are silent regarding the claimed ratio. It would have been an obvious matter of design choice to change the claimed ratio, based support gap needed, since such a modification would have involved a mere change in the size of a component. A change in size is general recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955). Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Kosakai in view of Park (KR 20020058558 A). Regarding claim 3, Kosakai teaches (reproduced and annotated Figs. above) a member for a semiconductor manufacturing equipment (“plasma processing apparatus”) comprising a ceramic substrate (dielectric plate 21), PNG media_image1.png 64 886 media_image1.png Greyscale wherein the ceramic substrate comprises an upper surface (36) having a plurality of protrusions (protrusions 31) for placing a wafer (W), wherein each of the plurality of protrusions (31) has an upper end surface (32a), and at least one of the upper end surfaces has a patterned concave-convex shape, wherein at least one of the upper end surfaces having the patterned concave-convex shape has a pattern composed of a plurality of dimples. Park teaches a wafer supporting substrate (chuck 20) with a net-like convex portion in which a plurality of linear convex portions intersect (see Fig. 6) to reduce contact between the wafer and the substrate. PNG media_image3.png 42 910 media_image3.png Greyscale It would have been obvious to one having ordinary skill in the art before effective filing date of the claimed invention to use net-like convex shape pattern to reduce contact between the wafer and the ceramic substrate. Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Kosakai in view of Liao and Park. Regarding claim 6, Kosakai teaches (reproduced and annotated Figs. above) a member for a semiconductor manufacturing equipment (“plasma processing apparatus”) comprising a ceramic substrate (dielectric plate 21), PNG media_image1.png 64 886 media_image1.png Greyscale wherein the ceramic substrate comprises an upper surface (36) having a plurality of protrusions (protrusions 31) for placing a wafer (W), wherein each of the plurality of protrusions (31) has an upper end surface (32a), and at least one of the upper end surfaces has a patterned concave-convex shape, wherein at least one of the upper end surfaces having the patterned concave-convex shape has a pattern composed of a plurality of dimples. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Ichinose (CN 105408991 B) teaches wafer support with streak-like convex portions. PNG media_image4.png 815 576 media_image4.png Greyscale Sasaki (US 20070217114 A1) teaches ceramic wafer support with plurality of protrusions (31) and dimples (32). PNG media_image5.png 686 570 media_image5.png Greyscale Moriya (WO 2014156619 A1) teaches a ceramic substrate (2) with a plurality of dimples (42). PNG media_image6.png 88 914 media_image6.png Greyscale PNG media_image7.png 734 522 media_image7.png Greyscale Any inquiry concerning this communication or earlier communications from the examiner should be directed to MAHDI H NEJAD whose telephone number is (571)270-0464. The examiner can normally be reached Monday-Friday 7:30am-4pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, David Posigian can be reached at (313) 446-6546. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. MAHDI H. NEJAD Examiner Art Unit 3723 /MAHDI H NEJAD/Primary Examiner, Art Unit 3723