DETAILED ACTION
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 01/13/2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 5 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 5, the claim recites the limitation “wherein after the acquiring a PCIe system topology of a server according to the PCIe physical topology data and PCIe device logical information, the server asset information acquisition method further comprises: sending the PCIe device logical information to the baseboard management controller, to enable the baseboard management controller to obtain the PCIe system topology of the server according to the PCIe physical topology data and the PCIe device logical information”. It is unclear on whether the same step of obtaining/acquiring the PCIe system topology is repeated and/or duplicated in the limitation e.g. obtaining the PCIe system topology after the acquiring of the same PCIe system topology. Accordingly, the claim is indefinite.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2, 5, 11-14, and 18-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Su et al US 20160261455.
Regarding claim 1, Su teaches a server asset information acquisition method, comprising:
sending a high-speed serial computer expansion bus standard (PCIe) physical topology acquisition request to a baseboard management controller in a startup process of a basic input output system (see para 0031, the BMC can receive a command from an administrator device to collect system debug information e.g. the topology acquisition request, also see para 0044, the system configuration information of the system can include identification and model type information for processors, memory, PCI-Express cards, storage devices, etc.);
acquiring PCIe physical topology data corresponding to the PCIe topology acquisition request and returned by the baseboard management controller, wherein the PCIe physical topology data is stored in a preset memory accessible by the baseboard management controller (see para 0033, the BMC can retrieve the system logs from the non-volatile storage of the BMC); and
acquiring a PCIe system topology of a server according to the PCIe physical topology data and PCIe device logical information (see para 0033, the BMC can summarize the hardware configuration information in a report comprising central processing unit (CPU) topology, memory topology, expansion slot topology, hardware identification, or hardware network address. For example, the report can include information on which memory slots are populated, which expansion slots contain expansion cards, a MAC address of a local area network (LAN) card, or HDD info for an installed HDD, also see para 0038, the BMC can send the debug file to the administrator device).
Regarding claim 2, Su further teaches the PCIe physical topology data comprises at least one of PCIe root port information, PCIe bandwidth information, a PCIe device type, and a PCIe device number; and the PCIe device logical information comprises at least one of a device type, a root port, and bus device function information corresponding to each PCI device (see para 0033, the BMC can summarize the hardware configuration information in a report comprising central processing unit (CPU) topology, memory topology, expansion slot topology, hardware identification, or hardware network address. For example, the report can include information on which memory slots are populated, which expansion slots contain expansion cards, a MAC address of a local area network (LAN) card, or HDD info for an installed HDD, also see para 0044, the system configuration information of the system can include identification and model type information for processors, memory, PCI-Express cards, storage devices, etc.).
Regarding claim 5, Su further teaches sending the PCIe device logical information to the baseboard management controller, to enable the baseboard management controller to obtain the PCIe system topology of the server according to the PCIe physical topology data and the PCIe device logical information (see para 0033, the BMC can request the BIOS to send to the BMC the hardware configuration information, in response to receiving the command… the BMC can summarize the hardware configuration information in a report comprising central processing unit (CPU) topology, memory topology, expansion slot topology, hardware identification, or hardware network address. For example, the report can include information on which memory slots are populated, which expansion slots contain expansion cards, a MAC address of a local area network (LAN) card, or HDD info for an installed HDD).
Regarding claim 11, Su further teaches utilizing the PCIe system topology actually configured in the server for subsequent processing comprising at least one of: web page display, heat dissipation strategy adjustment, and PCIe physical topology data check (see para 0058-0059, a user (e.g., an administrator) can use the BIOS 710 to specify clock and bus speeds, specify what peripherals are attached to the computer system, specify monitoring of health (e.g., fan speeds and CPU temperature limits), and specify a variety of other parameters that affect overall performance and power usage of the computer system… The administrator can also remotely communicate with the management controller 780 to take some corrective action such as resetting or power cycling the system to restore functionality).
Regarding claim 12, Su teaches a server (see figure 7, computer system 700), comprising:
a memory, configured to store a computer program (memory 720); and
a processor (processor 740), configured to implement, when executing the computer program, operations comprising:
sending a high-speed serial computer expansion bus standard (PCIe) physical topology acquisition request to a baseboard management controller in a startup process of a basic input output system (see para 0031, the BMC can receive a command from an administrator device to collect system debug information e.g. the topology acquisition request, also see para 0044, the system configuration information of the system can include identification and model type information for processors, memory, PCI-Express cards, storage devices, etc.);
acquiring PCIe physical topology data corresponding to the PCIe topology acquisition request and returned by the baseboard management controller, wherein the PCIe physical topology data is stored in a preset memory accessible by the baseboard management controller (see para 0033, the BMC can retrieve the system logs from the non-volatile storage of the BMC); and
acquiring a PCIe system topology of a server according to the PCIe physical topology data and PCIe device logical information (see para 0033, the BMC can summarize the hardware configuration information in a report comprising central processing unit (CPU) topology, memory topology, expansion slot topology, hardware identification, or hardware network address. For example, the report can include information on which memory slots are populated, which expansion slots contain expansion cards, a MAC address of a local area network (LAN) card, or HDD info for an installed HDD, also see para 0038, the BMC can send the debug file to the administrator device).
Regarding claim 13, Su teaches a server asset information providing method, comprising:
acquiring, by a baseboard management controller, a high-speed serial computer expansion bus standard (PCIe) physical topology acquisition request of a server (see para 0031, the BMC can receive a command from an administrator device to collect system debug information e.g. the topology acquisition request, also see para 0044, the system configuration information of the system can include identification and model type information for processors, memory, PCI-Express cards, storage devices, etc.),
acquiring PCIe physical topology data from a preset memory according to the PCIe physical topology acquisition request (see para 0033, the BMC can retrieve the system logs from the non-volatile storage of the BMC); and
sending the PCIe physical topology data to the server to enable the server to acquire a PCIe system topology of the server according to the PCIe physical topology data and PCIe device logical information (see para 0033, the BMC can summarize the hardware configuration information in a report comprising central processing unit (CPU) topology, memory topology, expansion slot topology, hardware identification, or hardware network address. For example, the report can include information on which memory slots are populated, which expansion slots contain expansion cards, a MAC address of a local area network (LAN) card, or HDD info for an installed HDD, also see para 0038, the BMC can send the debug file to the administrator device).
Regarding claim 14, Su further teaches receiving the PCIe device logical information sent by the server; and acquiring the PCIe system topology of the server according to the PCIe physical topology data and the PCIe device logical information (see para 0033, the BMC can summarize the hardware configuration information in a report comprising central processing unit (CPU) topology, memory topology, expansion slot topology, hardware identification, or hardware network address. For example, the report can include information on which memory slots are populated, which expansion slots contain expansion cards, a MAC address of a local area network (LAN) card, or HDD info for an installed HDD, also see para 0038, the BMC can send the debug file to the administrator device).
Regarding claim 18, Su further teaches a baseboard management controller (see figure 7, BMC 780), comprising:
a memory, configured to store a computer program (see para 0009, the non-transitory computer-readable medium includes instructions which, when executed by the BMC); and
a processor, configured to implement, when executing the computer program, the operations of the server asset information providing method according to claim 13 (see para 0059, The management controller 780 can be a specialized microcontroller).
Regarding claim 19, Su further teaches a non-transitory computer non-volatile readable storage medium, wherein the computer non-volatile readable storage medium stores a computer program, and the computer program, when executed by a processor, implements the operations of the server asset information acquisition method according to claim 1 (see para 0009, a system includes a baseboard management controller (BMC) and a non-transitory computer-readable medium. The non-transitory computer-readable medium includes instructions which, when executed by the BMC).
Regarding claim 20, Su further teaches a non-transitory computer non-volatile readable storage medium, wherein the computer non-volatile readable storage medium stores a computer program, and the computer program, when executed by a processor, implements the operations of the server asset information providing method according to claim 13 (see para 0009, a system includes a baseboard management controller (BMC) and a non-transitory computer-readable medium. The non-transitory computer-readable medium includes instructions which, when executed by the BMC).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 6, 15 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Su as applied to claims above, and further in view of Brassac et al US 20210051064.
Regarding claim 6, Su teaches all the features with respect to claim 1 as outlined above.
But Su fails to teach controlling, according to an acquired PCIe physical topology adjustment instruction, the baseboard management controller to update the PCIe physical topology data stored in the preset memory (see para 0053 and 0055, an external application may transmit IPMI commands to the management controller 12, 22 in order to modify one or more configuration data… the management module 12, 22 saves the modified configuration data in the associated memory 14, 24).
Therefore, it would have been obvious to modify the BMC of Su and further incorporate the ability to update the data stored in the memory.
The motivation for doing so is to change the configuration of the system thus improve its versatility.
Regarding claim 15, Su teaches all the features with respect to claim 1 as outlined above.
But Su fails to teach sending the PCIe system topology to a web page for display.
However, Brassac teaches sending a system topology to a web page for display (see para 0052, displaying a man-machine interface on a terminal connected to the server, which enables a user to visualize and perform modifications on configuration data).
Therefore, it would have been obvious to modify the method of Su and further incorporate displaying the system topology.
The motivation for doing so is to visualize the system topology to the user.
Regarding claim 17, please refer to the rejection of claim 6 since the claimed subject matter is substantially similar.
Allowable Subject Matter
Claims 3-4, 7-8, 9-10, and 16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Ran US 20250238386 discloses a PCIe topology configuration method comprising generating and transmitting switching configuration by a management chip
Mitra et al US Patent No. 10,521,376 discloses a BMC communicates with a host device of a PCIe network topology via a PCIe port of the BMC
Shetty et al US 20160234095 discloses a server is configured to collect at least one portion of the network topology information from one or more network devices via a baseboard management controller (BMC) and provide a graphical display representing the network topology information
Shih US 20160072761 discloses automatic generation of server network topology
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PHONG H DANG whose telephone number is (571)272-0470. The examiner can normally be reached Monday-Friday 9:30AM - 6:00PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Henry Tsai can be reached at (571)272-4176. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/PHONG H DANG/Primary Examiner, Art Unit 2184
Prosecution Insights