Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
1. This office action, in response to the amendment filed 8/10/2026, is a final office action.
Response to Amendments and Arguments
2. The amendment to figure 2 has been received and has overcome the previous objection to the drawings.
3. Independent claims 2, 12 and 21 are amended to include a serial bus and transmit using the transmission component via the serial bus. The combination of Bethard and Perraud discloses these features. Bethard discloses a memory/host system including a transmission component of a serializer/deserializer (Figure 2: SERDES 205 comprises a TX path and a RX path.) and a reception component of the serializer/deserializer (Figure 2: SERDES 205 comprises a TX path and a RX path.). The TX path and RX path are each coupled to a data lane as shown in figure 2. Paragraph 0014 discloses serializer 105 converts parallel data into serial data for transmission over a communication medium 110. The communication medium 110 is a serial bus for communicating serial data. Figure 2 of the instant application shows the serial bus 220 and shows the output serial data on line 225a and the input serial data on line 225b. Paragraph 0039 of the instant application recites the output circuitry 233 may refer to various circuitry configured to transmit or otherwise convey signals (e.g., serialized signals) of the signal path 225-a of the communication channel 220 (e.g., of a serial bus). Figure 2 of Bethard shows the communication channel comprising lane 0 for outputting a serialized signal of the signal path 210 of the communication channel (e.g., of a serial bus). Therefore, the previous combination discloses these amended features of the claims.
4. Independent claims 2, 12 and 21 are amended to include couple the transmission component of the serializer/deserializer with the power source… and decouple at least a portion of the reception component of the serializer/deserializer with the power source… The combination of Bethard and Perraud discloses these features. Perraud discloses circuitry that will couple the transmission component of the serializer/deserializer with the power source in accordance with activation of one or more first switches of the set of switches (Column 5, lines 56-67 discloses the deactivation may consist of cutting off the power supply to at least part of the receiver or the transmitter. The cutting off of the power supply will be equivalent to an open switch between the power supply and the transmitter and an open switch between the power supply and the receiver, forming a set of switches.), wherein coupling the transmission component with the power source is in accordance with the memory system having information to be transmitted via the transmission component (Column 4, line 48 to column 5, line 4 describes how the half duplex system operates. During half duplex transmission from A to B as shown in figure 4, the transmitter of the terminal A is activated to transmit and the receiver of the terminal B is activated to receive in the first slot of each pair T1 to T15.), decouple at least a portion of the reception component of the serializer/deserializer with the power source in accordance with deactivation of one or more second switches of the set of switches (Column 5, lines 56-67 discloses the deactivation may consist of cutting off the power supply to at least part of the receiver or the transmitter. The cutting off of the power supply will be equivalent to an open switch between the power supply and the transmitter and an open switch between the power supply and the receiver, forming a set of switches.), wherein decoupling the reception component is in accordance with an indication that the information is not associated with a response that is to be received via the reception component (Column 4, line 48 to column 5, line 4 describes how the half duplex system operates. During half duplex transmission from A to B as shown in figure 4, the receiver of terminal A and the transmitter of the terminal B are deactivated so that no signals are exchanged during the second slots of each pair T1-T15.); and transmit, via the transmission component, a signal comprising the information according to coupling the transmission component with the power source and decoupling the reception component from the power source (Figure 4 shows the communication system. The transmitter will transmit. When transmitting in a half-duplex system, the transmission will represent an indication that the transmitter is coupled to the power source, enabling the transmission to take place, and that the receiver is decoupled from the power source.). Perraud discloses how deactivation of the power of the transmitter and the receiver will take place. This power control is applied to the transmitter and the receiver of the system of Bethard as stated in the rejections of the claims.
5. The amended features of dependent claim 3 is disclosed by the combination of Bethard and Perraud. Bethard discloses the channel in figure 2. The communication channel comprises a first signal path coupled with the transmission component of the serializer/deserializer and a second signal path coupled with the reception component of the serializer/deserializer. The first and second signal paths of figure 2 of Bethard is similar to the first signal path 225-a and the second signal path 225-b of the serial bus 220 of figure 2 of the instant application.
6. Applicant states a Bluetooth terminal that communicates audio signals using a Bluetooth link as described in Perraud does not teach or suggest a serial bus of a memory system nor does it teach or suggest to transmit a signal using the transmission component via a serial bus as stated on page 13 of the remarks. The examiner disagrees that the previously cited prior art does not teach the limitations of the claims. As stated above and in the rejections of the claims, the combination of Bethard and Perraud discloses the features of claim 2. Bethard discloses a memory/host system including a transmission component of a serializer/deserializer (Figure 2: SERDES 205 comprises a TX path and a RX path.) and a reception component of the serializer/deserializer (Figure 2: SERDES 205 comprises a TX path and a RX path.). The TX path and RX path are each coupled to a data lane as shown in figure 2. Paragraph 0014 discloses serializer 105 converts parallel data into serial data for transmission over a communication medium 110. The communication medium 110 is a serial bus for communicating serial data. Figure 2 of the instant application shows the serial bus 220 shows the output serial data on line 225a and the input serial data on line 225b. Perraud discloses how deactivation of the power of the transmitter and the receiver will take place. This power control is applied to the transmitter and the receiver of the system of Bethard as stated in the rejections of the claims.
7. Applicant states the office action does not provide an explicit analysis explaining how the apparatus of Bethard would incorporate the communication of conversational data signals between transceiver terminals over a Bluetooth link as discussed in Perraud as stated in pages 13-14 of the remarks. The examiner disagrees that the office action did not address the limitations of the claims. As stated above and in the rejections of the claims, the combination of Bethard and Perraud discloses the features of claim 2. Bethard discloses a memory/host system including a transmission component of a serializer/deserializer (Figure 2: SERDES 205 comprises a TX path and a RX path.) and a reception component of the serializer/deserializer (Figure 2: SERDES 205 comprises a TX path and a RX path.). The TX path and RX path are each coupled to a data lane as shown in figure 2. Paragraph 0014 discloses serializer 105 converts parallel data into serial data for transmission over a communication medium 110. The communication medium 110 is a serial bus for communicating serial data. Figure 2 of the instant application shows the serial bus 220 shows the output serial data on line 225a and the input serial data on line 225b. Perraud discloses how deactivation of the power of the transmitter and the receiver will take place. This power control is applied to the transmitter and the receiver of the system of Bethard as stated in the rejections of the claims. The rationale for the combination was provided in the previous rejection of the claims. As stated in the rejection of claim 2, it would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to combine the specifics of a half-duplex system as taught by Perraud into the half duplex communication system of Bethard. By activating and deactivating the transmitters and receivers, power can be saved and the cost of operating the system can be reduced, improving the efficiency of the system.
The rejections of the claims are maintained.
Drawings
8. The drawings were received on 8/10/2026. These drawings are acceptable.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
9. Claims 2-6, 9-16 and 19-21 are rejected under 35 U.S.C. 103 as being unpatentable over Bethard (US 2009/0024883) in view of Perraud et al (US 8,213,343).
Regarding claims 2, 12 and 21, Bethard discloses a memory/host system (Figures 3 and 4: controller will comprise memory to store the process the controller controls.), comprising:
a power source (Paragraph 0029: the power up signal circuit 370A, 370B transmit a signal upon power up of the LC 315A, 315B. Since the components power up, a power source will provide the power for that power up.);
a transmission component of a serializer/deserializer (Figure 2: SERDES 205 comprises a TX path and a RX path.);
a reception component of the serializer/deserializer (Figure 2: SERDES 205 comprises a TX path and a RX path.);
a serial bus (Figure 2: SERDES 205 comprises a TX path and a RX path. The TX path and RX path are each coupled to a data lane as shown in figure 2. Paragraph 0014: the serializer 105 converts parallel data into serial data for transmission over a communication medium 110. The communication medium 110 is a serial bus for communicating serial data. Figure 2 of Bethard shows the communication channel comprising lane 0 for outputting a serialized signal of the signal path 210 of the communication channel (e.g., of a serial bus).);
an activation component comprising a set of switches (Paragraph 0028: in some embodiments, only the data receive or the data transmit portion of the SerDes lane may be removed from the channel when errors on a SerDes lane exceed a threshold error rate value; degrading the SerDes lane to half duplex. In some embodiments, both the data transmitting lane and a data receiving lane may be deactivated in pairs even though errors are occurring in only one direction.); and
circuitry coupled with the memory/host system (figures 3 and 4 show the circuitry of the system), the circuitry configured to cause the memory/host system to:
transmit, using the transmission component via the serial bus, a signal comprising information (Figure 2: the SerDes comprises a transmit path for transmitting information and a reception path for receiving information. Paragraph 0014: the serializer 105 converts parallel data into serial data for transmission over a communication medium 110. The communication medium 110 is a serial bus for communicating serial data. Paragraph 0028: the SerDes communicates via half duplexing.).
Bethard does not disclose the circuitry that will couple the transmission component of the serializer/deserializer with the power source in accordance with activation of one or more first switches of the set of switches, wherein coupling the transmission component with the power source is in accordance with the memory system having information to be transmitted via the transmission component, decouple at least a portion of the reception component of the serializer/deserializer with the power source in accordance with deactivation of one or more second switches of the set of switches, wherein decoupling the reception component is in accordance with an indication that the information is not associated with a response that is to be received via the reception component; and transmit, via the transmission component, a signal comprising the information according to coupling the transmission component with the power source and decoupling the reception component from the power source.
Perraud discloses a terminal comprising a control module for activating and deactivating the supplies of power to the reception module and transmission module during half duplex transmission as stated in claim 16. Column 4, line 48 to column 5, line 4 describes how the half duplex system operates. During half duplex transmission from A to B as shown in figure 4, the transmitter of the terminal A is activated to transmit and the receiver of the terminal B is activated to receive in the first slot of each pair T1 to T15. The receiver of terminal A and the transmitter of the terminal B are deactivated so that no signals are exchanged during the second slots of each pair T1-T15. Column 5, lines 56-67 discloses the deactivation may consist of cutting off the power supply to at least part of the receiver or the transmitter. The cutting off of the power supply will be equivalent to an open switch between the power supply and the transmitter and an open switch between the power supply and the receiver, forming a set of switches. Perraud discloses circuitry that will couple the transmission component with the power source in accordance with activation of one or more first switches of the set of switches (Column 5, lines 56-67 discloses the deactivation may consist of cutting off the power supply to at least part of the receiver or the transmitter. The cutting off of the power supply will be equivalent to an open switch between the power supply and the transmitter and an open switch between the power supply and the receiver, forming a set of switches.), wherein coupling the transmission component with the power source is in accordance with the memory system having information to be transmitted via the transmission component (Column 4, line 48 to column 5, line 4 describes how the half duplex system operates. During half duplex transmission from A to B as shown in figure 4, the transmitter of the terminal A is activated to transmit and the receiver of the terminal B is activated to receive in the first slot of each pair T1 to T15.), decouple at least a portion of the reception component with the power source in accordance with deactivation of one or more second switches of the set of switches (Column 5, lines 56-67 discloses the deactivation may consist of cutting off the power supply to at least part of the receiver or the transmitter. The cutting off of the power supply will be equivalent to an open switch between the power supply and the transmitter and an open switch between the power supply and the receiver, forming a set of switches.), wherein decoupling the reception component is in accordance with an indication that the information is not associated with a response that is to be received via the reception component (Column 4, line 48 to column 5, line 4 describes how the half duplex system operates. During half duplex transmission from A to B as shown in figure 4, the receiver of terminal A and the transmitter of the terminal B are deactivated so that no signals are exchanged during the second slots of each pair T1-T15.); and transmit, via the transmission component, a signal comprising the information according to coupling the transmission component with the power source and decoupling the reception component from the power source (Figure 4 shows the communication system. The transmitter will transmit. When transmitting in a half-duplex system, the transmission will represent an indication that the transmitter is coupled to the power source, enabling the transmission to take place, and that the receiver is decoupled from the power source.).
It would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to combine the specifics of a half-duplex system as taught by Perraud into the half duplex communication system of Bethard. By activating and deactivating the transmitters and receivers, power can be saved and the cost of operating the system can be reduced, improving the efficiency of the system.
Regarding claim 3, the combination discloses the serial bus comprises a first signal path coupled with the transmission component of the serializer/deserializer; and a second signal path coupled with the reception component of the serializer/deserializer (Bethard: Figure 2: the SerDes comprises a transmit path for transmitting information and a reception path for receiving information. Paragraph 0014: the serializer 105 converts parallel data into serial data for transmission over a communication medium 110. The communication medium 110 is a serial bus for communicating serial data.).
Regarding claims 4 and 14, the combination discloses wherein the circuitry is configured to-cause the memory/host system to:
couple the transmission component with the power source in accordance with activation of the one or more first switches of the set of switches (Perraud: Column 5, lines 56-67 discloses the deactivation may consist of cutting off the power supply to at least part of the receiver or the transmitter. The cutting off of the power supply will be equivalent to an open switch between the power supply and the transmitter and an open switch between the power supply and the receiver, forming a set of switches. A closed switch will couple the power source with the transmitter or receiver.), wherein coupling the transmission component with the power source is in accordance with the memory system having second information to be transmitted via the transmission component (Perraud: Column 4, line 48 to column 5, line 4 describes how the half duplex system operates. During half duplex transmission from A to B as shown in figure 4, the transmitter of the terminal A is activated to transmit and the receiver of the terminal B is activated to receive in the first slot of each pair T1 to T15.); and
couple the reception component with the power source in accordance with activation of the one or more second switches of the set of switches (Perraud: Column 4, line 48 to column 5, line 4 describes how the half duplex system operates. During half duplex transmission from A to B as shown in figure 4, the transmitter of the terminal A is activated to transmit and the receiver of the terminal B is activated to receive in the first slot of each pair T1 to T15. During half-duplex transmission in the opposite direction, the terminal B is activated to transmit and the receiver in terminal A is activated to receive when it is desired for the receiver of terminal A to receive information such as a response to a previous transmission to terminal B.), wherein coupling the reception component is in accordance with an indication that the second information to be transmitted is associated with a second response to be received via the reception component (Perraud: Column 4, line 48 to column 5, line 4 describes how the half duplex system operates. During half duplex transmission from A to B as shown in figure 4, the transmitter of the terminal A is activated to transmit and the receiver of the terminal B is activated to receive in the first slot of each pair T1 to T15. During half-duplex transmission in the opposite direction, the terminal B is activated to transmit and the receiver in terminal A is activated to receive when it is desired for the receiver of terminal A to receive information such as a response to a previous transmission to terminal B.).
Regarding claims 5 and 15, the combination discloses wherein the circuitry is configured to-cause the memory/host system to: activate the transmission component in accordance with activation of the one or more first switches; and deactivate the reception component in accordance with deactivation of the one or more second switches (Perraud: Column 5, lines 56-67 discloses the deactivation may consist of cutting off the power supply to at least part of the receiver or the transmitter. The cutting off of the power supply will be equivalent to an open switch between the power supply and the transmitter and an open switch between the power supply and the receiver, forming a set of switches. A closed switch will couple the power source with the transmitter or receiver.).
Regarding claim 6 and 16, the combination discloses wherein the circuitry is configured to-cause the memory/host system to: switch the transmission component from a first power state to a second power state in accordance with activation of the one or more first switches (Perraud: Column 5, lines 56-67 discloses the deactivation may consist of cutting off the power supply to at least part of the receiver or the transmitter. The cutting off of the power supply will be equivalent to an open switch between the power supply and the transmitter and an open switch between the power supply and the receiver, forming a set of switches. A closed switch will couple the power source with the transmitter or receiver. Activating the transmitter will change the component from a first (off) state to a second (on) state in the transmitter.); and
switch the reception component from a third power state to a fourth power state in accordance with deactivation of the one or more second switches (Perraud: Column 5, lines 56-67 discloses the deactivation may consist of cutting off the power supply to at least part of the receiver or the transmitter. The cutting off of the power supply will be equivalent to an open switch between the power supply and the transmitter and an open switch between the power supply and the receiver, forming a set of switches. A closed switch will couple the power source with the transmitter or receiver. Deactivating the receiver will change the component from a third (on) state to a fourth (off) state.).
Regarding claims 9 and 19, the combination discloses wherein the circuitry is configured to-cause the memory/host system to: obtain, at the serializer/deserializer, an indication of second information to be received by the serializer/deserializer; and switch the reception component from the fourth power state to the third power state in accordance with the indication of the second information (Perraud: Column 4, line 48 to column 5, line 4 describes how the half duplex system operates. During half duplex transmission from A to B as shown in figure 4, the transmitter of the terminal A is activated to transmit and the receiver of the terminal B is activated to receive in the first slot of each pair T1 to T15. During half-duplex transmission in the opposite direction, the terminal B is activated to transmit and the receiver in terminal A is activated to receive when it is desired for the receiver of terminal A to receive information such as a response to a previous transmission to terminal B. The receiver will be switched from an off state to an on state to receive the signals from a transmitter.).
Regarding claims 10 and 20, the combination discloses wherein the circuitry is configured to-cause the memory/host system to: decouple the transmission component with the power source in accordance with deactivation of the one or more first switches of the set of switches, wherein decoupling the transmission component with the power source is in accordance with transmission of the information (Perraud: Column 4, line 48 to column 5, line 4 describes how the half duplex system operates. During half duplex transmission from A to B as shown in figure 4, the transmitter of the terminal A is activated to transmit and the receiver of the terminal B is activated to receive in the first slot of each pair T1 to T15. During half-duplex transmission in the opposite direction, the terminal B is activated to transmit and the receiver in terminal A is activated to receive when it is desired for the receiver of terminal A to receive information such as a response to a previous transmission to terminal B. Column 5, lines 56-67 discloses the deactivation may consist of cutting off the power supply to at least part of the receiver or the transmitter. The cutting off of the power supply will be equivalent to an open switch between the power supply and the transmitter and an open switch between the power supply and the receiver, forming a set of switches.).
Regarding claim 11, the combination discloses wherein the circuitry is configured to cause the memory system to: serialize, by a multiplexer of the transmission component, a plurality of signal paths to a single signal path, wherein transmission of the signal is in accordance with an output of the multiplexer (Bethard: Paragraph 0014: serializer/Deserializer (SerDes) circuits facilitate transmitting parallel data over a point-to-point serial link. This is shown in the block diagram of figure 1. A serializer 105 converts parallel data into serial data for transmission over a communication medium 110. Figure 1 shows the parallel signals multiplexed into a serial output.).
Regarding claim 13, the combination discloses wherein the circuitry is configured to cause the host system to: obtain, via a control bus, an indication of the information to be transmitted via the transmission component, wherein coupling the transmission component with the power source is in accordance with obtaining the indication via the control bus (Perraud: Column 4, line 48 to column 5, line 4 describes how the half duplex system operates. During half duplex transmission from A to B as shown in figure 4, the transmitter of the terminal A is activated to transmit and the receiver of the terminal B is activated to receive in the first slot of each pair T1 to T15. Column 5, lines 56-67 discloses the deactivation may consist of cutting off the power supply to at least part of the receiver or the transmitter. The cutting off of the power supply will be equivalent to an open switch between the power supply and the transmitter and an open switch between the power supply and the receiver, forming a set of switches. A closed switch will couple the power source with the transmitter or receiver.).
Allowable Subject Matter
10. Claims 7, 8, 17 and 18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: None of the cited references disclose each and every limitation of the objected claims.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KEVIN M. BURD whose telephone number is (571)272-3008. The examiner can normally be reached 9:30 - 5:00.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chieh Fan can be reached at 571-272-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/KEVIN M BURD/Primary Examiner, Art Unit 2632 10/14/2026
