DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 2 – 21 are pending.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 2 – 5, 9 – 12, and 16 - 19 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Lomelino et al (US20140317206) hereinafter Lomelino.
As to claim 2, Lomelino discloses a storage system in closure comprising: a plurality of solid state storage devices presenting a first storage protocol (Fig. 4 with storage controller storage element and connected to a compute note via a san protocol, para. 0041); and one or more storage system controllers, operatively coupled to the plurality of solid state storage devices (Fig. 6, and module 170), configured to: present the plurality of solid state storage devices as solid state storage devices presenting a second storage protocol that is different than the first storage protocol (Fig. 6 with storage unit, with data storage controller 172, coupled to compute node through a data storage switch 160 that is coupled to the native compute node protocol, para. 0049);
and modify requests using the second storage protocol to use the first storage protocol (Fig. 6 where the tunneling to the native protocol occurs, paras. 0044 – 0048).
As to claim 9, Lomelino discloses a method comprising: presenting, by a storage system controller (Fig. 4, and par.0041), a plurality of solid state storage devices presenting a first storage protocol as solid state storage devices presenting a second storage protocol that is different than the first storage protocol (Fig. 6 with storage unit, with data storage controller 172, coupled to compute node through a data storage switch 160 that is coupled to the native compute node protocol, para. 0049); and modifying requests using the second storage protocol to use the first storage protocol (Fig. 6 where the tunneling to the native protocol occurs, paras. 0044 – 0048).
As to claim 16, Lomelino discloses a non-transitory computer readable storage medium: presenting, by a storage system controller (Fig. 4, and par.0041), a plurality of solid state storage devices presenting a first storage protocol as solid state storage devices presenting a second storage protocol that is different than the first storage protocol (Fig. 6 with storage unit, with data storage controller 172, coupled to compute node through a data storage switch 160 that is coupled to the native compute node protocol, para. 0049); and modifying requests using the second storage protocol to use the first storage protocol (Fig. 6 where the tunneling to the native protocol occurs, paras. 0044 – 0048).
As to claims 3, 10, and 17, Lomelino discloses the storage system enclosure, wherein the first storage protocol is Non-volatile Memory Express (NVMe) over Peripheral Component Interconnect Express (Pcie) (Fig. 6, and para. 0049).
As to claims 4, 11, and 18, Lomelino discloses the storage system enclosure, wherein the second storage protocol is Non-volatile Memory Express (NVMe) over fabric (Fig. 6, and para. 0049 teaching a comprehensive protocol possibility).
As to claims 5, 12, and 19, Lomelino discloses the storage system enclosure, wherein the second storage protocol is NVMe over Transmission Control Protocol (TCP) (Fig. 6, and para. 0049 teaching a comprehensive protocol possibility).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 6, 13, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Lomelino in view of Romem et al (US20160036913) hereinafter Romem.
As to claim 6, 13, and 20, Lomelino does not explicitly disclose the storage system enclosure, wherein the second storage protocol is NVMe over Remote Direct Memory Access (RDMA).
Romem teaches wherein the second storage protocol is NVMe over Remote Direct Memory Access (RDMA) (para. 0045). One of ordinary skills in the art before the effective filing date of the claimed invention would have been motivate to use the capability of Romem with the system of Lomelino to enable the capability of remote access of storage capabilities, (para. 0003).
Claim(s) 7, 8, 14, 15, and 21 are rejected under 35 U.S.C. 103 as being unpatentable over Lomelino in view of Prahlad et al (US20110161299) hereinafter Prahlad.
As to claims 7, 14, and 21, Lomelino does not explicitly disclose the storage system enclosure, wherein the one or more storage controllers replace a same host identifier with a same logical identifier.
Prahlad teaches wherein the one or more storage controllers replace a same host identifier with a same logical identifier Fig. 1, where a modified reservation comprising a logical identification is made, para. 0052. One of ordinary skill in the art before the effective filing date of the claimed invention would have been motivated to use the management scheme of Prahlad in the system of Lomelino to provide a management scheme with needed backup, (para. 0002).
As to claims 8, and 15, Prahlad discloses the storage system enclosure, wherein the plurality of solid-state storage devices offload device management responsibilities to the one or more storage system controllers (para. 0136). One of ordinary skill in the art before the effective filing date of the claimed invention would have been motivated to use the management scheme of Prahlad in the system of Lomelino to provide a management scheme with needed backup, (para. 0002).
Conclusion
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/C.A.D/Examiner, Art Unit 2184
/HENRY TSAI/Supervisory Patent Examiner, Art Unit 2184
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