DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 10/28/25, and 2/5/26 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-10 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a resolver/rotary transformer processing system and method which detects a sine and cosine signal and subtracts from a reference signal to correct an error is an abstract idea which is an algorithm which could be performed on a generic without significantly more. The claim(s) recite(s) “a first reference signal generation module”, “a difference signal calculation module”, “an error calculation module”, “a loop module”, “a decoding result output module” in claim 8, these are directed to the abstract idea of a mental process, or observation, evaluation, judgement, which could all be performed on pen and paper as a mental process. The claims lack physical structures such as an electric circuit, an ADC converter, etc. they contain no hardware elements that would sufficiently make this amount to anything more than mental processes.
Claims 1-7 are method claims which contain no physical structure and claim 9 includes a processor and memory and claim 10 includes a non-transitory computer readable storage medium, running a program from claim 1, which is also a mental process, however, these elements are generic software blocks which are effectively mental processes performed on a generic computer as claimed in claims 9 and 10, which is an abstract concept of observation, calculation, and judgement without significantly more, since as stated above, they lack requisite hardware beyond a generic computer, I.E. they do not include any signal processing, any way to decode a transformer other than a generic computer.
This judicial exception is not integrated into a practical application because the generic computer elements and functional blocks from claims 1-10 are not integrated into any hardware that would amount to being more than a mental process, effectively, a mental process can be defined as a concept performed in the human mind, including, observation, evaluation and judgement. Effectively, the claims contain no specific hardware to read the signals, or observe them, evaluate them or perform mathematical computations on them, and judgement, which would be regenerating the sine and cosine reference signals when the error is greater than a preset threshold, which are all mental processes shown above. . The claims do not provide these elements to tie a mental process or abstract idea to hardware that is beyond a generic computer or merely a CPU and memory. The claim(s) does/do not include additional elements that are sufficient to amount to significantly more than the judicial exception because in claims 9 and 10, even though a CPU, memory, a computer program, and a non-transitory computer readable medium are disclosed, they are generic hardware elements which run an and algorithm which is including a mental process above of observation, evaluation, and judgement and do not include additional hardware elements listed above which would not amount to significantly more than the judicial exception.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-2, and 8-10 are rejected under 35 U.S.C. 103 as being unpatentable over Furukawa (US 2018/0006590) in view of Ivers et al. (US 3,641,565).
Regarding claim 1,
Furukawa discloses (Fig. 4):
A method for decoding a rotary transformer (Fig. 4, 4, ¶0047), comprising: generating a first sine reference signal (Fig. 5A, hsin) and a first cosine reference signal (hcos) based on a preset amplitude (EQN 15, Asin, Acos, ¶0081), a preset amplitude ratio of sine and cosine winding signals (Ksin, Kcos), a preset sine and cosine phase difference (¶0049, π/2), and a preset phase of an initial positioning angle (¶0045-¶0046, ¶0078-¶0079, EQN 14); obtaining a first difference signal (Vsin_hosei) by subtracting the first sine reference signal (hsin) from a real- time sine signal (Vsin) of the rotary transformer, and obtaining a second difference signal (Vcos_hosei) by subtracting the first cosine reference signal (hcos) from a real-time cosine signal of the rotary transformer (Vcos, ¶0087); inputting the first difference signal (Vsin_hosei) and the second difference signal (Vcos_hosei) into a preset error model (32) to obtain an overall error (corrected electrical angle, ¶0087);
Furukawa does not disclose:
and in response to detecting that the overall error is greater than a preset error threshold, performing regenerating the first sine reference signal and the first cosine reference signal based on an amplitude and a phase corresponding to the overall error in cycles; or in response to detecting that the overall error is less than or equal to the preset error threshold, determining an angle output by the rotary transformer as a decoding result.
However, Ivers teaches (Fig. 1):
and in response to detecting that the overall error is greater than a preset error threshold (Fig. 1, output of 14, Er, greater than threshold in Fig. 3, 32, 34, 36, 38, Col. 2:40-Col. 3:24), performing regenerating the first sine reference signal (from Fig. 1 , 18) and the first cosine reference signal (16) based on an amplitude and a phase corresponding to the overall error in cycles (voltage amplitude and position, col. 2:40-Col. 3:24); or in response to detecting that the overall error is less than or equal to the preset error threshold, determining an angle output by the rotary transformer as a decoding result (error is zero and the angle is output, Col. 2:40-61).
Regarding claim 1, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to take the resolver correction system that uses a reference sine and cosine to correct an error from a sin and cosine resolver reading in order to improve accuracy of a resolver system as taught by Furukawa (¶0086-¶0087) and use the error system from Ivers which uses to look up table to generate new values for sin and cosine references when the error is greater than a threshold value in order to reduce the error from a resolver output as taught by Ivers (Col. 2:29-61). This would improve the accuracy of the reading which would improve reliability.
Regarding claim 2,
Furukawa discloses the above elements from claim 1.
Furukawa does not disclose:
wherein after the regenerating the first sine reference signal and the first cosine reference signal based on the amplitude and the phase corresponding to the overall error, the method further comprises: recording a cycle number, and determining the angle output by the rotary transformer as the decoding result in response to that the cycle number equals a preset iteration stop number.
However, Ivers teaches (Fig. 1):
wherein after the regenerating the first sine reference signal and the first cosine reference signal based on the amplitude and the phase corresponding to the overall error, the method further comprises: recording a cycle number, and determining the angle output by the rotary transformer as the decoding result in response to that the cycle number equals a preset iteration stop number (counts cycles in counter based on error Er, in Fig. 3, Col. 2:40-Col. 3:24).
Regarding claim 2, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to take the resolver correction system that uses a reference sine and cosine to correct an error from a sin and cosine resolver reading in order to improve accuracy of a resolver system as taught by Furukawa (¶0086-¶0087) and use the error system from Ivers which uses to look up table to generate new values for sin and cosine references when the error is greater than a threshold value in order to reduce the error from a resolver output as taught by Ivers (Col. 2:29-61). This would improve the accuracy of the reading which would improve reliability.
Regarding claim 8,
Furukawa discloses (Fig. 4):
A system for decoding a rotary transformer (Fig. 4, 4, ¶0047), comprising: a first reference signal generation ,module (Fig. 5A, 31), configured to generate a first sine reference signal (Fig. 5A, hsin) and a first cosine reference signal (hcos) based on a preset amplitude (EQN 15, Asin, Acos, ¶0081), a preset amplitude ratio of sine and cosine winding signals (Ksin, Kcos), a preset sine and cosine phase difference (¶0049, π/2), and a preset phase of an initial positioning angle (¶0045-¶0046, ¶0078-¶0079, EQN 14); a difference signal calculation module (adder that outputs to 32), configured to obtain a first difference signal (Vsin_hosei) by subtracting the first sine reference signal (hsin) from a real- time sine signal (Vsin) of the rotary transformer, and obtaining a second difference signal (Vcos_hosei) by subtracting the first cosine reference signal (hcos) from a real-time cosine signal of the rotary transformer (Vcos, ¶0087);
an error calculation module (32), configured to input the first difference signal (Vsin_hosei) and the second difference signal (Vcos_hosei) into a preset error model (32) to obtain an overall error (corrected electrical angle, ¶0087);
Furukawa does not disclose:
a loop module, configured to in response to detecting that the overall error is greater than a preset error threshold, perform regenerating the first sine reference signal and the first cosine reference signal based on an amplitude and a phase corresponding to the overall error in cycles; and a decoding result output module, configured to in response to detecting that the overall error is less than or equal to the preset error threshold, determine an angle output by the rotary transformer as a decoding result.
However, Ivers teaches (Fig. 1):
a loop module (Fig. 4, 30), configured to in response to detecting that the overall error (Er) is greater than a preset error threshold (Fig. 1, output of 14, Er, greater than threshold in Fig. 4, 32, 34, 36, 38, Col. 2:40-Col. 3:24), perform regenerating the first sine reference signal (from Fig. 1 , 18) and the first cosine reference signal (16) based on an amplitude and a phase corresponding to the overall error in cycles (voltage amplitude and position, col. 2:40-Col. 3:24); and a decoding result output module (output from 20), configured to in response to detecting that the overall error is less than or equal to the preset error threshold, determining an angle output by the rotary transformer as a decoding result (error is zero and the angle is output, Col. 2:40-61).
Regarding claim 8, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to take the resolver correction system that uses a reference sine and cosine to correct an error from a sin and cosine resolver reading in order to improve accuracy of a resolver system as taught by Furukawa (¶0086-¶0087) and use the error system from Ivers which uses to look up table to generate new values for sin and cosine references when the error is greater than a threshold value in order to reduce the error from a resolver output as taught by Ivers (Col. 2:29-61). This would improve the accuracy of the reading which would improve reliability.
Regarding claim 9,
Furukawa discloses the above elements from claim 1.
Furukawa does not disclose:
A device for decoding a rotary transformer, comprising: a memory; a processor; and a computer program stored in the memory and executable on the processor, wherein the computer program is configured to implement the method for decoding the rotary transformer according to claim 1.
However, Ivers teaches (Fig. 1):
A device for decoding a rotary transformer, comprising: a memory (Fig. 1, 16, 18); a processor (14, 20, 22); and a computer program stored in the memory (look up table) and executable on the processor, wherein the computer program is configured to implement the method (Col. 2:8-39) for decoding the rotary transformer according to claim 1.
Regarding claim 9, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to take the resolver correction system that uses a reference sine and cosine to correct an error from a sin and cosine resolver reading in order to improve accuracy of a resolver system as taught by Furukawa (¶0086-¶0087) and use the error system from Ivers which uses to look up table to generate new values for sin and cosine references when the error is greater than a threshold value in order to reduce the error from a resolver output as taught by Ivers (Col. 2:29-61). This would improve the accuracy of the reading which would improve reliability.
Regarding claim 10,
Furukawa discloses the above elements from claim 1.
Furukawa does not disclose:
A non-transitory computer-readable storage medium, wherein the non-transitory computer-readable storage medium stores a computer program, and the computer program is configured to implement the method for decoding the rotary transformer according to claim 1 when executed by a processor.
However, Ivers teaches (Fig. 1):
A non-transitory computer-readable storage medium, wherein the non-transitory computer-readable storage medium stores a computer program, and the computer program is configured to implement the method (Col. 2:8-39) for decoding the rotary transformer according to claim 1 when executed by a processor (Fig. 4, 30).
Regarding claim 10, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to take the resolver correction system that uses a reference sine and cosine to correct an error from a sin and cosine resolver reading in order to improve accuracy of a resolver system as taught by Furukawa (¶0086-¶0087) and use the error system from Ivers which uses to look up table to generate new values for sin and cosine references when the error is greater than a threshold value in order to reduce the error from a resolver output as taught by Ivers (Col. 2:29-61). This would improve the accuracy of the reading which would improve reliability.
Allowable Subject Matter
Claims 3-7 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Kameya (US 2004/0010386) – correcting resolver output
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/C.S.L./Examiner, Art Unit 2837 /KAWING CHAN/Primary Examiner, Art Unit 2837
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