DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This communication is responsive to the correspondence filled on 1/15/25.
Claims 1-18 are presented for examination.
IDS Considerations
The information disclosure statement (IDS) submitted on 7/31/25 and 1/15/25 is/are being considered by the examiner as the submission is in compliance with the provisions of 37 CFR 1.97.
Examiner’s Note: Encoding and decoding is done using same and opposite algorithm.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the claims at issue are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the reference application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The USPTO internet Web site contains terminal disclaimer forms which may be used. The filing date of the application will determine what form should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission.
Claims 1, 5, 10 and 14 are rejected on the ground of nonstatutory obviousness-type double patenting as being unpatentable over claim 1 of US Pat. 12278959 B2.
Even though instant application does not claim “the current block is predicted by copying samples from a reference block of reconstructed samples of the current picture; determine a prediction of the current block by copying samples from the reference block of reconstructed samples of the current picture; and”, however not claiming this does not provide instant application a patentable distinction. Because lack of limitation makes the claim broad obvious variation of US Pat. 12278959 B2.
Even though US Pat. 12278959 B2 does not claim a first flag that indicates whether inter prediction is allowed for a portion of a current picture; responsive to the first flag indicating that inter prediction is not allowed for the portion of the current picture. However, it is well known in the prior art as an example given in prior art Li (U.S. Pub. No. 20150358623 A1) para [0115] The flag bit constrained_intra_pred_flag is configured to indicate whether reconstructed pixels in inter prediction coding blocks are allowed to be used as prediction reference pixels of intra prediction coding blocks or not in the picture decoding process. When the value of the flag bit is 1, decoding process of the picture referring to the PPS shall not use the reconstructed pixels in inter prediction coding blocks as the intra prediction reference pixels in the picture. When the value of the flag bit is 0, decoding process of the picture referring to the PPS may use the reconstructed pixels in the inter prediction coding blocks as the intra prediction reference pixels in the picture. Default value of the flag bit is 0.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to combine US Pat. 12278959 B2 and Li with predictable results to accommodate a first flag that indicates whether inter prediction is allowed for a portion of a current picture. This will improve efficiency with predictable results.
Instant Application 19/021,369
US Pat. 12278959 B2
10. An apparatus for video encoding, the apparatus comprising: at least one memory; and one or more hardware processors configured to read instructions from the at least one memory to perform operations comprising:
encoding, into a data stream,
a first flag that indicates whether inter prediction is allowed for a portion of a current picture;
responsive to the first flag indicating that inter prediction is not allowed for the portion of the current picture,
encoding a second flag into the data stream that indicates whether the portion of the current picture is coded using intra block copy (IBC); and
responsive to the second flag indicating the portion of the current picture is coded using IBC,
encoding a prediction residual into the data stream,
wherein the prediction residual is determined based on applying IBC to reconstruct the portion of the current picture.
1. A hardware apparatus for video encoding, the hardware apparatus configured to:
encode a first flag for a segment of a current picture into a data stream,
wherein the first flag indicates whether blocks of the segment are intra-predicted only, meaning that the blocks of the segment are predicted based on reconstructed samples of the current picture only;
responsive to the first flag indicating that the blocks of the segment are intra-predicted only,
encode a second flag into the data stream that indicates whether or not a current block of the segment is encoded using intra block copy (IBC),
the current block is predicted by copying samples from a reference block of reconstructed samples of the current picture;
responsive to the second flag indicating that the current block is encoded using IBC,
determine a prediction of the current block by copying samples from the reference block of reconstructed samples of the current picture; and
encode a prediction residual into the data stream based on the prediction of the current block.
wherein when the current block is encoded using IBC,
9. Limitations of remaining claims of instant application are obvious over US Pat. 12278959 B2 in view of Li (U.S. Pub. No. 20150358623 A1). Same motivation given above is applicable for dependent claims. Please note 35 U.S.C. 101 allows only one patent from one patent application or invention. In that aspect all dependent claims of instant application are obvious variation of independent claim 1.
Claims 1, 5, 10 and 14 are also rejected on the ground of nonstatutory obviousness-type double patenting as being unpatentable over claim 1 of US Pat. 11758132 B2.
Even though instant application does not claim “the current block is predicted by copying samples from a reference block of reconstructed samples of the current picture; determine a prediction of the current block by copying samples from the reference block of reconstructed samples of the current picture; and”, however not claiming this does not provide instant application a patentable distinction. Because lack of limitation makes the claim broad obvious variation of US Pat. 11758132 B2.
Even though US Pat. 11758132 B2 does not claim a first flag that indicates whether inter prediction is allowed for a portion of a current picture; responsive to the first flag indicating that inter prediction is not allowed for the portion of the current picture. However, this is well known in the prior art as an example given in prior art Li (U.S. Pub. No. 20150358623 A1) para [0115] The flag bit constrained_intra_pred_flag is configured to indicate whether reconstructed pixels in inter prediction coding blocks are allowed to be used as prediction reference pixels of intra prediction coding blocks or not in the picture decoding process. When the value of the flag bit is 1, decoding process of the picture referring to the PPS shall not use the reconstructed pixels in inter prediction coding blocks as the intra prediction reference pixels in the picture. When the value of the flag bit is 0, decoding process of the picture referring to the PPS may use the reconstructed pixels in the inter prediction coding blocks as the intra prediction reference pixels in the picture. Default value of the flag bit is 0.
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to combine US Pat. 11758132 B2 and Li with predictable results to accommodate a first flag that indicates whether inter prediction is allowed for a portion of a current picture. This will improve efficiency with predictable results.
Instant Application 19/021,369
US Pat. 11758132 B2
10. An apparatus for video encoding, the apparatus comprising: at least one memory; and one or more hardware processors configured to read instructions from the at least one memory to perform operations comprising:
encoding, into a data stream,
a first flag that indicates whether inter prediction is allowed for a portion of a current picture; responsive to the first flag indicating that inter prediction is not allowed for the portion of the current picture,
encoding a second flag into the data stream that indicates whether the portion of the current picture is coded using intra block copy (IBC);
and responsive to the second flag indicating the portion of the current picture is coded using IBC,
encoding a prediction residual into the data stream,
wherein the prediction residual is determined based on applying IBC to reconstruct the portion of the current picture.
1. A video encoder comprising at least one processor and memory, the memory comprising instructions which, when executed by the at least one processor cause the video encoder:
encode a first flag for a segment of a current picture into a data stream,
wherein the first flag equal to one indicates that blocks of the segment are intra-predicted only, meaning that the blocks of the segment are predicted based on reconstructed samples of the current picture only;
determine to encode a second flag into the data stream based on the first flag being equal to one; encode the second flag into the data stream that indicates whether or not a current block of the segment is encoded using intra block copy (IBC),
the current block is predicted by copying samples from a reference block of reconstructed samples of the current picture;
based on the second flag indicating that the current block is encoded using IBC,
determine a prediction of the current block by copying samples from the reference block of reconstructed samples of the current picture; and
encode a prediction residual into the data stream based on the prediction of the current block.
wherein when the current block is encoded using IBC,
10. Limitations of remaining claims of instant application are obvious over US Pat. 12278959 B2 in view of Li (U.S. Pub. No. 20150358623 A1). Same motivation given above is applicable for dependent claims. Please note 35 U.S.C. 101 allows only one patent from one patent application or invention. In that aspect all dependent claims of instant application are obvious variation of independent claim 1.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the 35 U.S.C. 112 (pre-AIA ), first paragraph:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1, 5, 10 and 14 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that inventor(s), at the time the application was filed, had possession of the claimed invention. MPEP 2161.01(I) and 2163.05(I)(3)(ii) give guidance. Generic claim language in the original disclosure does not satisfy the written description requirement if it fails to support the scope of the genus claimed.
In the instant case: responsive to the first flag indicating that inter prediction is not allowed for the portion of the current picture, encoding a second flag into the data stream that indicates whether the portion of the current picture is coded using intra block copy (IBC)." But the statement that one could achieve a functional result is not sufficient to describe an algorithm for achieving it. The claim functionality must be supported by an algorithm to achieve it.
Rest of the dependent claims are also rejected based on dependency.
Allowable subject matter under 103
Rosewarne (U.S. Pub. No. 20160227244 A1) and Li (U.S. Pub. No. 20150358623 A1) are closest prior art.
Regarding to claim 1, 5, 10 and 14:
10. Rosewarne teach an apparatus for video encoding, the apparatus comprising: at least one memory; and one or more hardware processors configured to read instructions from the at least one memory to perform operations comprising: (Rosewarne [0016] a memory for storing data and a computer program; [0017] a processor coupled to said memory, the computer program comprising instructions for)
encoding, into a data stream, (Rosewarne [0087] FIG. 10 is a schematic flow diagram showing a method of encoding a coding unit (CU) syntax structure into an encoded bitstream;)
and responsive to the second flag indicating the portion of the current picture is coded using IBC, (Rosewarne [0056] decoding an intra block copy flag from the video bitstream if the determined prediction mode is intra-prediction, the intra block copy flag indicating that current samples are based on previously decoded samples of a current frame; )
encoding a prediction residual into the data stream, (Rosewarne [0166] As seen in FIG. 4, an intra block copy module 436 of the video decoder 134 produces a block of reference samples, by copying an array of samples from the current and/or the previous coding tree blocks (CTBs). The offset of the reference samples is calculated by adding a block vector, decoded by the entropy decoder 420, to the location of the current coding unit (CU). The multiplexer module 428 selects the intra-predicted prediction unit (PU) 464 or the inter-predicted prediction unit (PU) 462 for a prediction unit (PU) 466 or a reference block from the intra block copy module 436, depending on the current prediction mode 454. The prediction unit (PU) 466, which is output from the multiplexer module 428, is added to the residual sample array 456 from the inverse scale and transform module 422 by the summation module 424 to produce sum 458. )
Li teach a first flag that indicates whether inter prediction is allowed for a portion of a current picture; (Li [0115] The flag bit constrained_intra_pred_flag is configured to indicate whether reconstructed pixels in inter prediction coding blocks are allowed to be used as prediction reference pixels of intra prediction coding blocks or not in the picture decoding process. When the value of the flag bit is 1, decoding process of the picture referring to the PPS shall not use the reconstructed pixels in inter prediction coding blocks as the intra prediction reference pixels in the picture. When the value of the flag bit is 0, decoding process of the picture referring to the PPS may use the reconstructed pixels in the inter prediction coding blocks as the intra prediction reference pixels in the picture. Default value of the flag bit is 0.)
103 rejection is not applied because: prior art do not teach responsive to the first flag indicating that inter prediction is not allowed for the portion of the current picture, encoding a second flag into the data stream that indicates whether the portion of the current picture is coded using intra block copy (IBC); wherein the prediction residual is determined based on applying IBC to reconstruct the portion of the current picture.
Dependent claims are allowed because of dependency. Claims may allowable if applicant file terminal disclaimer and establish 112 (a) support from specification.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to NASIM N NIRJHAR whose telephone number is (571) 272-3792. The examiner can normally be reached on Monday - Friday, 8 am to 5 pm ET.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William F Kraig can be reached on (571) 272-8660. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300.
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/NASIM N NIRJHAR/Primary Examiner, Art Unit 2896