Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Allowable Subject Matter
Claims 2-6 and 14-18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim Rejections - 35 USC § 112
Claim 9 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 9 recites “the third port of the control circuit includes a general-purpose input/output port (GPIO)” and subsequently recites “the universal input/output port is coupled to the thermostatic device through an integrated circuit (IIC).” It is unclear whether the recited “universal input/output port” is intended to refer to the previously recited “general-purpose input/output port (GPIO)” or to a separate, previously unrecited element.
Additionally, claim 9 recites coupling through “an integrated circuit (IIC).” The meaning of this limitation is unclear because “IIC” ordinarily denotes an Inter-Integrated Circuit interface or bus, whereas the claim identifies IIC as an “integrated circuit.” Accordingly, the metes and bounds of claim 9 are unclear.
Claims 1, 7, 10, 12 and 20 is rejected under 35 U.S.C. 103 as being unpatentable over Merrow et al. (US 2009/0262454 A1) in view of Lee et al. (US 2014/0047288 A1).
Regarding claim 1, Merrow teaches a testing apparatus comprising a first communication interface; a second communication interface connected to a device under test; a thermostatic device comprising a cavity in which the device under test is placed; and a control circuit, in that Merrow discloses a disk-drive testing system having test electronics, an internal cavity/test compartment receiving a disk drive for testing, a test-slot connector engaging the disk drive, and a connection interface circuit providing electrical communication between the test-slot connector and the test electronics (paras. [0005], [0013]-[0015]).
Merrow further teaches that the control/test electronics are configured to control a temperature inside the cavity of the thermostatic device, because the test electronics control current supplied to thermoelectric and/or heating devices based on signals received from temperature sensors disposed within the internal cavity (para. [0013]).
Merrow does not expressly teach the claimed arrangement wherein a first port of the control circuit is coupled to the first communication interface, a second port of the control circuit is coupled to the second communication interface, and the control circuit is configured to implement information transmission between the first communication interface and the second communication interface.
Lee teaches this missing interface architecture. Lee discloses a test control unit 130 including a communication interface unit 131 connected toward host terminal 110, a storage interface unit 170 connected toward storage device 201, and embedded processor 133 controlling the storage test and interface selection (para. [0061]). Lee further teaches that communication interface unit 131 receives information from the host and transfers the information to embedded processor 133, while test data is transmitted from embedded processor 133 through storage interface unit 170 to the storage device, and result data is transmitted back from the storage device through the storage interface unit and embedded processor to the communication interface unit and host terminal (paras. [0068]-[0070], [0078]-[0085]). Thus, Lee teaches a control circuit coupled between first and second communication interfaces and configured to implement information transmission between the first communication interface and the second communication interface.
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Merrow's testing system to incorporate Lee's host-side communication interface, DUT-side storage interface, and intervening test control unit, because Lee teaches this architecture for transmitting test commands and test-result information between a host and a storage device under test. The modification would predictably provide Merrow's temperature-controlled testing system with a known bidirectional communication architecture while retaining Merrow's temperature-control functionality.
Regarding claim 7, Lee further teaches the first communication interface and the second communication interface require different formats for data information; and the control circuit is configured to process data information transmitted between the first communication interface and the second communication interface, so that the processed data information adapts to the format requirements of the first communication interface or the second communication interface. Lee teaches a test control unit having a communication interface unit 131 on the host side and a storage interface unit 170 on the storage-device side, wherein the storage interface supports different interface protocols, including SATA, SAS, and PCIe (paras. [0061], [0065]). Lee further teaches processing instruction and writing data according to the protocol corresponding to the selected storage interface and converting the processed data into a physical signal suitable for storage device 201 (paras. [0073]-[0075]). Lee similarly processes data received from the storage device according to the corresponding interface format before transferring the data toward embedded processor 133 and the host-side communication interface (paras. [0078]-[0085]).
It would have been obvious to use Lee's interface-format processing in the Merrow testing system to permit information communicated between the host/test electronics and the DUT to conform to the respective interface requirements, thereby allowing the tester to communicate with storage devices employing different interface protocols.
Regarding claim 10, Merrow teaches a test-slot housing having an internal cavity including a test compartment configured to receive and support a disk-drive transporter carrying a disk drive for testing (paras. [0005], [0022], [0042]).
Merrow does not expressly teach that a volume of the cavity is greater than or equal to 200 ml. However, Merrow teaches that the cavity is dimensioned to accommodate the disk drive and associated transporter while permitting temperature-controlled airflow around the device. The volume of the cavity therefore constitutes a result-effective dimensional parameter that would have been routinely selected according to the physical dimensions of the device under test and the space required for thermal control. It would have been obvious to one of ordinary skill in the art through routine optimization to provide a cavity volume of at least 200 ml to accommodate the device under test and provide sufficient space for circulation of temperature-controlled air, with a reasonable expectation of successfully performing the temperature-controlled testing taught by Merrow.
Regarding claim 12, Lee further teaches that the device under test is a solid state drive (SSD). Lee expressly discloses a storage interface apparatus for a solid state drive tester and teaches testing an SSD using a test control unit coupled to the storage under test (paras. [0002], [0008]-[0014], [0055]-[0061]).
Regarding claim 20, Merrow teaches placing a device under test in a cavity of a thermostatic device, by placing a disk drive within a test compartment of an internal cavity of a test slot for temperature-controlled testing (paras. [0005], [0016], [0022]).
Merrow further teaches sending a test instruction to a control circuit and, in response to the test instruction, controlling a temperature inside the cavity and obtaining information of the device under test at different temperatures. Merrow teaches test electronics executing test programs/routines that control heating and cooling of the test slot (paras. [0013], [0021], [0072]). Merrow further teaches a functional testing system that tests the disk drive at different operating temperatures, including reading and writing data at different temperatures, such as reading while hot and writing while cold, or vice versa (paras. [0183]-[0184]). Merrow further teaches communicating test information with the device under test through a test-slot connector and connection-interface circuitry coupled to the test electronics (paras. [0015], [0182]-[0184]).
Merrow does not expressly teach the claimed arrangement wherein a first port of the control circuit is coupled to a first communication interface, a second port is coupled to a second communication interface connected to the device under test, and the control circuit implements information transmission between the first communication interface and the second communication interface.
Lee teaches the missing communication architecture. Lee teaches a test control unit having a communication interface coupled to a host, a storage interface coupled to the storage device under test, and an embedded processor positioned between and communicating through the respective interfaces (paras. [0061], [0068]-[0070]). Lee further teaches transmitting test instructions and writing data from the processor through the storage interface to the DUT and transmitting result/read data from the DUT through the storage interface and processor to the host-side communication interface (paras. [0073]-[0075], [0078]-[0085]).
It would have been obvious to one of ordinary skill in the art to incorporate Lee’s host-side and DUT-side communication architecture into Merrow’s temperature-controlled testing method in order to provide a known bidirectional communication path for transmitting test instructions to the DUT and returning test information obtained while the DUT is tested at different temperatures.
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Merrow et al. (US 2009/0262454 A1) in view of Lee et al. (US 2014/0047288 A1) and further in view of Bassett et al. (US 2017/0177537 A1).
Regarding claim 8, Lee teaches use of a PCIe interface in the storage-device test architecture, including a PCIe transaction/interface path for communicating with a storage device (paras. [0065], [0071]-[0075]).
Merrow and Lee do not expressly teach that the second communication interface includes an M.2 interface.
Bassett teaches an adapter having a PCIe-side interface and an M.2-side interface. Specifically, Bassett discloses a PCIe card adapter 230 connected to PCIe slot 224 through PCIe card edge 232 using a standard PCIe interface configuration, and further discloses that the adapter includes an M.2 slot 234 for connecting an M.2 SSD device 240 (paras. [0029]-[0032]). Bassett further teaches that the PCIe-side and M.2-side interfaces are communicatively coupled such that signals are transmitted through the adapter between the PCIe system side and the M.2 device side (paras. [0033]-[0035]).
It would have been obvious to one of ordinary skill in the art to configure the communication interfaces of the Merrow-Lee testing system to include a PCIe interface on one side and an M.2 interface on the DUT side, as taught by Bassett, in order to permit the PCIe-capable test system to communicate with and test M.2 storage devices using a known PCIe-to-M.2 interface arrangement. Such a modification would have predictably enabled compatibility with M.2 SSDs while retaining the underlying PCIe communication functionality.
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Merrow et al. (US 2009/0262454 A1) in view of Lee et al. (US 2014/0047288 A1) and further in view of Hu et al. (US 2014/0379104 A1).
Regarding claim 9, Merrow and Lee do not expressly teach that the third port of the control circuit includes a general-purpose input/output port (GPIO), wherein the universal input/output port is coupled to the thermostatic device through an inter-integrated circuit (IIC).
Hu teaches a control system including an I2C controller coupled to an I2C expander, wherein the I2C expander includes a plurality of ports and is connected to downstream controlled devices using GPIO (paras. [0010], [0027]). Hu further teaches transmitting control signals to the downstream devices through the I2C expander (paras. [0022]-[0024], [0034]-[0036]).
It would have been obvious to one of ordinary skill in the art to implement the control connection between the control circuit and thermostatic device of the Merrow-Lee system using the I2C/GPIO control architecture taught by Hu, because Hu teaches such an arrangement as a known technique for providing addressable control communication between a controller and downstream controlled devices. The modification would predictably provide a standardized serial control path while permitting GPIO-based device control.
Claims 11, 13 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Merrow et al. (US 2009/0262454 A1) in view of Lee et al. (US 2014/0047288 A1) and further in view of Wolff et al. (US 2019/0277907 A1).
Regarding claim 11, Merrow and Lee do not expressly teach that the control circuit further comprises a fourth port configured to receive an input voltage, wherein the control circuit is configured to regulate the input voltage to provide a voltage environment required for testing the device under test.
Wolff teaches a test platform having power-supply components that receive power from an external power source, convert the received power into power levels appropriate for the DUT, and control delivery of the converted power to the DUT (para. [0025]). Wolff further teaches that the power-supply components may be provided individually for respective DUTs during testing.
It would have been obvious to one of ordinary skill in the art to incorporate the voltage-regulation arrangement taught by Wolff into the Merrow-Lee testing system so that the testing circuitry receives an input voltage, regulates the received voltage to a level suitable for the DUT, and supplies the regulated voltage during testing, thereby providing the DUT with the required electrical test environment.
Regarding claim 13, Merrow teaches a testing device comprising a thermostatic device having a cavity in which a device under test is disposed, and a control circuit configured to control a temperature inside the cavity. Merrow discloses a disk-drive testing system having a test-slot housing with an internal cavity/test compartment receiving a disk drive, test electronics electrically communicating with temperature-control components and temperature sensors, and the test electronics controlling operation of the temperature-control components based on sensed temperature (paras. [0005], [0013]-[0015]).
Merrow further teaches that the control circuitry communicates test routines and test information with the device under test through a test-slot connector and connection interface circuit (para. [0015]).
Merrow does not expressly teach the claimed arrangement of a first communication interface, a second communication interface coupled to the device under test, and a control circuit having a first port coupled to the first communication interface and a second port coupled to the second communication interface and configured to implement information transmission between the first and second communication interfaces.
Lee teaches the missing communication architecture. Lee discloses a test control unit having a communication interface toward a host, a storage interface toward the storage device under test, and an embedded processor controlling testing and communication between the host side and storage side (paras. [0061], [0068]-[0070], [0078]-[0085]).
It would have been obvious to one of ordinary skill in the art to incorporate Lee’s host-side and DUT-side communication architecture into Merrow’s temperature-controlled testing system in order to permit test commands and test results to be transmitted between a host and the device under test using known storage-device interface circuitry.
Merrow and Lee do not expressly teach a power generating device coupled to a fourth port of the control circuit, wherein the control circuit is configured to regulate voltage supplied by the power generating device to provide a voltage environment required for testing the device under test.
Wolff teaches a test platform including power-supply components associated with the test circuitry, wherein the power-supply components receive input power, convert the received power into DUT power levels, and control delivery of the resulting power to the DUT during testing (para. [0025]).
It would have been obvious to one of ordinary skill in the art to further incorporate the controllable power-supply arrangement taught by Wolff into the Merrow-Lee testing system so that the control circuitry receives power from a power-generating source and regulates the supplied voltage to a level appropriate for the DUT, thereby providing a required electrical environment during testing.
Regarding claim 19, see rejection of claim 7.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Merrow et al (US 2011/0013667) abstract and para 0005-0008
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/OMEED ALIZADA/Primary Examiner, Art Unit 2686
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