Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendments
This action is in response to Applicant's amendments filed 6 April 2026. Claims 1-20 were previously pending. Claims 1, 7, and 14 have been amended according to Applicant’s amendments. Claims 6, 13, and 20, have been cancelled. No new claims have been added. Accordingly, claims 1-5, 7-12, and 14-19 remain pending and under consideration.
Response to Arguments
Specification-
The title of the invention has been amended to be descriptive. Accordingly, the objection to the title is withdrawn.
35 USC 103 -
Applicant’s arguments, see remarks page 7-9, filed 6 April 2026, with respect to the rejection of claims 1-20 under 35 USC 103 have been fully considered and are persuasive in part. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground of rejection is made in view of Lee (US 20200264973 A1) in view of Kim.
With respect to Applicant’s argument regarding Kim teaching a command directed to writing data, Examiner notes that Kim is cited to specifically teach the feature of a flag bit indicating erasure of related data. Applicant’s argument that Kim’s command is deleting previously written data only supports its use for teaching the erasure/deletion flag bit as only previously written data may be erased or deleted.
Further, in response to applicant's argument that the references fail to show certain features of the invention, it is noted that the features upon which applicant relies (i.e., fundamentally different command types operating under different protocols (SCSI/NVMe) and serving different functions. Applicant's Specification makes clear that the flag bit occupies a reserved region of the unmap or dataset management command (i.e., a bit position that has not been assigned any function in the protocol standard), not a position in a write command, as in Kim. See Specification at paras. [0081 ]-[0083]) are not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Lee (US 2020/0264973 A1, hereinafter Lee) in view of Kim (US 2019/0212946 A1, hereinafter Kim).
Regarding claims 1, 7, and 14, taking claim 7 as exemplary, Lee discloses a system, comprising: a host (See Lee, Fig. 1 and [0048] disclosing host device 102) configured to:
send a command comprising address information wherein the command comprises one of an unmap command or a dataset management command and indicates whether to delete the target data (See Lee [0136], “According to an embodiment of the present invention, the host 102 may transmit an unmap request with at least one of a physical address, mapping information including a logical address and a physical address mapped to the logical address, or an offset of the mapping information, referring to the host map data MAP_H” and [0166] The unmap request UNMAP_REQ may be for releasing a relation between a logical address and a physical address corresponding thereto. The unmap request UNMAP_REQ may include a sanitize request, an erase request, a delete request, a discard request and a format request”); and
a memory system coupled with the host (See Lee, Fig. 1 and [0048] disclosing host 102 coupled to memory system 110) and comprising:
a memory device (See Lee, Fig. 1 and [0053] disclosing memory device 150); and
a controller coupled with the memory device (See Lee, Fig. 1 and [0053], disclosing memory controller 130 coupled with memory devices 150) and configured to:
receive the command (See Lee, [0180] “The host controller interface 108 transmits the unmap request UNMAP_REQ, together with the logical address LA and the physical address PA, to the controller 130”); and
perform a delete operation on the target data (See Lee, [0166] “The unmap request UNMAP_REQ may be for releasing a relation between a logical address and a physical address corresponding thereto. The unmap request UNMAP_REQ may include a sanitize request, an erase request, a delete request, a discard request and a format request”).
Lee does not disclose the use of a flag bit of target data, wherein the flag bit indicates whether to delete the target data, and perform a delete operation on the target data based on the flag bit being in a state indicating to delete the target data by applying an erase voltage to memory cells of the memory device containing the target data.
However, Kim discloses the use of a flag bit of target data, wherein the flag bit is to indicate whether to delete the target data, and perform a delete operation on the target data based on the flag bit being in a state indicating to delete the target data by applying an erase voltage to memory cells of the memory device containing the target data (See Kim, [0044], disclosing “the write command WCMD including…a data delete bit indicating whether to delete previously provided data” and [0151], “an erase voltage generated in an erase operation may be applied to well regions of memory cells in which the erase operation is to be performed”).
Lee and Kim are analogous art directed to improved memory management techniques. It would have been obvious to a person having ordinary skill in the art, before the effective filing date of the claimed invention, to combine the memory system of Lee with the delete bit of Kim as system communication bandwidth usage can be effectively reduced as a single bit is the smallest amount of data which can be used for conveying information.
Regarding claim 2, 9, and 15, taking claim 9 as exemplary, Lee in view of Kim disclosed the system of claim 7 as above. Lee further discloses wherein the target data is stored in the memory device (See Lee [0051] The memory system 110 may operate or perform a specific function or operation in response to a request from the host 102 and, particularly, may store data to be accessed by the host 102).
Regarding claims 3, 10, and 16, taking claim 10 as exemplary, Lee in view of Kim disclosed the system of claim 9 as above. Lee further discloses wherein the controller is further configured to: unmap mapping information of logical address to physical address of the target data in response to the command (See Lee, [0143] Although not shown in FIG. 8B, when the logical address LA, the encrypted physical address PA_E, and the encrypted character CHA_E are received from the host 102, the controller 130 determines a validity of the encrypted physical address PA_E by decrypting the encrypted physical address PA_E and the encrypted character CHA_E. The controller 130 may perform an unmap operation on the valid physical address PA).
Regarding claims 4, 11, and 17, taking claim 11 as exemplary, Lee in view of Kim disclosed the system of claim 10 as above. Lee further discloses wherein the memory device comprises a plurality of memory blocks (See Lee [0057] The memory device 150 may be a nonvolatile memory device and may retain data stored therein even without electrical power being supplied. The memory device 150 may store data provided from the host 102 through a write operation, while providing data stored therein to the host 102 through a read operation. The memory device 150 may include a plurality of memory blocks 152, 154, 156, each of which may include a plurality of pages. Each of the plurality of pages may include a plurality of memory cells to which a plurality of word lines (WL) are electrically coupled. The memory device 150 also includes a plurality of memory dies, each of which includes a plurality of planes, each of which includes a plurality of memory blocks 152, 154, 156), and prior to performing the delete operation, the controller is further configured to: transfer valid data in the same memory block as the target data to another memory block (See Lee [0083] On the other hand, the block manager 48 can be configured to manage blocks in the memory device 150 according to the number of valid pages, select and erase blocks having no valid pages when a free block is needed, and select a block including the least number of valid pages when it is determined that garbage collection is necessary. The state manager 42 can perform garbage collection to move the valid data to an empty block and erase the blocks containing the moved valid data so that the block manager 48 may have enough free blocks (empty blocks with no data).).
Regarding claims 5, 12, and 18, taking claim 12 as exemplary, Lee in view of Kim disclosed the system of claim 9 as above. Lee further discloses wherein after the delete operation is completed, the controller is further configured to: generate completion response information for the command; and send the completion response information to the host (See Lee, [0072] The plurality of memory dies in the memory 150 can transmit an operation result via the same channels or ways, respectively, after each operation is complete. Then, the controller 130 may transmit a response or an acknowledge signal to the host 102).
Regarding claim 8, Lee in view of Kim disclosed the system of claim 7 as above. Lee in view of Kim further discloses wherein the host comprises: a memory; and a processor coupled to the memory (See Lee, [0049] The host 102 may include, for example, any of various portable electronic devices such as a mobile phone, an MP3 player and a laptop computer, or an electronic device such as a desktop computer, a game player, a television (TV), a projector, and/or the like) and configured to:
receive a request (See Lee [0050] The OS may support functions and operations corresponding to a user's requests and [0136], “According to an embodiment of the present invention, the host 102 may transmit an unmap request with at least one of a physical address, mapping information including a logical address and a physical address mapped to the logical address, or an offset of the mapping information, referring to the host map data MAP_H”); and set the flag bit to the state indicating to delete the target data (See Kim, [0044], disclosing “a data delete bit indicating whether to delete previously provided data”) based on the request comprising a requirement of deleting the target data (See Lee [0166] “The unmap request UNMAP_REQ may be for releasing a relation between a logical address and a physical address corresponding thereto. The unmap request UNMAP_REQ may include a sanitize request, an erase request, a delete request, a discard request and a format request”).
Regarding claim 19, Lee in view of Kim disclosed the operation method of the memory system of claim 18 as above. Lee further discloses wherein after generating the completion response information for the command, the operation method further comprises: sending the completion response information to the host (See Lee, [0072] The plurality of memory dies in the memory 150 can transmit an operation result via the same channels or ways, respectively, after each operation is complete. Then, the controller 130 may transmit a response or an acknowledge signal to the host 10).
EXAMINER’S NOTE
Examiner has cited particular columns and line numbers in the references applied to the claims above for the convenience of the Applicants. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the Applicants in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to EDMUND H KWONG whose telephone number is (571)272-8691. The examiner can normally be reached Monday-Friday 10-6 PT.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Arpan P. Savla can be reached at 571-272-1077. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/E.H.K/Examiner, Art Unit 2137
/Arpan P. Savla/Supervisory Patent Examiner, Art Unit 2137
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