DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
This Office action is in response to communications dated 1/15/2025.
Claims 1-20 are pending.
Claims 1, 8, and 15 are rejected.
Information Disclosure Statement
The information disclosure statements (IDSes) submitted on 1/15/2025, 3/11/2025, and 9/5/2025 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the Examiner.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the claims at issue are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the reference application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
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Claims 1, 8, and 15 of the instant application are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1, 8, and 15 of U.S. Patent No. 12,242,743 (“Roberts”). The following tables, in which similarities between claims 1, 8, and 15 of the instant application and claims 1, 8, and 15 of Roberts are highlighted in bold, and accompanying reasoning illustrate that claims 1, 8, and 15 of the instant application are not patentably distinct from claims 1, 8, and 15 of Roberts:
Instant Application, Independent Claim 1
Roberts, Independent Claim 1
1. A method comprising: using a processor of a memory device: selecting, for a checkpoint interval, an in-memory versioning mode for a memory location using past access information for memory accesses of the memory location, the past access information storing access information for a previous checkpoint, the selection of the in-memory versioning mode selecting either a direct copy mode or a zero copy mode, wherein the direct copy mode copies a working value from a first memory location of a pair of memory locations to a second memory location of the pair of memory locations as a result of a commit operation, the zero copy mode switches a value of a select field between the pair of memory locations as a result of a commit or rollback operation, wherein the value of the select field indicates a working location of the pair of memory locations; and processing memory commands for the memory location according to the selected in-memory versioning mode during the checkpoint interval.
1. A method comprising: receiving a memory access request for a memory location; responsive to receiving the memory access request, selecting an in-memory versioning mode for the memory location using past access information for memory accesses of the memory location of the memory access request, the past access information stored in an access profile data structure and used as input to selection logic, the past access information storing access information for a previous checkpoint, the selection of the in-memory versioning mode selecting either a direct copy mode or a zero copy mode, wherein the direct copy mode copies a working value from a first memory location of a pair of memory locations to a second memory location of the pair of memory locations on receipt of and prior to servicing, a first write operation after a commit operation, the zero copy mode switches a value of a select field between the pair of memory locations upon receipt of, and prior to servicing a first write operation after either a commit or rollback operation, wherein the value of the select field indicates a working location of the pair of memory locations; updating the access profile data structure based upon a memory access type corresponding to the memory access request; and processing the memory access request according to the selected versioning mode.
Independent claim 1 of Roberts does not appear to explicitly claim “using a processor of a memory device,” “a checkpoint interval,” “as a result of a commit operation,” “as a result of a commit or rollback operation,” or “during the checkpoint interval.” The Examiner notes that independent claim 1 of Roberts receives a memory access request for a memory location; a memory access request for a memory location by definition uses a processor to access the memory location specified by the memory access request. The Examiner further notes that a device that includes a memory and a processor to access the memory is a memory device. While independent claim 1 of Roberts does not appear to explicitly claim “a checkpoint interval,” independent claim 1 of Roberts maintains access information for a previous checkpoint. The Examiner notes that time between receipt of a memory access request and a previous checkpoint is a checkpoint interval for which a versioning mode may be selected. While independent claim 1 of Roberts does not appear to explicitly claim performing operations as a result of commit or rollback operations, independent claim 1 of Roberts does perform certain operations after completion of commit operations, which means that the certain operations, since they are performed after completion of commit operations, occur as a result of commit operations. Finally, although independent claim 1 of Robert does not appear to explicitly claim processing commands using a selected mode during a checkpoint interval, the Examiner notes that independent claim 1 of Roberts performs commands during a time starting from a previous checkpoint (i.e., during a checkpoint interval). Independent claim 1 of the instant application, while not identical to independent claim 1 of Roberts, is therefore not patentably distinct from independent claim 1 of Roberts.
Instant Application, Independent Claim 8
Roberts, Independent Claim 8
8. A computing device for managing memory versioning, the computing device comprising: a hardware processor; a memory, the memory storing instructions, which when executed by the hardware processor cause the computing device to perform operations comprising: selecting, for a checkpoint interval, an in-memory versioning mode for a memory location using past access information for memory accesses of the memory location, the past access information storing access information for a previous checkpoint, the selection of the in-memory versioning mode selecting either a direct copy mode or a zero copy mode, wherein the direct copy mode copies a working value from a first memory location of a pair of memory locations to a second memory location of the pair of memory locations as a result of a commit operation, the zero copy mode switches a value of a select field between the pair of memory locations as a result of a commit or rollback operation, wherein the value of the select field indicates a working location of the pair of memory locations; and processing memory commands for the memory location according to the selected in-memory versioning mode during the checkpoint interval.
8. A memory system comprising: a memory controller, configured to perform operations comprising: receiving a memory access request for a memory location; responsive to receiving the memory access request, selecting an in-memory versioning mode for the memory location using past access information for memory accesses of the memory location of the memory access request, the past access information stored in an access profile data structure and used as input to selection logic, the past access information storing access information for a previous checkpoint, the selection of the in-memory versioning mode selecting either a direct copy mode or a zero copy mode, wherein the direct copy mode copies a working value from a first memory location of a pair of memory locations to a second memory location of the pair of memory locations on receipt of and prior to servicing, a first write operation after a commit operation, the zero copy mode switches a value of a select field between the pair of memory locations upon receipt of, and prior to servicing a first write operation after either a commit or rollback operation, wherein the value of the select field indicates a working location of the pair of memory locations; updating the access profile data structure based upon a memory access type corresponding to the memory access request; and processing the memory access request according to the selected versioning mode.
Independent claim 8 of Roberts does not appear to explicitly claim “a checkpoint interval,” “as a result of a commit operation,” “as a result of a commit or rollback operation,” or “during the checkpoint interval.” The Examiner notes that independent claim 8 of Roberts receives a memory access request for a memory location; a memory access request for a memory location by definition uses a processor to access the memory location specified by the memory access request. The Examiner further notes that a device that includes a memory and a processor to access the memory is a memory device. While independent claim 8 of Roberts does not appear to explicitly claim “a checkpoint interval,” independent claim 8 of Roberts maintains access information for a previous checkpoint. The Examiner notes that time between receipt of a memory access request and a previous checkpoint is a checkpoint interval for which a versioning mode may be selected. While independent claim 8 of Roberts does not appear to explicitly claim performing operations as a result of commit or rollback operations, independent claim 8 of Roberts does perform certain operations after completion of commit operations, which means that the certain operations, since they are performed after completion of commit operations, occur as a result of commit operations. Finally, although independent claim 8 of Robert does not appear to explicitly claim processing commands using a selected mode during a checkpoint interval, the Examiner notes that independent claim 8 of Roberts performs commands during a time starting from a previous checkpoint (i.e., during a checkpoint interval). Independent claim 8 of the instant application, while not identical to independent claim 8 of Roberts, is therefore not patentably distinct from independent claim 8 of Roberts.
Instant Application, Independent Claim 15
Roberts, Independent Claim 15
15. A non-transitory machine-readable medium, storing instructions for managing memory versioning, the instructions, which when executed, cause the machine to perform operations comprising: selecting, for a checkpoint interval, an in-memory versioning mode for a memory location using past access information for memory accesses of the memory location, the past access information storing access information for a previous checkpoint, the selection of the in-memory versioning mode selecting either a direct copy mode or a zero copy mode, wherein the direct copy mode copies a working value from a first memory location of a pair of memory locations to a second memory location of the pair of memory locations as a result of a commit operation, the zero copy mode switches a value of a select field between the pair of memory locations as a result of a commit or rollback operation, wherein the value of the select field indicates a working location of the pair of memory locations; and processing memory commands for the memory location according to the selected in-memory versioning mode during the checkpoint interval.
15. A non-transitory machine-readable medium storing instructions, which when executed by a memory controller of a memory system, cause the memory controller to perform operations comprising: receiving a memory access request for a memory location; responsive to receiving the memory access request, selecting an in-memory versioning mode for the memory location using past access information for memory accesses of the memory location of the memory access request, the past access information stored in an access profile data structure and used as input to selection logic, the past access information storing access information for a previous checkpoint, the selection of the in-memory versioning mode selecting either a direct copy mode or a zero copy mode, wherein the direct copy mode copies a working value from a first memory location of a pair of memory locations to a second memory location of the pair of memory locations upon receipt of and prior to servicing, a first write operation after a commit operation, the zero copy mode switches a value of a select field between the pair of memory locations upon receipt of, and prior to servicing a first write operation after either a commit or rollback operation, wherein the value of the select field indicates a working location of the pair of memory locations; updating the access profile data structure based upon a memory access type corresponding to the memory access request; and processing the memory access request according to the selected versioning mode.
Independent claim 15 of Roberts does not appear to explicitly claim “a checkpoint interval,” “as a result of a commit operation,” “as a result of a commit or rollback operation,” or “during the checkpoint interval.” The Examiner notes that independent claim 15 of Roberts receives a memory access request for a memory location; a memory access request for a memory location by definition uses a processor to access the memory location specified by the memory access request. The Examiner further notes that a device that includes a memory and a processor to access the memory is a memory device. While independent claim 15 of Roberts does not appear to explicitly claim “a checkpoint interval,” independent claim 15 of Roberts maintains access information for a previous checkpoint. The Examiner notes that time between receipt of a memory access request and a previous checkpoint is a checkpoint interval for which a versioning mode may be selected. While independent claim 15 of Roberts does not appear to explicitly claim performing operations as a result of commit or rollback operations, independent claim 15 of Roberts does perform certain operations after completion of commit operations, which means that the certain operations, since they are performed after completion of commit operations, occur as a result of commit operations. Finally, although independent claim 15 of Robert does not appear to explicitly claim processing commands using a selected mode during a checkpoint interval, the Examiner notes that independent claim 15 of Roberts performs commands during a time starting from a previous checkpoint (i.e., during a checkpoint interval). Independent claim 15 of the instant application, while not identical to independent claim 15 of Roberts, is therefore not patentably distinct from independent claim 15 of Roberts.
Conclusion
The following prior art is made of record and is not relied upon for any rejection but is considered pertinent to Applicant's disclosure:
USPGPUB 2022/0066992: teaches a log-structured file system that uses checkpoints for versions of data.
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Daniel C. Chappell
Primary Examiner
Art Unit 2135
/Daniel C. Chappell/Primary Examiner, Art Unit 2135