Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This office action is in response to the communication filed on 8/18/2026.
Claims 8-27 have been examined.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 2/4/2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Specification
Applicant is reminded of the proper language and format for an abstract of the disclosure.
The abstract should be in narrative form and generally limited to a single paragraph on a separate sheet within the range of 50 to 150 words. The form and legal phraseology often used in patent claims, such as "means" and "said," should be avoided. The abstract should describe the disclosure sufficiently to assist readers in deciding whether there is a need for consulting the full patent text for details.
The language should be clear and concise and should not repeat information given in the title. It should avoid using phrases which can be implied, such as, "The disclosure concerns," "The disclosure defined by this invention," "The disclosure describes," etc.
The abstract of the disclosure is objected to because it contains phrases which can be implied (e.g. “the disclosed embodiments describe”, “the disclosed embodiments utilize”). Correction is required. See MPEP § 608.01(b).
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 14 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 14 recites “command/address interface”. It is unclear whether the interface needs to be both command and address, or only needs to be one or the other.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 8, 9, 11, 14-19, and 22-26 are rejected under 35 U.S.C. 103 as being unpatentable over Totah et al. (US Patent Number 11,050,570) hereinafter referred to as Totah.
Regarding claim 8, Totah disclosed a system comprising:
an interface (Totah Fig. 3 and Col. 7 Line 39 – Col. 9 Line 34 for example);
a storage device (Totah Fig. 3 and Col. 7 Line 39 – Col. 9 Line 34 for example); and
control logic (Totah Fig. 3 and Col. 7 Line 39 – Col. 9 Line 34 for example) configured to:
detect that a challenge failed (Totah Fig. 3 and Col. 7 Line 39 – Col. 9 Line 34 for example),
disable the interface in response to the detection (Totah Fig. 3 and Col. 7 Line 39 – Col. 9 Line 34 for example),
decrypt a response (Totah Fig. 3 and Col. 7 Line 39 – Col. 9 Line 34 for example), and
modify operation of the storage device (Totah Fig. 3 and Col. 7 Line 39 – Col. 9 Line 34 for example).
Totah did not explicitly teach that the storage device was a memory array having one or more memory banks.
Official Notice: However, it was well known in the art before the effective filing date of the invention that a storage device can be a memory array having one or more memory banks, such as RAM, DRAM, flash memory, etc., and as such it would have been obvious to the person having ordinary skill in the art to have employed such a memory as the storage device of Totah. This would have been obvious because the person having ordinary skill in the art would have been motivated to use a well-known, and efficient storage device for the generically taught storage device of Totah. Note that Totah did teach generically that the system includes storage devices and that storage devices can be disk drives, optical storage devices, and solid-state storage devices such as RAM, ROM, memory cards, flash cards, etc.
Totah also did not explicitly teach that the response was received after detecting that the challenge failed.
However, Totah taught that “when an interface authenticator is connected to a device, the device detects the presence of an interface authenticator, the device verifies that the interface authenticator public encryption key, digitally signed certificate and digitally signed certificate chain is valid using the public encryption key of the owner's trusted CA for the specific system where the device is approved for use, and the device uses a challenge-response protocol confirming that the interface authenticator's private encryption key corresponds with the interface authenticator's public encryption key and digitally signed certificate.”
The person having ordinary skill in the art would recognize that in the system of Totah a first interface authenticator can connect to the device at which point challenge-response authentication would be performed and, in some cases, will fail, at which point an interface is disabled. This meets the disabling limitation of the claim, and we will call this “the first failure”.
The person having ordinary skill in the art would also recognize that a second interface authenticator can be connected to the device at a time after the first failure. This is clear from Totah using the language “when an interface authenticator is connected”, and further because Totah states “The trust store 320 is a memory, storage device, database, or protected memory device that retains cryptographic information to identify, authenticate and validate interface authenticators trusted by the device 304.” (NB that Totah is indicating that there are plural interface authenticators and that the device performs authentications of a plurality of authenticators).
As such, the person having ordinary skill in the art would have recognized that at the point when a second interface authenticator is connected to the device, the device will perform challenge-response authentication of the second interface authenticator including decryption of the response received from the second interface authenticator. In the event that the authentication of the first interface authenticator failed, the claim language of “decrypting, by the memory device, a response received after detecting that the challenge failed” is met when the second interface authenticator is connected to the device.
The above-described scenario would have been obvious to the person having ordinary skill in the art before the effective filing date of the invention. This would have been obvious because the person having ordinary skill in the art would have recognized this to be normal operation of the device and system described by Totah.
Regarding claim 9, Totah disclosed that detecting that the challenge failed comprises: determining that a decryption of a received message failed (Totah Fig. 3 and Col. 19 Line 21 – Col. 20 Line 3 for example).
Regarding claim 11, Totah disclosed that modifying operation of the memory bank comprises: issuing a RESET command to the memory bank (Totah Fig. 3 and Col. 7 Line 39 – Col. 9 Line 34 for example).
Regarding claim 14, Totah disclosed that the interface comprises a command/address interface (Totah Fig. 5 and Col. 10 Line 39 – Col. 11 Line 33 for example – see also Col. 3 Lines 35-41 where Totah taught that the side channel is used to send read and write commands. It was well known for read and write commands to include the command as well as the address where the data will be read from or written to, and as such it would have been obvious to the person having ordinary skill in the art that the side channel of Totah is a command and address interface).
Regarding claims 15 and 22, Totah disclosed a method comprising:
receiving a command at a first device from a second device (Totah Fig. 3 and Col. 7 Line 39 – Col. 9 Line 34 for example);
transmitting an encrypted response from the first device to the second device (Totah Fig. 3 and Col. 7 Line 39 – Col. 9 Line 34 for example); and
disabling an interface of the first device based on results of the receiving (Totah Fig. 3 and Col. 7 Line 39 – Col. 9 Line 34 for example).
Totah did not explicitly teach that the receiving a command included that the command was an encrypted command and decrypting the encrypted command to obtain a decrypted command.
Official Notice: Encrypted communications between devices were well known in the art before the effective filing date of the invention, as was mutual authentication. As such it would have been obvious to the person having ordinary skill in the art before the effective filing date of the invention to have encrypted the challenge prior to sending it to the interface authenticator. This would have been obvious because the person having ordinary skill in the art would have been motivated to protect the authentication system from man-in-the-middle attacks, and further enabling mutual authentication between the devices 302 and 304.
Regarding claims 16 and 23, Totah taught that the encrypted command comprises a nonce command and the encrypted response comprises a corresponding nonce response (Totah Fig. 3 and Col. 7 Line 39 – Col. 9 Line 34 for example).
Regarding claims 17 and 24, Totah taught that the encrypted command includes a random number payload that must be decrypted and re-encrypted in the encrypted response.
Regarding claims 18 and 25, Totah taught that the encrypted command comprises a proof-of-work requirement (Totah Fig. 3 and Col. 7 Line 39 – Col. 9 Line 34 for example).
Regarding claims 19 and 26, Totah did not explicitly teach using a decaying timer to determine a time window for receiving the encrypted response.
Official Notice: It was well known in the art of authentication to utilize a timer (either counting up to a certain amount or down from a certain amount) to track an appropriate amount of time for a response to be received, and when a response is not received during that time the authentication fails. As such, it would have been obvious to the person having ordinary skill to have done so in the system of Totah. This would have been obvious because the person having ordinary skill in the art would have been motivated to prevent wasting resources while indefinitely waiting for a response.
Claims 10, 12, 20, 21, and 27 are rejected under 35 U.S.C. 103 as being unpatentable over Totah, and further in view of Wang et al. (US Patent Application Publication Number 2012/0278598) hereinafter referred to as Wang.
Regarding claim 10, Totah did not explicitly teach disabling the interface comprises: driving lines of the interface to logical zero.
Wang taught that device interfaces can be disabled by causing the data lines of the device to be driven to a particular state (e.g. 1 or a 0) and that this disables the interface because the data lines cannot change state (Wang Paragraph 0010 for example).
It would have been obvious to the person having ordinary skill in the art before the effective filing date of the invention to have employed the teachings of Wang in the interface system of Totah by driving the lines of the storage device to a particular state (e.g. 1 or 0) in order to disable the interface (sideband channel for example). This would have been obvious because the person having ordinary skill in the art would have been motivated to ensure the interface was disabled during the appropriate times.
Regarding claim 12, Totah and Wang taught that the control logic is further configured to: lower a signal on the interface after modifying operation of the memory bank (Wang Paragraph 0010 for example).
It would have been obvious to the person having ordinary skill in the art before the effective filing date of the invention to have employed the teachings of Wang in the interface system of Totah by driving the lines of the storage device to a particular state (e.g. 1 or 0) in order to disable the interface (sideband channel for example). This would have been obvious because the person having ordinary skill in the art would have been motivated to ensure the interface was disabled during the appropriate times.
Regarding claim 20, Totah did not explicitly teach that disabling the interface comprises: raising a signal to drive lines of the interface to logical zero.
Wang taught that device interfaces can be disabled by causing the data lines of the device to be driven to a particular state (e.g. 1 or a 0) and that this disables the interface because the data lines cannot change state (Wang Paragraph 0010 for example).
It would have been obvious to the person having ordinary skill in the art before the effective filing date of the invention to have employed the teachings of Wang in the interface system of Totah by driving the lines of the storage device to a particular state (e.g. 1 or 0) in order to disable the interface (sideband channel for example). This would have been obvious because the person having ordinary skill in the art would have been motivated to ensure the interface was disabled during the appropriate times.
Regarding claims 21 and 27, scrubbing a storage device of the first device after disabling the interface (Totah Fig. 3 and Col. 7 Line 39 – Col. 9 Line 34 for example).
Totah did not explicitly teach that the storage device was a memory array having one or more memory banks.
Official Notice: However, it was well known in the art before the effective filing date of the invention that a storage device can be a memory array having one or more memory banks, such as RAM, DRAM, flash memory, etc., and as such it would have been obvious to the person having ordinary skill in the art to have employed such a memory as the storage device of Totah. This would have been obvious because the person having ordinary skill in the art would have been motivated to use a well-known, and efficient storage device for the generically taught storage device of Totah. Note that Totah did teach generically that the system includes storage devices and that storage devices can be disk drives, optical storage devices, and solid-state storage devices such as RAM, ROM, memory cards, flash cards, etc.
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Totah, and further in view of Shoji et al. (US Patent Application Publication Number 2008/0307522) hereinafter referred to as Shoji.
Regarding claim 13, Totah did not explicitly teach that detecting that the challenge failed comprises: executing a background process to detect an authentication failure.
Shoji taught that when using an authenticated connected device to provide access, that the status of the connection should be continuously monitored and that upon detection of the authenticated device becoming disconnected, the system should employ controls to prevent access to the protected data (Shoji Fig. 3 and Paragraph 0076 for example).
It would have been obvious to the person having ordinary skill in the art before the effective filing date of the invention to have employed the teachings of Shoji in the access control system of Totah by continuously checking the connection status between the storage device and the interface authenticator, and upon detection of disconnection of the interface authenticator disabling the sideband channel. This would have been obvious because the person having ordinary skill in the art would have been motivated to prevent leakage of data.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the claims at issue are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the reference application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP §§ 706.02(l)(1) - 706.02(l)(3) for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/forms/. The filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to http://www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp.
Claims 8-27 rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-17 of U.S. Patent No. 11,726,923. Although the claims at issue are not identical, they are not patentably distinct from each other because the instant claims are essentially anticipated by the patent claims.
Claims 8-27 rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 12,321,286. Although the claims at issue are not identical, they are not patentably distinct from each other because the instant claims are essentially anticipated by the patent claims.
Conclusion
Claims 8-27 have been rejected.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MATTHEW T HENNING whose telephone number is (571)272-3790. The examiner can normally be reached Monday-Friday 7AM-2PM ET.
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/MATTHEW T HENNING/ Primary Examiner, Art Unit 2491
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