DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 11,537,307. Although the claims at issue are not identical, they are not patentably distinct from each other because of the following analysis:
Application 19/023,021
U.S. Patent 11, 537,307
1. A system comprising: a memory device; and a processing device, operatively coupled with the memory device, to perform operations comprising: detecting an occurrence of a first trigger; in response to the occurrence of the first trigger, redistributing a plurality of data units within a first group of data units to different physical locations on the memory device according to a direct mapping function; detecting an occurrence of a second trigger, wherein the second trigger occurs less frequently than the first trigger; and in response to the occurrence of the second trigger, redistributing a plurality of groups of data units to different physical locations on the memory device using indirect mapping.
1. A system comprising: a memory device; and a processing device, operatively coupled with the memory device, to perform operations comprising: periodically performing a first wear leveling operation using a direct mapping function on a data management unit of the memory device at a first frequency; and periodically performing a second wear leveling operation using indirect mapping on groups of data management units of the memory device at a second frequency,
the groups of data management units comprising a first plurality of unmapped groups and a second plurality of mapped groups, wherein the second wear leveling operation is performed less frequently than the first wear leveling operation,
and wherein periodically performing the second wear leveling operation comprises: determining a lowest unmapped wear metric of a first unmapped group of the first plurality of unmapped groups, the lowest unmapped wear metric indicating a least amount of wear among the first plurality of unmapped groups; determining a lowest mapped wear metric of a second mapped group of the second plurality of mapped groups, the lowest mapped wear metric indicating a least amount of wear among the second plurality of mapped groups; determining if the lowest unmapped wear metric indicates more wear than the lowest mapped wear metric;
responsive to determining that the lowest unmapped wear metric indicates more wear than the lowest mapped wear metric, swapping a physical location of the first unmapped group having the lowest unmapped wear metric with a physical location of the second mapped group having the lowest mapped wear metric;
and responsive to determining that the lowest unmapped wear metric does not indicate more wear than the lowest mapped wear metric, swapping the physical location of the first unmapped group having the lowest unmapped wear metric with a physical location of the second mapped group having a highest unmapped wear metric, wherein at least one of the first wear metric and the second wear metric is based on a combination of a first number of data write operations and a second number of data read operations performed on the memory device by a host machine since a previous wear leveling operation was performed, and wherein a weighting factor is applied to at least one of the first number of data write operations and the second number of data read operations.
2. The system of claim 1, wherein the memory device comprises a cross-point array of non-volatile memory cells.
2. The system of claim 1, wherein the memory device comprises a cross-point array of non-volatile memory cells.
3. The system of claim 1, wherein redistributing the plurality of data units within the first group of data units to different physical locations on the memory device according to the direct mapping function comprises: applying a first logical index associated with data from one of the plurality of data units to the direct mapping function to determine a physical index corresponding to a physical location on the memory device; and copying the data from the one of the plurality of data units to the physical location.
3. The system of claim 1, wherein periodically performing the first wear leveling operation using the direct mapping function comprises: applying a first logical index associated with data from the data management unit to the direct mapping function to determine a physical index corresponding to a physical location on the memory device; and copying the data from the data management unit to the physical location.
4. The system of claim 3, wherein the direct mapping function comprises at least one of a swap function, a circular shift function, or a linear function utilizing a base pointer value and a free pointer value.
4. The system of claim 3, wherein the direct mapping function comprises a swap function.
5. The system of claim 3, wherein the direct mapping function comprises a circular shift function.
6. The system of claim 3, wherein the direct mapping function comprises a linear function utilizing a base pointer value and a free pointer value.
5. The system of claim 1, wherein redistributing the plurality of groups of data units to different physical locations on the memory device using indirect mapping comprises: copying data from one of the plurality of groups of data units to an available physical location on the memory device; and recording a mapping of a second logical index associated with the data from the one of the plurality of groups of data units to the available physical location in a look-up table.
18. The system of claim 1, wherein using indirect mapping comprises identifying an available physical location on the memory device, copying data from the group of data management units to the available physical location on the memory device, and updating an entry in a data structure, the entry corresponding to a logical index associated with the group of data management units and indicating a physical index corresponding to the available physical location on the memory device.
6. The system of claim 1, wherein the occurrence of the first trigger and the occurrence of the second trigger are based on a period of time that has elapsed since a previous wear leveling operation was performed.
7. The system of claim 1, wherein the first frequency and the second frequency are based on a period of time that has elapsed since a previous wear leveling operation was performed.
7. The system of claim 1, wherein the occurrence of the first trigger and the occurrence of the second trigger are based on a number of data write operations performed on the memory device by a host system since a previous wear leveling operation was performed.
8. The system of claim 1, wherein the first frequency and the second frequency are based on the number of data write operations performed on the memory device by a host machine since a previous wear leveling operation was performed.
8. A method comprising: detecting an occurrence of a first trigger; in response to the occurrence of the first trigger, redistributing a plurality of data units within a first group of data units to different physical locations on a memory device according to a direct mapping function; detecting an occurrence of a second trigger, wherein the second trigger occurs less frequently than the first trigger; and in response to the occurrence of the second trigger, redistributing a plurality of groups of data units to different physical locations on the memory device using indirect mapping.
9. A method comprising: periodically performing, by a processing device, a first wear leveling operation using a direct mapping function on a data management unit of a memory device at a first frequency; and periodically performing, by the processing device, a second wear leveling operation using indirect mapping on groups of data management units of the memory device at a second frequency, the groups of data management units comprising a first plurality of unmapped groups and a second plurality of mapped groups, wherein the second wear leveling operation is performed less frequently than the first wear leveling operation, and wherein periodically performing the second wear leveling operation comprises: determining a lowest unmapped wear metric of a first unmapped group of the first plurality of unmapped groups, the lowest unmapped wear metric indicating a least amount of wear among the first plurality of unmapped groups; determining a lowest mapped wear metric of a second mapped group of the second plurality of mapped groups, the lowest mapped wear metric indicating a least amount of wear among the second plurality of mapped groups; determining if the lowest unmapped wear metric indicates more wear than the lowest mapped wear metric; responsive to determining that the lowest unmapped wear metric indicates more wear than the lowest mapped wear metric, swapping a physical location of the first unmapped group having the lowest unmapped wear metric with a physical location of the second mapped group having the lowest mapped wear metric; and responsive to determining that the lowest unmapped wear metric does not indicate more wear than the lowest mapped wear metric, swapping the physical location of the first unmapped group having the lowest unmapped wear metric with a physical location of the second mapped group having a highest unmapped wear metric, wherein at least one of the first wear metric and the second wear metric is based on a combination of a first number of data write operations and a second number of data read operations performed on the memory device by a host machine since a previous wear leveling operation was performed, and wherein a weighting factor is applied to at least one of the first number of data write operations and the second number of data read operations.
9. The method of claim 8, wherein the memory device comprises a cross-point array of non-volatile memory cells.
2. The system of claim 1, wherein the memory device comprises a cross-point array of non-volatile memory cells.
10. The method of claim 8, wherein redistributing the plurality of data units within the first group of data units to different physical locations on the memory device according to the direct mapping function comprises: applying a first logical index associated with data from one of the plurality of data units to the direct mapping function to determine a physical index corresponding to a physical location on the memory device; and copying the data from the one of the plurality of data units to the physical location.
10. The method of claim 9, wherein periodically performing the first wear leveling operation using the direct mapping function comprises: applying a first logical index associated with data from the data management unit to the direct mapping function to determine a physical index corresponding to a physical location on the memory device; and copying the data from the data management unit to the physical location.
11. The method of claim 10, wherein the direct mapping function comprises at least one of a swap function, a circular shift function, or a linear function utilizing a base pointer value and a free pointer value.
11. The method of claim 10, wherein the direct mapping function comprises at least one of a swap function, a circular shift function, or a linear function utilizing a base pointer value and a free pointer value.
12. The method of claim 8, wherein redistributing the plurality of groups of data units to different physical locations on the memory device using indirect mapping comprises: copying data from one of the plurality of groups of data units to an available physical location on the memory device; and recording a mapping of a second logical index associated with the data from the one of the plurality of groups of data units to the available physical location in a look-up table.
18. The system of claim 1, wherein using indirect mapping comprises identifying an available physical location on the memory device, copying data from the group of data management units to the available physical location on the memory device, and updating an entry in a data structure, the entry corresponding to a logical index associated with the group of data management units and indicating a physical index corresponding to the available physical location on the memory device.
13. The method of claim 8, wherein the occurrence of the first trigger and the occurrence of the second trigger are based on a period of time that has elapsed since a previous wear leveling operation was performed.
7. The system of claim 1, wherein the first frequency and the second frequency are based on a period of time that has elapsed since a previous wear leveling operation was performed.
14. The method of claim 8, wherein the occurrence of the first trigger and the occurrence of the second trigger are based on a number of data write operations performed on the memory device by a host system since a previous wear leveling operation was performed.
12. The method of claim 9, wherein the first frequency and the second frequency are based on at least one of a period of time that has elapsed or the number of data write operations performed on the memory device by a host machine since a previous wear leveling operation was performed.
15. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising: detecting an occurrence of a first trigger; in response to the occurrence of the first trigger, redistributing a plurality of data units within a first group of data units to different physical locations on a memory device according to a direct mapping function; detecting an occurrence of a second trigger, wherein the second trigger occurs less frequently than the first trigger; and in response to the occurrence of the second trigger, redistributing a plurality of groups of data units to different physical locations on the memory device using indirect mapping.
13. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising: detecting an occurrence of a first trigger; redistributing a plurality of data units within a first group of data units to different physical locations on a memory device according to a direct mapping function; detecting an occurrence of a second trigger, wherein the second trigger occurs less frequently than the first trigger; and redistributing a plurality of groups of data units to different physical locations on the memory device using indirect mapping, the plurality of groups of data units comprising a first plurality of unmapped groups and a second plurality of mapped groups, wherein redistributing the plurality of groups of data units comprises: determining a lowest unmapped wear metric of a first unmapped group of the first plurality of unmapped groups, the lowest unmapped wear metric indicating a least amount of wear among the first plurality of unmapped groups; determining a lowest mapped wear metric of a second mapped group of the second plurality of mapped groups, the lowest mapped wear metric indicating a least amount of wear among the second plurality of mapped groups; determining if the lowest unmapped wear metric indicates more wear than the lowest mapped wear metric; responsive to determining that the lowest unmapped wear metric indicates more wear than the lowest mapped wear metric, swapping a physical location of the first unmapped group having the lowest unmapped wear metric with a physical location of the second mapped group having the lowest mapped wear metric; and responsive to determining that the lowest unmapped wear metric does not indicate more wear than the lowest mapped wear metric, swapping the physical location of the first unmapped group having the lowest unmapped wear metric with a physical location of the second mapped group having a highest unmapped wear metric, wherein at least one of the first wear metric and the second wear metric is based on a combination of a first number of data write operations and a second number of data read operations performed on the memory device by a host machine since a previous wear leveling operation was performed, and wherein a weighting factor is applied to at least one of the first number of data write operations and the second number of data read operations.
16. The non-transitory computer-readable storage medium of claim 15, wherein the memory device comprises a cross-point array of non-volatile memory cells.
14. The non-transitory computer-readable storage medium of claim 13, wherein the memory device comprises a cross-point array of non-volatile memory cells.
17. The non-transitory computer-readable storage medium of claim 15, wherein redistributing the plurality of data units within the first group of data units to different physical locations on the memory device according to the direct mapping function comprises: applying a first logical index associated with data from one of the plurality of data units to the direct mapping function to determine a physical index corresponding to a physical location on the memory device; and copying the data from the one of the plurality of data units to the physical location.
15. The non-transitory computer-readable storage medium of claim 13, wherein redistributing the plurality of data units within the first group of data units to different physical locations on the memory device according to the direct mapping function comprises: applying a first logical index associated with data from one of the plurality of data units to the direct mapping function to determine a physical index corresponding to a physical location on the memory device; and copying the data from the one of the plurality of data units to the physical location.
18. The non-transitory computer-readable storage medium of claim 17, wherein the direct mapping function comprises at least one of a swap function, a circular shift function, or a linear function utilizing a base pointer value and a free pointer value.
16. The non-transitory computer-readable storage medium of claim 15, wherein the direct mapping function comprises at least one of a swap function, a circular shift function, or a linear function utilizing a base pointer value and a free pointer value.
19. The non-transitory computer-readable storage medium of claim 15, wherein redistributing the plurality of groups of data units to different physical locations on the memory device using indirect mapping comprises: copying data from one of the plurality of groups of data units to an available physical location on the memory device; and recording a mapping of a second logical index associated with the data from the one of the plurality of groups of data units to the available physical location in a look-up table.
18. The system of claim 1, wherein using indirect mapping comprises identifying an available physical location on the memory device, copying data from the group of data management units to the available physical location on the memory device, and updating an entry in a data structure, the entry corresponding to a logical index associated with the group of data management units and indicating a physical index corresponding to the available physical location on the memory device.
20. The non-transitory computer-readable storage medium of claim 15, wherein the occurrence of the first trigger and the occurrence of the second trigger are based on at least one of a period of time that has elapsed or a number of data write operations performed on the memory device by a host system since a previous wear leveling operation was performed.
17. The non-transitory computer-readable storage medium of claim 13, wherein the occurrence of the first trigger and the occurrence of the second trigger are based on at least one of a period of time that has elapsed or the number of data write operations performed on the memory device by a host machine since a previous wear leveling operation was performed.
Claims 1-4, 6-11, 13-18, and 20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 12,436,702. Although the claims at issue are not identical, they are not patentably distinct from each other because of the following analysis:
Application 19/023,021
U.S. Patent 12,436,702
1. A system comprising: a memory device; and a processing device, operatively coupled with the memory device, to perform operations comprising: detecting an occurrence of a first trigger; in response to the occurrence of the first trigger, redistributing a plurality of data units within a first group of data units to different physical locations on the memory device according to a direct mapping function; detecting an occurrence of a second trigger, wherein the second trigger occurs less frequently than the first trigger; and in response to the occurrence of the second trigger, redistributing a plurality of groups of data units to different physical locations on the memory device using indirect mapping.
1. A system comprising: a memory device; and a processing device, operatively coupled with the memory device, to perform operations comprising: periodically performing a first wear leveling operation using a direct mapping function on a data management unit of the memory device at a first frequency; and periodically performing a second wear leveling operation using indirect mapping on groups of data management units of the memory device at a second frequency, wherein the second wear leveling operation is performed less frequently than the first wear leveling operation, and wherein periodically performing the second wear leveling operation comprises: detecting an occurrence of a trigger corresponding to the second wear leveling operation: identifying an available physical location of a plurality of physical locations on the memory device, wherein the available physical location is identified based on respective write counts of the plurality of physical locations on the memory device; copying data from one of the groups of data management units to the available physical location; and updating an entry in a look-up table, the entry corresponding to a logical index associated with the data from the one of the groups of data management units and indicating a physical index corresponding to the available physical location.
2. The system of claim 1, wherein the memory device comprises a cross-point array of non-volatile memory cells.
2. The system of claim 1, wherein the memory device comprises a cross-point array of non-volatile memory cells.
3. The system of claim 1, wherein redistributing the plurality of data units within the first group of data units to different physical locations on the memory device according to the direct mapping function comprises: applying a first logical index associated with data from one of the plurality of data units to the direct mapping function to determine a physical index corresponding to a physical location on the memory device; and copying the data from the one of the plurality of data units to the physical location.
3. The system of claim 1, wherein periodically performing the first wear leveling operation using the direct mapping function comprises: applying a first logical index associated with data from the data management unit to the direct mapping function to determine a physical index corresponding to a physical location on the memory device; and copying the data from the data management unit to the physical location.
4. The system of claim 3, wherein the direct mapping function comprises at least one of a swap function, a circular shift function, or a linear function utilizing a base pointer value and a free pointer value.
4. The system of claim 3, wherein the direct mapping function comprises a swap function.
5. The system of claim 3, wherein the direct mapping function comprises a circular shift function.
6. The system of claim 3, wherein the direct mapping function comprises a linear function utilizing a base pointer value and a free pointer value.
6. The system of claim 1, wherein the occurrence of the first trigger and the occurrence of the second trigger are based on a period of time that has elapsed since a previous wear leveling operation was performed.
7. The system of claim 1, wherein the first frequency and the second frequency are based on a period of time that has elapsed since a previous wear leveling operation was performed.
7. The system of claim 1, wherein the occurrence of the first trigger and the occurrence of the second trigger are based on a number of data write operations performed on the memory device by a host system since a previous wear leveling operation was performed.
8. The system of claim 1, wherein the first frequency and the second frequency are based on a number of data write operations performed on the memory device by a host machine since a previous wear leveling operation was performed.
8. A method comprising: detecting an occurrence of a first trigger; in response to the occurrence of the first trigger, redistributing a plurality of data units within a first group of data units to different physical locations on a memory device according to a direct mapping function; detecting an occurrence of a second trigger, wherein the second trigger occurs less frequently than the first trigger; and in response to the occurrence of the second trigger, redistributing a plurality of groups of data units to different physical locations on the memory device using indirect mapping.
9. A method comprising: periodically performing a first wear leveling operation using a direct mapping function on a data management unit of a memory device at a first frequency; and periodically performing a second wear leveling operation using indirect mapping on groups of data management units of the memory device at a second frequency, wherein the second wear leveling operation is performed less frequently than the first wear leveling operation, and wherein periodically performing the second wear leveling operation comprises: detecting an occurrence of a trigger corresponding to the second wear leveling operation; identifying an available physical location of a plurality of physical locations on the memory device, wherein the available physical location is identified based on respective write counts of the plurality of physical locations on the memory device; copying data from one of the groups of data management units to the available physical location; and updating an entry in a look-up table, the entry corresponding to a logical index associated with the data from the one of the groups of data management units and indicating a physical index corresponding to the available physical location.
9. The method of claim 8, wherein the memory device comprises a cross-point array of non-volatile memory cells.
10. The method of claim 9, wherein the memory device comprises a cross-point array of non-volatile memory cells.
10. The method of claim 8, wherein redistributing the plurality of data units within the first group of data units to different physical locations on the memory device according to the direct mapping function comprises: applying a first logical index associated with data from one of the plurality of data units to the direct mapping function to determine a physical index corresponding to a physical location on the memory device; and copying the data from the one of the plurality of data units to the physical location.
11. The method of claim 9, wherein periodically performing the first wear leveling operation using the direct mapping function comprises: applying a first logical index associated with data from the data management unit to the direct mapping function to determine a physical index corresponding to a physical location on the memory device; and copying the data from the data management unit to the physical location.
11. The method of claim 10, wherein the direct mapping function comprises at least one of a swap function, a circular shift function, or a linear function utilizing a base pointer value and a free pointer value.
12. The method of claim 11, wherein the direct mapping function comprises a swap function.
13. The method of claim 11, wherein the direct mapping function comprises a circular shift function.
14. The method of claim 11, wherein the direct mapping function comprises a linear function utilizing a base pointer value and a free pointer value.
13. The method of claim 8, wherein the occurrence of the first trigger and the occurrence of the second trigger are based on a period of time that has elapsed since a previous wear leveling operation was performed.
15. The method of claim 9, wherein the first frequency and the second frequency are based on a period of time that has elapsed since a previous wear leveling operation was performed.
14. The method of claim 8, wherein the occurrence of the first trigger and the occurrence of the second trigger are based on a number of data write operations performed on the memory device by a host system since a previous wear leveling operation was performed.
16. The method of claim 9, wherein the first frequency and the second frequency are based on a number of data write operations performed on the memory device by a host machine since a previous wear leveling operation was performed.
15. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising: detecting an occurrence of a first trigger; in response to the occurrence of the first trigger, redistributing a plurality of data units within a first group of data units to different physical locations on a memory device according to a direct mapping function; detecting an occurrence of a second trigger, wherein the second trigger occurs less frequently than the first trigger; and in response to the occurrence of the second trigger, redistributing a plurality of groups of data units to different physical locations on the memory device using indirect mapping.
17. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising: periodically performing a first wear leveling operation using a direct mapping function on a data management unit of a memory device at a first frequency; and periodically performing a second wear leveling operation using indirect mapping on groups of data management units of the memory device at a second frequency, wherein the second wear leveling operation is performed less frequently than the first wear leveling operation, and wherein periodically performing the second wear leveling operation comprises: detecting an occurrence of a trigger corresponding to the second wear leveling operation; identifying an available physical location of a plurality of physical locations on the memory device, wherein the available physical location is identified based on respective write counts of the plurality of physical locations on the memory device; copying data from one of the groups of data management units to the available physical location; and updating an entry in a look-up table, the entry corresponding to a logical index associated with the data from the one of the groups of data management units and indicating a physical index corresponding to the available physical location.
16. The non-transitory computer-readable storage medium of claim 15, wherein the memory device comprises a cross-point array of non-volatile memory cells.
18. The non-transitory computer-readable storage medium of claim 17, wherein the memory device comprises a cross-point array of non-volatile memory cells.
17. The non-transitory computer-readable storage medium of claim 15, wherein redistributing the plurality of data units within the first group of data units to different physical locations on the memory device according to the direct mapping function comprises: applying a first logical index associated with data from one of the plurality of data units to the direct mapping function to determine a physical index corresponding to a physical location on the memory device; and copying the data from the one of the plurality of data units to the physical location.
19. The non-transitory computer-readable storage medium of claim 17, wherein periodically performing the first wear leveling operation using the direct mapping function comprises: applying a first logical index associated with data from the data management unit to the direct mapping function to determine a physical index corresponding to a physical location on the memory device; and copying the data from the data management unit to the physical location.
18. The non-transitory computer-readable storage medium of claim 17, wherein the direct mapping function comprises at least one of a swap function, a circular shift function, or a linear function utilizing a base pointer value and a free pointer value.
12. The method of claim 11, wherein the direct mapping function comprises a swap function.
13. The method of claim 11, wherein the direct mapping function comprises a circular shift function.
14. The method of claim 11, wherein the direct mapping function comprises a linear function utilizing a base pointer value and a free pointer value.
20. The non-transitory computer-readable storage medium of claim 15, wherein the occurrence of the first trigger and the occurrence of the second trigger are based on at least one of a period of time that has elapsed or a number of data write operations performed on the memory device by a host system since a previous wear leveling operation was performed.
20. The non-transitory computer-readable storage medium of claim 17, wherein the first frequency and the second frequency are based on at least one of a period of time that has elapsed since a previous wear leveling operation was performed or a number of data write operations performed on the memory device by a host machine since the previous wear leveling operation was performed.
Claims 5, 12, and 19 are rejected on the ground of non-statutory double patenting as being unpatentable over claims 1-20 of U.S. Patent 12,436,702, and in view of Helmick et al (U.S. 2019/0107957).
Regarding claims 5, 12, and 19, the Patent 12,436,702 does not disclose the elements of claims 5, 12, and 19. However, these elements are disclosed by Helmick,
wherein redistributing the plurality of groups of data units to different physical locations on the memory device using indirect mapping comprises: copying data from one of the plurality of groups of data units to an available physical location on the memory device;¶0026, inter-region wear leveling, logical address mapping may be exchanged between a region that has experienced relatively high wear and region that has experienced relatively low wear, Figs. 10A, 11A logical pages in region 4 are moved to empty region 5 (¶0090-¶0091).
and recording a mapping of a second logical index associated with the data from the one of the plurality of groups of data units to the available physical location in a look-up table. Helmick, updating mapping a table to record allocation of logical addresses to a regions (¶0094).
One of ordinary skill in the art, before the effective filing date of the claimed invention, would have been motivated to incorporate the teaching of Helmick with the Patent 12,436,702 to redistributing data from high wear regions to lower wear regions, and updating mapping to track the data. The motivation for doing so is to apply a known technique of Helmick to the Patent 12,436,702, to yield predictable results.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 3-5, 8, 10-12, 15, 17-19 are rejected under 35 U.S.C. 103 as being unpatentable over Helmick et al (U.S. 2019/0107957).
Regarding claim 1:
A system comprising:
a memory device; and a processing device, operatively coupled with the memory device, to perform operations comprising: Helmick, Fig. 3, non-volatile memory system comprises controller 122, and memory 108.
detecting an occurrence of a first trigger; in response to the occurrence of the first trigger, redistributing a plurality of data units within a first group of data units to different physical locations on the memory device according to a direct mapping function; Helmick, a regional wear leveling, “deterministic wear leveling scheme” (¶0025), which remaps host data to physical locations in memory according to a predetermined algorithm by offsetting logical to physical address mapping according to an offset (direct mapping), and also ¶0087-0088. Wear leveling is used to distribute wear across memory cells so that wear is not concentrated on particular cells, which could lead to early failure of such memory cells (¶0002). The deterministic wear leveling scheme is performed in response to a triggering event, such as an amount of elapsed time, an amount of wear indicated by a number of read/write/erase operations performed on the memory, or some other event (first trigger), ¶0078.
detecting an occurrence of a second trigger, wherein the second trigger occurs less frequently than the first trigger; and in response to the occurrence of the second trigger, redistributing a plurality of groups of data units to different physical locations on the memory device using indirect mapping. Helmick further teaches inter-region wear leveling is performed in addition to the regional wear leveling (¶0089-0090). ¶0095, inter-region wear leveling is trigger based on a number of factors including amount of elapsed time, or an amount of wear, number of writes across regions, and other factors. Helmick further discloses that regional wear leveling may be performed between steps in the inter-region wear leveling, which are generally less frequent (¶0094). Inter-region wear leveling includes updating mapping in a table maintained to record allocation of logical addresses to inter-regions, indirect mapping. Fig. 2C, and ¶0031, example of indirect mapping as recording a mapping of a logical index associated with the data to the available physical index in a look-up table 240.
It is noted that Helmick does not explicitly teaches detecting a first trigger, and a second trigger and performing the redistributions of data via direct and indirect mapping respectively. However, Helmick suggests the deterministic wear leveling scheme is performed in response to a triggering event, such as an amount of elapsed time, an amount of wear indicated by a number of read/write/erase operations performed on the memory, or some other event (first trigger), ¶0078; and regional wear leveling may be performed between steps in the inter-region wear leveling, which are generally less frequent (¶0094). One skill in the art would be able to derive from the teaching of Helmick that a regional wear leveling is triggered, when an amount of time has passed, “the occurrence of a first trigger”, and the inter-region wear leveling is triggered at an occurrence of a second trigger, which is less frequent than the first trigger. A person of ordinary skill in the art is also a person of ordinary creativity, not an automaton, and would be able to fit the teaching together like pieces of a puzzle. Thus, one of ordinary skill in the art, before the effective filing date of the claimed invention, would have been motivated to apply the teaching of Helmick to obtain the claimed limitations above.
Regarding claim 8: Claim 8 recites similar limitations corresponding to the claimed limitations in claim 1, and is rejected under same rationale.
Regarding claim 15:
A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising: Helmick, ¶0035, ROM 122a, RAM 122b comprises code such as a set of instructions, and processor 122c is operable to execute the set of instructions.
detecting an occurrence of a first trigger; in response to the occurrence of the first trigger, redistributing a plurality of data units within a first group of data units to different physical locations on a memory device according to a direct mapping function; Helmick, a regional wear leveling, “deterministic wear leveling scheme” (¶0025), which remaps host data to physical locations in memory according to a predetermined algorithm by offsetting logical to physical address mapping according to an offset (direct mapping), and also ¶0087-0088. Wear leveling is used to distribute wear across memory cells so that wear is not concentrated on particular cells, which could lead to early failure of such memory cells (¶0002). The deterministic wear leveling scheme is performed in response to a triggering event, such as an amount of elapsed time, an amount of wear indicated by a number of read/write/erase operations performed on the memory, or some other event (first trigger), ¶0078.
detecting an occurrence of a second trigger, wherein the second trigger occurs less frequently than the first trigger; and in response to the occurrence of the second trigger, redistributing a plurality of groups of data units to different physical locations on the memory device using indirect mapping. Helmick further teaches inter-region wear leveling is performed in addition to the regional wear leveling (¶0089-0090). ¶0095, inter-region wear leveling is trigger based on a number of factors including amount of elapsed time, or an amount of wear, number of writes across regions, and other factors. Helmick further discloses that regional wear leveling may be performed between steps in the inter-region wear leveling, which are generally less frequent (¶0094). Inter-region wear leveling includes updating mapping in a table maintained to record allocation of logical addresses to inter-regions, indirect mapping. Fig. 2C, and ¶0031, example of indirect mapping as recording a mapping of a logical index associated with the data to the available physical index in a look-up table 240.
It is noted that Helmick does not explicitly teaches detecting a first trigger, and a second trigger and performing the redistributions of data via direct and indirect mapping respectively. However, Helmick suggests the deterministic wear leveling scheme is performed in response to a triggering event, such as an amount of elapsed time, an amount of wear indicated by a number of read/write/erase operations performed on the memory, or some other event (first trigger), ¶0078; and regional wear leveling may be performed between steps in the inter-region wear leveling, which are generally less frequent (¶0094). One skill in the art would be able to derive from the teaching of Helmick that a regional wear leveling is triggered, when an amount of time has passed, “the occurrence of a first trigger”, and the inter-region wear leveling is triggered at an occurrence of a second trigger, which is less frequent than the first trigger. A person of ordinary skill in the art is also a person of ordinary creativity, not an automaton, and would be able to fit the teaching together like pieces of a puzzle. Thus, one of ordinary skill in the art, before the effective filing date of the claimed invention, would have been motivated to apply the teaching of Helmick to obtain the claimed limitations above.
Regarding claim 3:
The system of claim 1, wherein redistributing the plurality of data units within the first group of data units to different physical locations on the memory device according to the direct mapping function comprises: applying a first logical index associated with data from one of the plurality of data units to the direct mapping function to determine a physical index corresponding to a physical location on the memory device; and copying the data from the one of the plurality of data units to the physical location. Helmick, regional wear leveling scheme may remap host data to physical locations in memory according to a predetermined algorithm by offsetting logical to physical address mapping according to an offset, ¶0025; incrementing each logical page by one physical page, where the mapping of logical pages to physical pages is offset by one (¶0082, ¶0085). Figs. 7A-7B, logical page D is copied from physical page 3 to physical page 4.
Regarding claim 10: Claim 10 recites similar limitations corresponding to the claimed limitations in claim 3, and is rejected under same rationale.
Regarding claim 4:
The system of claim 3, wherein the direct mapping function comprises at least one of a swap function, a circular shift function, or a linear function utilizing a base pointer value and a free pointer value. Helmick, Figs. 7A-7I, regional wear leveling scheme/ deterministic wear leveling scheme shows remapping by swapping logical page D and the gap; or ¶0082 and ¶0105, mathematical wear leveling scheme includes rotating a mapping of logical addresses to physical addresses in a predetermined cyclical pattern.
Regarding claim 11: Claim 11 recites similar limitations corresponding to the claimed limitations in claim 4, and is rejected under same rationale.
Regarding claim 5:
The system of claim 1, wherein redistributing the plurality of groups of data units to different physical locations on the memory device using indirect mapping comprises: copying data from one of the plurality of groups of data units to an available physical location on the memory device; ¶0026, inter-region wear leveling, logical address mapping may be exchanged between a region that has experienced relatively high wear and region that has experienced relatively low wear, Figs. 10A, 11A logical pages in region 4 are moved to empty region 5 (¶0090-¶0091).
and recording a mapping of a second logical index associated with the data from the one of the plurality of groups of data units to the available physical location in a look-up table. Helmick, updating mapping a table to record allocation of logical addresses to a regions (¶0094). Figs. 10A + 11B, relocation of logical pages from region 4 to region 5 are indicated by the table.
Regarding claim 12: Claim 12 recites similar limitations corresponding to the claimed limitations in claim 5, and is rejected under same rationale.
Regarding claim 17:
The non-transitory computer-readable storage medium of claim 15, wherein redistributing the plurality of data units within the first group of data units to different physical locations on the memory device according to the direct mapping function comprises: applying a first logical index associated with data from one of the plurality of data units to the direct mapping function to determine a physical index corresponding to a physical location on the memory device; and copying the data from the one of the plurality of data units to the physical location. Helmick, regional wear leveling scheme may remap host data to physical locations in memory according to a predetermined algorithm by offsetting logical to physical address mapping according to an offset, ¶0025; incrementing each logical page by one physical page, where the mapping of logical pages to physical pages is offset by one (¶0082, ¶0085). Figs. 7A-7B, logical page D is copied from physical page 3 to physical page 4.
Regarding claim 18:
The non-transitory computer-readable storage medium of claim 17, wherein the direct mapping function comprises at least one of a swap function, a circular shift function, or a linear function utilizing a base pointer value and a free pointer value.
Helmick, Figs. 7A-7I, regional wear leveling scheme/ deterministic wear leveling scheme shows remapping by swapping logical page D and the gap; or ¶0082 and ¶0105, mathematical wear leveling scheme includes rotating a mapping of logical addresses to physical addresses in a predetermined cyclical pattern.
Regarding claim 19:
The non-transitory computer-readable storage medium of claim 15, wherein redistributing the plurality of groups of data units to different physical locations on the memory device using indirect mapping comprises: copying data from one of the plurality of groups of data units to an available physical location on the memory device; and recording a mapping of a second logical index associated with the data from the one of the plurality of groups of data units to the available physical location in a look-up table. ¶0026, inter-region wear leveling, logical address mapping may be exchanged between a region that has experienced relatively high wear and region that has experienced relatively low wear, Figs. 10A, 11A logical pages in region 4 are moved to empty region 5 (¶0090-¶0091). Helmick, updating mapping a table to record allocation of logical addresses to a regions (¶0094). Figs. 10A + 11B, relocation of logical pages from region 4 to region 5 are indicated by the table.
Claims 6-7, 13-14, and 20 are rejected under 35 U.S.C §103 as being unpatentable over Helmick et al (U.S. 2019/0107957), and in view of Ahn et al (U.S. 2018/0107386), hereinafter Helmick.
Regarding claim 6:
The system of claim 1, wherein the occurrence of the first trigger and the occurrence of the second trigger are based on a period of time that has elapsed; Helmick teaches perform region wear leveling, and inter-region wear leveling, in response to a triggering event, such as an amount of elapsed time or some other events (¶0078, ¶0095).
However, Helmick does not teach “the occurrences are based on a period of time that has elapsed since a previous wear leveling operation was performed”. Ahn, in an analogous art of storage management (abstract), teaches the idea of when to perform wear leveling based on a timeline/timer. teaches performing wear leveling operation for a memory region when the time elapsed as measured by the timer 111 reaches a critical time, and the elapsed is reset each time after the completion of a wear leveling operation, (Fig. 6, ¶0030).
One of ordinary skill in the art, before the effective filing date of the claimed invention, would have been motivated to incorporate the teaching of Ahn into the teaching of Helmick to obtain the claimed limitation above, such as performing region and inter-region wear leveling based on the time elapsed according to a timer. The motivation for doing so is to substitution of one known element for another to obtain predictable results, such as using timer to perform wear leveling.
Regarding claim 13: Claim 13 recites similar limitations corresponding to the claimed limitations in claim 6, and is rejected under same rationale.
Regarding claim 7:
The system of claim 1, wherein the occurrence of the first trigger and the occurrence of the second trigger are based on a number of data write operations performed on the memory device by a host system
Helmick teaches perform region wear leveling, and inter-region wear leveling, in response to a triggering event, such as an amount of elapsed time or some other events (¶0078, ¶0095).
However, Helmick does not teach “the occurrences are based on based on a number of data write operations performed on the memory device by a host system since a previous wear leveling operation was performed.
Ahn, in an analogous art of storage management (abstract), teaches the idea of when to perform wear leveling based on a timeline/timer. teaches performing wear leveling operation for a memory region when the time elapsed as measured by the timer 111 reaches a critical time, and the elapsed is reset each time after the completion of a wear leveling operation, (Fig. 6, ¶0030).
One of ordinary skill in the art, before the effective filing date of the claimed invention, would have been motivated to incorporate the teaching of Ahn into the teaching of Helmick to obtain the claimed limitation above, such as performing region and inter-region wear leveling based on the time elapsed according to a timer. The motivation for doing so is to substitution of one known element for another to obtain predictable results, such as using timer to perform wear leveling.
Regarding claim 14: Claim 14 recites similar limitations corresponding to the claimed limitations in claim 7, and is rejected under same rationale.
Regarding claim 20:
The non-transitory computer-readable storage medium of claim 15, wherein the occurrence of the first trigger and the occurrence of the second trigger are based on at least one of a period of time that has elapsed or a number of data write operations performed on the memory device by a host system since a previous wear leveling operation was performed.
Helmick teaches perform region wear leveling, and inter-region wear leveling, in response to a triggering event, such as an amount of elapsed time or some other events (¶0078, ¶0095).
However, Helmick does not teach “the occurrences are based on based on a number of data write operations performed on the memory device by a host system since a previous wear leveling operation was performed.
Ahn, in an analogous art of storage management (abstract), teaches the idea of when to perform wear leveling based on a timeline/timer. teaches performing wear leveling operation for a memory region when the time elapsed as measured by the timer 111 reaches a critical time, and the elapsed is reset each time after the completion of a wear leveling operation, (Fig. 6, ¶0030).
One of ordinary skill in the art, before the effective filing date of the claimed invention, would have been motivated to incorporate the teaching of Ahn into the teaching of Helmick to obtain the claimed limitation above, such as performing region and inter-region wear leveling based on the time elapsed according to a timer. The motivation for doing so is to substitution of one known element for another to obtain predictable results, such as using timer to perform wear leveling.
Claims 2, 9, and 16 are rejected under 35 U.S.C. §103 as being unpatentable over Helmick et al (U.S. 2019/0107957), and in view of Tang et al (U.S. 2018/0060227), hereinafter Helmick.
Regarding claim 2:
The system of claim 1, wherein the memory device comprises a cross-point array of non-volatile memory cells. Helmick does not teach the claimed limitation above. however, Tang teaches in Fig. 1, cross-point memory 133.
One of ordinary skill in the art, before the effective filing date of the claimed invention, would have been motivated to incorporate the teaching of Tang into the teaching of Helmick to substitute cross-point memory in Helmick’s non-volatile memory system. The motivation for doing so is to substitution of one known element for another to obtain predictable results, which provides faster access and update data (Tang, ¶0007).
Regarding claim 9:
The method of claim 8, wherein the memory device comprises a cross-point array of non-volatile memory cells.
Helmick does not teach the claimed limitation above. however, Tang teaches in Fig. 1, cross-point memory 133.
One of ordinary skill in the art, before the effective filing date of the claimed invention, would have been motivated to incorporate the teaching of Tang into the teaching of Helmick to substitute cross-point memory in Helmick’s non-volatile memory system. The motivation for doing so is to substitution of one known element for another to obtain predictable results, which provides faster access and update data (Tang, ¶0007).
Regarding claim 16:
The non-transitory computer-readable storage medium of claim 15, wherein the memory device comprises a cross-point array of non-volatile memory cells.
Helmick does not teach the claimed limitation above. however, Tang teaches in Fig. 1, cross-point memory 133.
One of ordinary skill in the art, before the effective filing date of the claimed invention, would have been motivated to incorporate the teaching of Tang into the teaching of Helmick to substitute cross-point memory in Helmick’s non-volatile memory system. The motivation for doing so is to substitution of one known element for another to obtain predictable results, which provides faster access and update data (Tang, ¶0007).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Kang et al (U.S. Patent 8,898,373) teaches a staggered threshold-based wear leveling approach is used to spread out the execution of wear leveling operations that otherwise would have been triggered in clusters. Under the staggered threshold-based approach, wear leveling is periodically triggered by different wear leveling thresholds that are associated with various units of solid-state memory such as a group of blocks, so that only a certain amount of units are wear leveled at any given time.
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/KHOA D DOAN/Primary Examiner, Art Unit 2133