DETAILED ACTION
Claims 1-20 are pending.
Priority: 6/20/2024(FP)
Assignee: Samsung
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 2, 3, 10, 11, 12, 16, 17 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Sudarmani et al.(20200341825).
As per claim 1 discloses, Sudarmani discloses:
An operation method of a universal flash storage (UFS) device that is configured to communicate with a UFS host through a device physical layer(Sudarami, [0030 -- The device interface 220 can include a physical layer (referred as M-PHY) 222 and a link layer. The link layer and the physical layer 222 of the device interface 220 forms the UFS Interconnect Layer (UIC). The Physical layer 222 further comprises a transmission unit (Tx) 222a for sending the data to the UFS host 202 and a reception unit (Rx) 222b for receiving the data from the UFS host 202]), the method comprising:
monitoring an internal operation status(Sudarmani, [0070 -- At operation 402, the method includes determining, by the at least one of the UFS host 202 and the UFS device 204, the path of the payload data flow; The at least one of the UFS host 202 and the UFS device 204 may process the command to determine the path of the payload data flow. The path of the payload data flow may be determined along the at least one of the transmission lane of the UFS host 202 and the transmission lane of the UFS device]);
changing a power mode of the device physical layer to a low-speed mode based on the internal operation status(Sudarmani, [0071 -- At operation 404, the method includes initiating, by the at least one of the UFS host 202 and the UFS device 204, at least one Hibernate state entry action based on the determined path of payload data flow; ]);
transmitting a first power mode change request to the UFS host(Sudarmani, [0044 -- the device controller 218 sends a power mode change (PMC) request (‘PMC.REQ’) to the UFS host ]);
receiving a first power mode change confirmation from the UFS host(Sudarmani, [0044 -- On receiving the PMC request from the UFS device 204, the UFS host controller 210 sends power mode change confirmation (‘PMC.CNF’) to the UFS device]);
and operating based on the low-speed mode with the UFS host through the device physical layer, in response to receiving the first power mode change confirmation(Sudarmani, [0044 -- On receiving the power mode change confirmation from the UFS host 202, the device controller 218 switches the state of the Tx 222a of the physical layer 222 of the UFS device 204 to the Hibernate state], [0036 -- he Hibernate state may be an ultra-low power state]).
As per claim 2, the rejection of claim 1 is incorporated, in addition, Sudarmani discloses:
wherein the device physical layer is a UFS interconnect layer (UIC) including a mobile industry processor interface (MIPI) Unipro and an MIPI M-PHY(Sudarmani, [0029 -- In an example herein, the link layer may be implemented as Mobile Industry Processor Interface (MIPI) Unipro and the physical layer 214 may be implemented as MIPI M-PHY]).
As per claim 3, the rejection of claim 1 is incorporated, in addition, Sudarmani discloses:
wherein the UFS host changes a power mode of a host physical layer physically connected to the device physical layer to the low-speed mode, in response to the first power mode change request(Sudarmani, [0044 -- the device controller 218 sends a power mode change (PMC) request (‘PMC.REQ’) to the UFS host; On receiving the power mode change confirmation from the UFS host 202, the device controller 218 switches the state of the Tx 222a of the physical layer 222 of the UFS device 204 to the Hibernate state]).
As per claim 10, the rejection of claim 1 is incorporated, in addition, Sudarmani discloses:
receiving a command UFS protocol information unit (UPIU) from the UFS host through the device physical layer and performing an operation corresponding to the command UPIU(Sudarmani, [0042 -- As illustrated in FIG. 3a, during a write transaction, the application 206 of the UFS host 202 schedules a write command (‘Write CMD UPIU’ (UFS Protocol Information Unit)) for writing the payload data to the memory 216 of the UFS device 204.]).
As per claim 11 discloses, Sudarmani discloses:
A universal flash storage (UFS) device(Sudarmani, [0027 -- The UFS system 200 includes a UFS host 202 and a UFS device 204. ]) comprising:
a memory device(Sudarmani, [0030 -- The UFS device 204 includes a memory ]);
a UFS device UFS interconnect layer (UIC) configured to communicate with a UFS host through a reception channel and a transmission channel(Sudarmani, [0028 -- The physical layer 214 includes a transmission unit (Tx) 214a for sending data from the UFS host 202 to the UFS device 204 and a reception unit (Rx) 214b for receiving the data by the UFS host 202 from the UFS device 204.]);
and a UFS device controller configured to control the memory device, based on a command received from the UFS host through the UFS device UIC, wherein the UFS device controller(Sudarmani, [0063 -- On receiving the read command, the device controller 218 of the UFS device 204 decodes the read command and determines that the path of the payload data flow is along the transmission lane of the UFS device 204. After decoding the read command, the device controller 218 fetches the payload data from the memory 216. Further, before transmitting the payload data to the UFS host 202, the device controller 218 receives the power mode change request (‘PMC.REQ’) from the UFS host 202.], []) is further configured to:
monitor an internal operation status of the UFS device(Sudarmani, [0070 -- At operation 402, the method includes determining, by the at least one of the UFS host 202 and the UFS device 204, the path of the payload data flow; The at least one of the UFS host 202 and the UFS device 204 may process the command to determine the path of the payload data flow. The path of the payload data flow may be determined along the at least one of the transmission lane of the UFS host 202 and the transmission lane of the UFS device]);
and change a power mode of the reception channel or the transmission channel from a high-speed mode to a low-speed mode, based on the internal operation status(Sudarmani, [0071 -- At operation 404, the method includes initiating, by the at least one of the UFS host 202 and the UFS device 204, at least one Hibernate state entry action based on the determined path of payload data flow; ]).
As per claim 12, the rejection of claim 11 is incorporated, in addition, Sudarmani discloses:
wherein the UFS device UIC includes a mobile industry processor interface(MIPI) Unipro and an MIPI M-PHY(Sudarmani, [0029 -- In an example herein, the link layer may be implemented as Mobile Industry Processor Interface (MIPI) Unipro and the physical layer 214 may be implemented as MIPI M-PHY]).
As per claim 16 discloses, Sudarmani discloses:
An operation method of a universal flash storage (UFS) system that includes a UFS host and a UFS device(Sudarmani, [0027 -- The UFS system 200 includes a UFS host 202 and a UFS device 204. ]), the method comprising:
setting a power mode of a reception channel and a transmission channel between the UFS host and the UFS device to a high-speed mode, through an initialization operation(Nam, [0083 -- Referring to FIGS. 1, 2, and 9, in operation S910, the host 20 may be initialized to an HS mode state and stand by. In operation S920, the host 20 may determine whether an HS link up message is received from the storage 30 through a connected reception lane.]);
and changing, by the UFS device, the power mode of the reception channel or the transmission channel to a low-speed mode based on an internal operation status of the UFS device(Sudarmani, [0071 -- At operation 404, the method includes initiating, by the at least one of the UFS host 202 and the UFS device 204, at least one Hibernate state entry action based on the determined path of payload data flow; ]), wherein the power mode indicates a link speed of the reception channel or the transmission channel(Sudarmani, [0036 -- the Hibernate state may be an ultra-low power state which enables at least one of the Tx 222a & Rx 214b pair and the Tx 214a & Rx 222b pair to reduce its activity to the lowest possible state]).
As per claim 17, the rejection of claim 16 is incorporated, in addition, Sudarmani discloses:
wherein the changing of the power mode of the reception channel or the transmission channel to the low-speed mode, by the UFS device, based on the internal operation status of the UFS device(Sudarmani, [0071 -- At operation 404, the method includes initiating, by the at least one of the UFS host 202 and the UFS device 204, at least one Hibernate state entry action based on the determined path of payload data flow; ]) includes:
setting, by the UFS device, parameters of a transmitter or a receiver of a UFS device UFS interconnect layer (UIC) of the UFS device to a value corresponding to the low-speed mode(Sudarmani, [0071 -- At operation 404, the method includes initiating, by the at least one of the UFS host 202 and the UFS device 204, at least one Hibernate state entry action based on the determined path of payload data flow. The Hibernate state entry action includes at least one of switching, by the UFS host]);
transmitting, by the UFS device, a first power mode change request to the UFS host(Sudarmani, [0044 -- the device controller 218 sends a power mode change (PMC) request (‘PMC.REQ’) to the UFS host ]);
setting, by the UFS host, parameters of a receiver or a transmitter of an UFS host UIC of the UFS host to a value corresponding to the low-speed mode, in response to the first power mode change request(Sudarmani, [0071 -- At operation 404, the method includes initiating, by the at least one of the UFS host 202 and the UFS device 204, at least one Hibernate state entry action based on the determined path of payload data flow. The Hibernate state entry action includes at least one of switching, by the UFS host]);
and transmitting, by the UFS host, a first power mode change confirmation to the UFS device(Sudarmani, [0044 -- On receiving the PMC request from the UFS device 204, the UFS host controller 210 sends power mode change confirmation (‘PMC.CNF’) to the UFS device]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sudarmani et al.(20200341825), and further in view of Nam et al.(20210397368).
As per claim 4, the rejection of claim 1 is incorporated, in addition, Sudarmani does not explicitly disclose the following, however Nam discloses:
wherein the device physical layer of the UFS device and a host physical layer of the UFS host are set to a high-speed mode through a linkup of an initialization operation(Nam, [0083 -- Referring to FIGS. 1, 2, and 9, in operation S910, the host 20 may be initialized to an HS mode state and stand by. In operation S920, the host 20 may determine whether an HS link up message is received from the storage 30 through a connected reception lane.]).
Therefore it would have been obvious to a POSITA at the time of filing to incorporate Nam into Sudarmani for the benefit of a link startup operation that is performed in a high speed mode through the connected transmission lane of the storage device and the connected reception lane of host, based on the high speed link up message transmitted by storage device, so that the link startup between the host and storage device can be performed quickly(Nam, 0003).
Claim(s) 5, 6, 13, 14, 18, 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sudarmani et al.(20200341825), and further in view of Tseng et al.(20250103222).
As per claim 5, the rejection of claim 1 is incorporated, in addition, Sudarmani does not explicitly disclose the following, however Tseng discloses:
wherein changing of the power mode of the device physical layer to the low-speed mode based on the internal operation status(Tseng, [0089 -- FIG. 8 is a schematic diagram of controlling the memory storage device to enter the power saving mode in the first operation mode according to an exemplary embodiment of the invention. Referring to FIG. 8, in the first operation mode, it is assumed that the memory storage device 10 is in or enters the idle state starting from a time point T(4)]) includes:
detecting that the internal operation status indicates an idle state of a reception channel(Tseng, [0089 -- Referring to FIG. 8, in the first operation mode, it is assumed that the memory storage device 10 is in or enters the idle state starting from a time point T(4).]);
and in response to detecting that the internal operation status indicates the idle state of the reception channel, setting parameters of a transmitter of the device physical layer to a value corresponding to the low-speed mode(Tseng, [0096 -- In step S1102, a reference value is updated based on the state of the memory storage device. In step S1103, it is determined whether the reference value meets a first trigger condition. If the reference value meets the first trigger condition, in step S1104, the operation mode of the memory storage device is set to the first operation mode]).
Therefore it would have been obvious to a POSITA at the time of filing to incorporate Tseng into Sudarmani for the benefit of a the power consumption of the memory devices is reduced without affecting the performance of the device as much as possible. The first and second waiting times may be set to an optimal value by dynamically adjusting the first waiting time and the second waiting time to achieve a balance between the performance and power consumption after the device leaves the manufacturing factory, and thus, the user experience is improved. (Tseng, 0004).
As per claim 6, the rejection of claim 1 is incorporated, in addition, Sudarmani does not explicitly disclose the following, however Tseng discloses:
wherein changing of the power mode of the device physical layer to the low-speed mode based on the internal operation status(Tseng, [0089 -- FIG. 8 is a schematic diagram of controlling the memory storage device to enter the power saving mode in the first operation mode according to an exemplary embodiment of the invention. Referring to FIG. 8, in the first operation mode, it is assumed that the memory storage device 10 is in or enters the idle state starting from a time point T(4)]) includes:
detecting that the internal operation status indicates an idle state of a transmission channel(Tseng, [0089 -- Referring to FIG. 8, in the first operation mode, it is assumed that the memory storage device 10 is in or enters the idle state starting from a time point T(4).]);
and in response to detecting the internal operation status indicates the idle state of the transmission channel or that a write buffer is full, setting parameters of a receiver of the device physical layer to a value corresponding to the low-speed mode(Tseng, [0096 -- In step S1102, a reference value is updated based on the state of the memory storage device. In step S1103, it is determined whether the reference value meets a first trigger condition. If the reference value meets the first trigger condition, in step S1104, the operation mode of the memory storage device is set to the first operation mode]).
Therefore it would have been obvious to a POSITA at the time of filing to incorporate Tseng into Sudarmani for the benefit of a the power consumption of the memory devices is reduced without affecting the performance of the device as much as possible. The first and second waiting times may be set to an optimal value by dynamically adjusting the first waiting time and the second waiting time to achieve a balance between the performance and power consumption after the device leaves the manufacturing factory, and thus, the user experience is improved. (Tseng, 0004).
As per claim 13, the rejection of claim 11 is incorporated, in addition, Sudarmani does not explicitly disclose the following, however Tseng discloses:
wherein the UFS device controller includes:
a device manager configured to transmit a first service access point to the UFS device UIC, based on the internal operation status, wherein the UFS device UIC is further configured to set parameters of a transmitter connected to the reception channel or parameters of a receiver connected to the transmission channel to a value corresponding to the low-speed mode, in response to receiving the first service access point(Tseng, [0096 -- In step S1102, a reference value is updated based on the state of the memory storage device. In step S1103, it is determined whether the reference value meets a first trigger condition. If the reference value meets the first trigger condition, in step S1104, the operation mode of the memory storage device is set to the first operation mode]).
Therefore it would have been obvious to a POSITA at the time of filing to incorporate Tseng into Sudarmani for the benefit of a the power consumption of the memory devices is reduced without affecting the performance of the device as much as possible. The first and second waiting times may be set to an optimal value by dynamically adjusting the first waiting time and the second waiting time to achieve a balance between the performance and power consumption after the device leaves the manufacturing factory, and thus, the user experience is improved. (Tseng, 0004).
As per claim 14, the rejection of claim 13 is incorporated, in addition, Sudarmani discloses:
wherein the UFS device UIC is further configured to transmit a first power mode change request to the UFS host, in response to receiving the first service access point(Sudarmani, [0044 -- On receiving the power mode change confirmation from the UFS host 202, the device controller 218 switches the state of the Tx 222a of the physical layer 222 of the UFS device 204 to the Hibernate state], [0036 -- he Hibernate state may be an ultra-low power state]).
As per claim 18, the rejection of claim 16 is incorporated, in addition, Sudarmani does not explicitly disclose the following, however Tseng discloses:
detecting that the internal operation status corresponds to an idle state of the reception channel and in response to detecting that the internal operation status indicates the idle state of the reception channel, changing, by the UFS device, the power mode of the reception channel to the low-speed mode(Tseng, [0089 -- Referring to FIG. 8, in the first operation mode, it is assumed that the memory storage device 10 is in or enters the idle state starting from a time point T(4).], [0096 -- In step S1102, a reference value is updated based on the state of the memory storage device. In step S1103, it is determined whether the reference value meets a first trigger condition. If the reference value meets the first trigger condition, in step S1104, the operation mode of the memory storage device is set to the first operation mode]).
Therefore it would have been obvious to a POSITA at the time of filing to incorporate Tseng into Sudarmani for the benefit of a the power consumption of the memory devices is reduced without affecting the performance of the device as much as possible. The first and second waiting times may be set to an optimal value by dynamically adjusting the first waiting time and the second waiting time to achieve a balance between the performance and power consumption after the device leaves the manufacturing factory, and thus, the user experience is improved. (Tseng, 0004).
As per claim 19, the rejection of claim 16 is incorporated, in addition, Sudarmani does not explicitly disclose the following, however Tseng discloses:
detecting that the internal operation status corresponds to an idle state of the transmission channel and in response to detecting that the internal operation status indicates the idle state of the transmission channel, changing, by the UFS device, the power mode of the transmission channel to the low-speed mode(Tseng, [0089 -- Referring to FIG. 8, in the first operation mode, it is assumed that the memory storage device 10 is in or enters the idle state starting from a time point T(4).], [0096 -- In step S1102, a reference value is updated based on the state of the memory storage device. In step S1103, it is determined whether the reference value meets a first trigger condition. If the reference value meets the first trigger condition, in step S1104, the operation mode of the memory storage device is set to the first operation mode]).
Therefore it would have been obvious to a POSITA at the time of filing to incorporate Tseng into Sudarmani for the benefit of a the power consumption of the memory devices is reduced without affecting the performance of the device as much as possible. The first and second waiting times may be set to an optimal value by dynamically adjusting the first waiting time and the second waiting time to achieve a balance between the performance and power consumption after the device leaves the manufacturing factory, and thus, the user experience is improved. (Tseng, 0004).
Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sudarmani et al.(20200341825), and further in view of Park et al.(20150012671).
As per claim 7, the rejection of claim 1 is incorporated, in addition, Sudarmani does not explicitly disclose the following, however Park discloses:
wherein changing of the power mode of the device physical layer to the low-speed mode based on the internal operation status(Park, [0075 -- The UFS system 2000 according to at least some example embodiments of inventive concepts may reduce power consumption by setting one or more of the host and the device interfaces to the low power mode ]) includes:
detecting that the internal operation status indicates that garbage collection is performed(Park, [0102 -- According to at least some example embodiments, garbage collection may be executed in connection with a program operation in response to a corresponding program command. For example, if a host provides a program command to a storage device, the storage device may perform a garbage collection operation in parallel (e.g., concurrently and/or simultaneously) with the program operation.]);
and in response to detecting that the internal operation status indicates that the garbage collection is performed, setting parameters of each of a receiver and a transmitter of the device physical layer to a value corresponding to the low-speed mode(Park, [0106 -- the UFS device 2200 calculates a duration of a first interface idle time interval based on the erase time tERASE, a duration of a second interface idle time interval based on the first program time tPROG1 and the copyback time tCPBK, and a duration of a third interface idle time interval based on the second program time tPROG2.]).
Therefore it would have been obvious to a POSITA at the time of filing to incorporate Park into Sudarmani for the benefit to reduce power consumption, the UFS device calculates duration of the first interface idle time interval based on an estimated operation time to perform the first program operation at the flash memory, and provides first interface idle time information including the duration of the first interface idle time interval to the UFS host. A success rate of mode switching of the one or more interfaces are improved by calculating the duration of the interface idle time interval based on an estimated operation time for performing one or more operations at the flash memory. (Park, 0075).
Claim(s) 8, 9, 15, 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sudarmani et al.(20200341825), and further in view of Wang et al.(20220283622).
As per claim 8, the rejection of claim 1 is incorporated, in addition, Sudarmani does not explicitly disclose the following, however Wang discloses:
changing the power mode of the device physical layer from the low-speed mode to a high-speed mode based on the internal operation status(Wang, [0063 -- Please refer to FIG. 2B, which is a flowchart showing a method for information configuration in power mode change for an interconnection protocol according to another embodiment of the present disclosure.]);
transmitting a second power mode change request to the UFS host(Wang, [0074 -- The power mode change is, for example, the change from one of the power modes described above to another power mode, for example, the change from a slow mode to a fast mode.]);
and receiving a second power mode change confirmation from the UFS host(Wang, [0078 -- As shown in B100 of FIG. 4A, the local PA layer 131 performs capability checking when there is a request for a power mode change according to the UniPro specification, and uses the command PA_LM_SET.cnf_L(SUCCESS) to reply to the local DME135, as indicated by the arrow A102.]).
Therefore it would have been obvious to a POSITA at the time of filing to incorporate Wang into Sudarmani for the benefit generating a configuration indication signal to trigger a piece of firmware of the first device for performing information configuration for a physical layer of the interconnection protocol when a hardware protocol engine of the first device for implementing a protocol layer of the interconnection protocol performs power mode change according to the protocol layer by the hardware protocol engine. The configuration indication signal is non-standard with respect to the interconnection protocol and the piece of firmware is outside of the hardware protocol engine. The information configuration is performed for the physical layer by the piece of firmware in response to the configuration indication signal. The hardware protocol engine of the completion of the information configuration is informed upon completion of the information configuration for the physical layer by the piece of firmware (Wang , 0009).
As per claim 9, the rejection of claim 1 is incorporated, in addition, Sudarmani does not disclose the following, however Wang discloses:
receiving a second power mode change request from the UFS host(Wang, [0077 -- Referring to FIG. 4A, based on the UniPro specification, as indicated by the arrow A100, the local DME 135 establishes a power mode change request, such as using a basic primitive PA_LM_SET.req(PA_PWRMode, x).]);
in response to receiving the second power mode change request, changing the power mode of the device physical layer to a high-speed mode(Wang, [0063 -- Please refer to FIG. 2B, which is a flowchart showing a method for information configuration in power mode change for an interconnection protocol according to another embodiment of the present disclosure.]);
and transmitting a second power mode change response to the UFS host(Wang, [0074 -- The power mode change is, for example, the change from one of the power modes described above to another power mode, for example, the change from a slow mode to a fast mode.]).
Therefore it would have been obvious to a POSITA at the time of filing to incorporate Wang into Sudarmani for the benefit generating a configuration indication signal to trigger a piece of firmware of the first device for performing information configuration for a physical layer of the interconnection protocol when a hardware protocol engine of the first device for implementing a protocol layer of the interconnection protocol performs power mode change according to the protocol layer by the hardware protocol engine. The configuration indication signal is non-standard with respect to the interconnection protocol and the piece of firmware is outside of the hardware protocol engine. The information configuration is performed for the physical layer by the piece of firmware in response to the configuration indication signal. The hardware protocol engine of the completion of the information configuration is informed upon completion of the information configuration for the physical layer by the piece of firmware (Wang , 0009).
As per claim 15, the rejection of claim 11 is incorporated, in addition, Sudarmani does not explcitly disclose the following, however Wang discloses:
wherein the UFS device UIC is further configured to:
receive a second power mode change request from the UFS host(Wang, [0078 -- As shown in B100 of FIG. 4A, the local PA layer 131 performs capability checking when there is a request for a power mode change according to the UniPro specification, and uses the command PA_LM_SET.cnf_L(SUCCESS) to reply to the local DME135, as indicated by the arrow A102.]);
and set parameters of a transmitter connected to the reception channel or a receiver connected to the transmission channel to a value corresponding to the high-speed mode in response to receiving the second power mode change request(Wang, [0077 -- Referring to FIG. 4A, based on the UniPro specification, as indicated by the arrow A100, the local DME 135 establishes a power mode change request, such as using a basic primitive PA_LM_SET.req(PA_PWRMode, x).]).
Therefore it would have been obvious to a POSITA at the time of filing to incorporate Wang into Sudarmani for the benefit generating a configuration indication signal to trigger a piece of firmware of the first device for performing information configuration for a physical layer of the interconnection protocol when a hardware protocol engine of the first device for implementing a protocol layer of the interconnection protocol performs power mode change according to the protocol layer by the hardware protocol engine. The configuration indication signal is non-standard with respect to the interconnection protocol and the piece of firmware is outside of the hardware protocol engine. The information configuration is performed for the physical layer by the piece of firmware in response to the configuration indication signal. The hardware protocol engine of the completion of the information configuration is informed upon completion of the information configuration for the physical layer by the piece of firmware (Wang , 0009).
As per claim 20, the rejection of claim 16 is incorporated, in addition, Sudarmani does not explicitly disclose the following, however Wang discloses:
changing, by the UFS host, the power mode of the reception channel or the transmission channel from the low-speed mode to the high-speed mode(Wang, [0063 -- Please refer to FIG. 2B, which is a flowchart showing a method for information configuration in power mode change for an interconnection protocol according to another embodiment of the present disclosure.]).
Therefore it would have been obvious to a POSITA at the time of filing to incorporate Wang into Sudarmani for the benefit generating a configuration indication signal to trigger a piece of firmware of the first device for performing information configuration for a physical layer of the interconnection protocol when a hardware protocol engine of the first device for implementing a protocol layer of the interconnection protocol performs power mode change according to the protocol layer by the hardware protocol engine. The configuration indication signal is non-standard with respect to the interconnection protocol and the piece of firmware is outside of the hardware protocol engine. The information configuration is performed for the physical layer by the piece of firmware in response to the configuration indication signal. The hardware protocol engine of the completion of the information configuration is informed upon completion of the information configuration for the physical layer by the piece of firmware (Wang , 0009).
Examiner Notes
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Fanshier et al. 20220139177 where the method involves operating (402) a MPERS device in a first power mode in a communication interface is continuously powered or intermittently powered. A power mode reconfiguration command is received from a server that instructs the MPERS device to operate in a second power mode that is different than the first power mode. A communication interface of the MPERS device is intermittently powered or continuously powered. Operation of the MPERS device in the first power mode and operation of the MPERS device in the second power mode are terminated in response to receiving the power mode reconfiguration command(Fanshier abstract).
ConclusionAny inquiry concerning this communication or earlier communications from the examiner should be directed to ARVIND TALUKDAR whose telephone number is (303)297-4475. The examiner can normally be reached M-F, 10 am-6pm EST.
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Arvind Talukdar
Primary Examiner
Art Unit 2132
/ARVIND TALUKDAR/Primary Examiner, Art Unit 2132
Prosecution Insights