Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim (s) 1-5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hakotani et al. (JPH 05167262 A) hereinafter Hakotani in view of Yano et al. (WO 2021245912 A1) hereinafter Yano.
Regarding claim 1, Hakotani discloses, in Fig.1, a core substrate (3) with a built-in inductor (4 and 5), the core substrate being for constructing an interposer to which a semiconductor element is mounted (substrate 3 is used to mount semiconductor elements), the core substrate comprising: a ceramic substrate (3) having a first surface (top surface of 3), a second surface (bottom of 3) opposite the first surface in a thickness direction, and a through hole (see through hole for accommodating 4 and 5) between the first surface and the second surface; a conductor portion (5) extending through the through hole (see 5 extend through the through hole that accommodates 4 and 5); and a magnetic material portion (4) surrounding the conductor portion within the through hole, and made of ceramics ( 4 is made of Ni-Cu-Zn ferrite), wherein the ceramic substrate and the magnetic material portion are inorganically bonded together ( surface between 3 and 4 are bonded together with an inorganic component), and the magnetic material portion and the conductor portion are inorganically bonded together (surface between 4 and 5 are bonded together with an inorganic component).
Hakotani is silent with respect to the conductor portion being made of a sintered material including sintered metal.
Yano discloses conductor portion (3;Fig.1) being made of sintered material including sintered metal (see “Among these metal particles, Cu particles (melting point 1085 ° C.) and Ag particles (melting point 1085 ° C.) and Ag particles (melting point 1085 ° C.) are excellent in conductivity, have a relatively low melting point, and are easily sintered from each other at a firing temperature of 800 to 950 ° C. 962 ° C.) is preferable, and Cu particles are particularly preferable from the viewpoint of economic efficiency”).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of claimed invention to use the teachings of Yano to modify the conducting material of Hakotanic in order provide an electrical conductor that will transmit signals to perform circuit functions.
Regarding claim 2, Hakotani discloses wherein the conductor portion is a non-hollow body (see 5 in Fig.1).
Regarding claim 3, Hakotani discloses a terminal (8;Fig.2)facing each of the conductor portion (7) and the magnetic material portion (6) in the thickness direction (see Fig.2), , wherein the terminal and each of the conductor portion and the magnetic material portion are inorganically bonded together ( inorganic bonding material connects 8 and 6 and 7 together).
Hakotani is silent with respect to the terminal portion being made of a sintered material including sintered metal.
Yano discloses conductor portion (3;Fig.1) being made of sintered material including sintered metal (see “Among these metal particles, Cu particles (melting point 1085 ° C.) and Ag particles (melting point 1085 ° C.) and Ag particles (melting point 1085 ° C.) are excellent in conductivity, have a relatively low melting point, and are easily sintered from each other at a firing temperature of 800 to 950 ° C. 962 ° C.) is preferable, and Cu particles are particularly preferable from the viewpoint of economic efficiency”).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of claimed invention to use the teachings of Yano to modify the terminal portion conducting material of Hakotani in order provide an electrical conductor that will transmit signals to perform circuit functions.
Regarding claim 4, Hakotani discloses wherein the ceramic substrate and the magnetic material portion are bonded together without an organic material interposed therebetween, and the magnetic material portion and the conductor portion are bonded together without an organic material interposed therebetween (see 3,4,5 in Fig.1).
Regarding claim 5, is noted that the limitations of the method steps recited in the claim “wherein the ceramic substrate and the magnetic material portion are sintered together, and the magnetic material portion and the conductor portion are sintered together” are process limitations in a product claim and is treated in accordance with MPEP 2113. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process". In re Thorpe, 777Fo 2d 695,698 USPQ 964, 966 (Fed. Cir.1985). See also MPEP 2113.
Claim (s) 8-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hakotani in view of Yano, as applied to claim 1 above, and further in view of Marin et al. (US 11622448 B2) hereinafter Marin.
Regarding claim 8, Hakotani fails to specifically disclose a wiring portion including a connecting via having a bottom surface connected to the conductor portion of the core substrate , wherein the bottom surface of the connecting via is separated from the magnetic material portion and the ceramic substrate.
Marin discloses a wiring portion (110;Fig.1A or Fig.1A) including a connecting via (180a) having a bottom surface connected to the conductor portion (170) of the core substrate (150), wherein the bottom surface of the connecting via (see bottom surface of 180a) is separated from the magnetic material portion (165b) and the substrate (150).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of claimed invention to use the teachings of Marin to modify the device of Hakotani in order to perform various circuit operations.
Regarding claim 9, Hakotani fails to specifically disclose an insulator layer having a via hole in which the connecting via is disposed, wherein the insulator layer separates the wiring portion and each of the magnetic material portion and the ceramic substrate of the core substrate.
Marin discloses, in Fig.2, an insulator layer (140a) having a via hole (see hole accommodating 182a;Fig.2) in which the connecting via is disposed, wherein the insulator layer separates the wiring portion (see 122a) and each of the magnetic material portion (166b) and the substrate (150:Fig.2).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of claimed invention to use the teachings of Marin to modify the device of Hakotani in order to perform various circuit operations.
Regarding claim 10, Hakotani fails to specifically disclose wherein the via hole of the insulator layer is tapered toward the conductor portion..
Marin discloses, in Fig.2, wherein the via hole of the insulator layer is tapered toward the conductor portion ( see tapered portion of 140a that receives 182a;Fig.1B)
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of claimed invention to use the teachings of Marin to modify the device of Hakotani in order to perform various circuit operations.
Regarding claim 11, Hakotani fails to specifically disclose wherein the insulator layer contains organic matter.
Marin discloses, in Fig.2, wherein the insulator layer contains organic matter. (140a may be made of a polyimide material)
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of claimed invention to use the teachings of Marin to modify the device of Hakotani in order to perform various circuit operations.
Regarding claim 12, a modified Hakotani discloses wherein the wiring portion (120a of 110 in Fig.1A) is a plating layer (see “In some embodiments, the PTH vias 110-111, including the cores 170-171, the first and second vias 180a-b and 181a-b, and the first and second conductive pads 120a-b and 121a-b, may be comprised of a conductive material such as a metal (e.g., copper) and/or the like. In one embodiment, the PTH vias 110-111 may be implemented by a laser/drilling process (i.e., a laser through hole (LTH) process), an electroless deposition process, and/or the like to pattern/form the via openings, vias, conductive pads, conductive sidewalls, and so on. For one embodiment, the PTH vias 110-111 may be laser-plated vias formed with any convention process, including, for example, an electroless Cu plating process or the like” in Marin).
Regarding claim 13, Hakotani discloses an electrode pad (8; Fig.2) connected to the conductor portion (7) of the core substrate (9).
Hakotani fails to specifically disclose a wiring portion including a connecting via having a bottom surface connected to the electrode pad, wherein the bottom surface of the connecting via is separated from the magnetic material portion and the ceramic substrate.
Marin discloses a wiring portion (110) including a connecting via (180a) having a bottom surface connected to the electrode pad ( see bottom electrode pad connecting between 170 and 180a;Fig.1A), wherein the bottom surface of the connecting via is separated from the magnetic material portion and the substrate ( see bottom of 180a separated from 150 and 165b).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of claimed invention to use the teachings of Marin to modify the device of Hakotani in order to perform various circuit operations.
Regarding claim 14, Hakotani discloses wherein the electrode pad has a portion covering the magnetic material portion (see a portion of 8 covering 6 in Fig.2).
Regarding claim 15, Hakotani fails to specifically disclose wherein the electrode pad contains silver.
Yano discloses silver (see “Among these metal particles, Cu particles (melting point 1085 ° C.) and Ag particles (melting point 1085 ° C.) and Ag particles (melting point 1085 ° C.) are excellent in conductivity, have a relatively low melting point, and are easily sintered from each other at a firing temperature of 800 to 950 ° C. 962 ° C.) is preferable, and Cu particles are particularly preferable from the viewpoint of economic efficiency”).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of claimed invention to use the teachings of Yano to modify the electrode pad material of Hakotani in order provide an electrical conductor that will transmit signals to perform circuit functions.
Regarding claim 16, Hakotani fails to specifically disclose wherein the electrode pad is made of a sintered material including sintered metal.
Yano discloses a sintered metal (see “Among these metal particles, Cu particles (melting point 1085 ° C.) and Ag particles (melting point 1085 ° C.) and Ag particles (melting point 1085 ° C.) are excellent in conductivity, have a relatively low melting point, and are easily sintered from each other at a firing temperature of 800 to 950 ° C. 962 ° C.) is preferable, and Cu particles are particularly preferable from the viewpoint of economic efficiency”).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of claimed invention to use the teachings of Yano to modify the electrode pad material of Hakotani in order provide an electrical conductor that will transmit signals to perform circuit functions.
Regarding claim 17, a modified Hakotani discloses wherein the wiring portion (120a of 110 in Fig.1A) is a plating layer (see “In some embodiments, the PTH vias 110-111, including the cores 170-171, the first and second vias 180a-b and 181a-b, and the first and second conductive pads 120a-b and 121a-b, may be comprised of a conductive material such as a metal (e.g., copper) and/or the like. In one embodiment, the PTH vias 110-111 may be implemented by a laser/drilling process (i.e., a laser through hole (LTH) process), an electroless deposition process, and/or the like to pattern/form the via openings, vias, conductive pads, conductive sidewalls, and so on. For one embodiment, the PTH vias 110-111 may be laser-plated vias formed with any convention process, including, for example, an electroless Cu plating process or the like” in Marin).
Allowable Subject Matter
Claims 6-7 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner's statement of reasons for allowance:
Regarding claim 6, The prior art of record neither anticipates norrenders obvious the claimed subject matter of the instant application as a whole eithertaken alone or in combination, in particular, prior art of record does not teach" wherein the magnetic material portion has at least one of a protruding structure toward the ceramic substrate and a step structure facing the ceramic substrate " in combination with the remaining limitations of the claim 1.
Regarding claim 7, The prior art of record neither anticipates norrenders obvious the claimed subject matter of the instant application as a whole eithertaken alone or in combination, in particular, prior art of record does not teach" wherein the conductor portion has a protruding structure toward the magnetic material portion " in combination with the remaining limitations of the claim 1.
Therefore, prior art of record neither anticipates nor renders obvious the instantapplication claimed invention as a whole either taken alone or in combination.
Any comments considered necessary by applicant must be submitted no laterthan the payment of the issue fee and, to avoid processing delays, should preferablyaccompany the issue fee. Such submissions should be clearly labeled "Comments onStatement of Reasons for Allowance."
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PETE LEE whose telephone number is (571) 270-5921. The examiner can normally be reached on Monday-Friday (2nd & 4th Friday Off). If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Timothy Dole can be reached at (571) 272-2229 The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free).
/PETE T LEE/Primary Examiner, Art Unit 2847
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