DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 12/05/2024 and 12/08/2025, are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Claim Status
Claims 1-23 are pending
Claims 10-23 are rejected under 35 U.S.C. 102
Claims 1-9 are rejected under 35 USC § 103
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 01/16/2025 are in compliance with the provisions of 37 CFR 1.97, 1.98 and MPEP § 609. Accordingly, the IDS are being considered by this Examiner.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 10-23 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hsiao; Yu-Hua et al. (US 10698762 B2)[Hsiao]
Regarding claim 10 Hsiao discloses: A semiconductor device, comprising: a memory area comprising a plurality of memory cells (Hsiao: (24), col6/ln9-col6/ln24: teaches the rewritable non-volatile memory module 220 is coupled to the storage controller 210 and stores the data written by the host system 10. The rewritable non-volatile memory module 220 is a flash memory module such as a single level cell (SLC) NAND flash memory module or a multi-level cell (MLC) NAND flash memory module or a triple level cell (TLC) NAND flash memory module. The memory cell in the rewritable non-volatile memory module 220 is arranged in a manner of arrays.); and control logic configured to perform a write operation of storing data in the memory area or a read operation of outputting data stored in the memory area, in response to a command, wherein times when the write operation and the read operation are performed are stored as a write time stamp and a read time stamp in a specific area of the memory area under a control of the control logic (Hsiao: (7), col2/ln1-col2/ln18: teaches a data reading method that includes receiving a read command from a host system. The method includes identifying a first timestamp and a second timestamp of the target physical unit, wherein the first timestamp records a time at which the target physical unit is written last, and the second timestamp records a time at which the target physical unit is read last; and selecting a target reading voltage among a plurality of reading voltages according to the first timestamp and the second timestamp of the target physical unit so as to read the target data from the target physical unit by using the target reading voltage set.).
Regarding claim 11 Hsiao discloses: The semiconductor device of claim 10, wherein when the command is a read command, the control logic adjusts a level of a read voltage based on the write time stamp or the read time stamp (Hsiao: (7), col2/ln1-col2/ln18: teaches a data reading method that includes receiving a read command from a host system. The method includes identifying a first timestamp and a second timestamp of the target physical unit, wherein the first timestamp records a time at which the target physical unit is written last, and the second timestamp records a time at which the target physical unit is read last; and selecting a target reading voltage among a plurality of reading voltages according to the first timestamp or the second timestamp of the target physical unit so as to read the target data from the target physical unit by using the target reading voltage set.).
Regarding claim 12 Hsiao discloses: The semiconductor device of claim 11, wherein the control logic adjusts the level of the read voltage based on the write time stamp if there is no stored read time stamp (Hsiao: (37), col8/ln61-col9/ln17, FIG. 3: teaches the first time value (also referred to as retention time) represent a time length counted from the last writing operation of the target physical unit, and the second time value represent a time length counted from the last reading operation of the target physical unit. Hsiao: (41), col10/ln6-col10/ln47, Fig. 3: Teaches the voltage selection process. The first time value is used in step S32/S33 and reaches step S35/S37. In step S35, voltage selection is done based on if the first time value or the second time value is smaller or greater than the second time threshold value. Since the condition is an "or" we have the scenario where second time value i.e. read time stamp is absent and read voltage is picked based on first time value which is based on write time stamp.).
Regarding claim 13 Hsiao discloses: The semiconductor device of claim 12, wherein the control logic adjusts the level of the read voltage by comparing an elapsed time from the write time stamp to a time when the read command is received with a critical time (Hsiao: (7), col2/ln1-col2/ln18: teaches a data reading method that includes receiving a read command from a host system. The method includes identifying a first timestamp and a second timestamp of the target physical unit, wherein the first timestamp records a time at which the target physical unit is written last, and the second timestamp records a time at which the target physical unit is read last; and selecting a target reading voltage among a plurality of reading voltages according to the first timestamp or the second timestamp of the target physical unit so as to read the target data from the target physical unit by using the target reading voltage set. So, even if the second timestamp is missing or not stored the read voltage for a read operation is selected using first/write timestamp).
Regarding claim 14 Hsiao discloses: The semiconductor device of claim 13, wherein the control logic is configured to: select a read voltage having a target level when the elapsed time is equal to or smaller than the critical time (Hsiao: (40-44), col9/ln53-col11/ln58, Fig. 3, Fig. 4 and claim 7: teaches if the second time value (read-to-read elapsed time) is less than the second time threshold value (similar to critical time) then target reading voltage value selected is VS1. Hsiao (55), col14/ln26-col14/ln36: teaches the first reading voltage set VS1 is a predetermined reading voltage set (target level). So, Hsiao teaches if the read elapsed time is lower than some threshold value (similar to critical time) then selected voltage is the target voltage); and select a read voltage having a level higher than the target level when the elapsed time is greater than the critical time (Hsiao: (40-44), col9/ln53-col11/ln58, Fig. 3, Fig. 4 and claim 7: teaches if the second time value (read-to-read elapsed time) is greater than the second time threshold value (similar to critical time) then target reading voltage value selected is VS2. Hsiao: claim 7: teaches an average voltage value of the second reading voltage set (VS2) is larger than an average voltage value of the first reading voltage set (VS1), i.e. VS2>VS1. Hsiao (55), col14/ln26-col14/ln36: teaches the first reading voltage set VS1 is a predetermined reading voltage set (target voltage). So, Hsiao teaches if the read elapsed time is greater than some threshold value (similar to critical time) then selected voltage (first level or VS2) is higher than target level (target voltage)).
Regarding claim 15 Hsiao discloses: The semiconductor device of claim 11, wherein the control logic adjusts the level of the read voltage based on the read time stamp if there is a stored read time stamp (Hsiao: (7), col2/ln1-col2/ln18: teaches a data reading method that includes receiving a read command from a host system. The method includes identifying a second timestamp of the target physical unit, wherein the second timestamp records a time at which the target physical unit is read last. Hsiao: (40-44), col9/ln53-col11/ln58, Fig. 3, Fig. 4 and claim 7: teaches if the second time value (read-to-read elapsed time) is less than the second time threshold value then target reading voltage value selected is VS1. If the second time value (read-to-read elapsed time) is greater than the second time threshold value then target reading voltage value selected is VS2). So, Hsiao teaches adjusting level of the read voltage using read time stamp if read time stamp (second timestamp) is available i.e. stored.
Regarding claim 16 Hsiao discloses: The semiconductor device of claim 15, wherein the control logic adjusts the level of the read voltage by comparing an elapsed time from the stored read time stamp to a time when the read command is received with a critical time (Hsiao: (40-44), col9/ln53-col11/ln58, Fig. 3, Fig. 4 and claim 7: teaches if the second time value (read-to-read elapsed time) is less than the second time threshold value then target reading voltage value selected is VS1. If the second time value (read-to-read elapsed time) is greater than the second time threshold value (threshold value is similar to critical value) then target reading voltage value selected is VS2.).
Regarding claim 17 Hsiao discloses: The semiconductor device of claim 16, wherein the control logic is configured to: select a read voltage having a target level when the elapsed time is equal to or smaller than the critical time (Hsiao: (40-44), col9/ln53-col11/ln58, Fig. 3, Fig. 4 and claim 7: teaches if the second time value (read-to-read elapsed time) is less than the second time threshold value (similar to critical time) then target reading voltage value selected is VS1. Hsiao (55), col14/ln26-col14/ln36: teaches the first reading voltage set VS1 is a predetermined reading voltage set (target level). So, Hsiao teaches if the read elapsed time is lower than some threshold value (similar to critical time) then selected voltage is the target voltage); and select a read voltage having a level higher than the target level when the elapsed time is greater than the critical time (Hsiao: (40-44), col9/ln53-col11/ln58, Fig. 3, Fig. 4 and claim 7: teaches if the second time value (read-to-read elapsed time) is greater than the second time threshold value (similar to critical time) then target reading voltage value selected is VS2. Hsiao: claim 7: teaches an average voltage value of the second reading voltage set (VS2) is larger than an average voltage value of the first reading voltage set (VS1), i.e. VS2>VS1. Hsiao (55), col14/ln26-col14/ln36: teaches the first reading voltage set VS1 is a predetermined reading voltage set (target voltage). So, Hsiao teaches if the read elapsed time is greater than some threshold value (similar to critical time) then selected voltage (first level or VS2) is higher than target level (target voltage)).
Regarding claim 18 Hsiao discloses: A semiconductor system, comprising: a controller (Hsiao: Fig. 1 bock 210) configured to provide a read command or a write command based on a request from a host (Hsiao: Fig. 1 bock 10); a buffer memory configured to store a time when the read command or the write command is provided as a read time stamp or a write time stamp, respectively and configured to provide the stored time stamp to the controller upon receiving the read command (Hsiao: (7-8), col2/ln1-col2/ln46: teaches a data reading method that includes receiving a read command from a host system. The method includes identifying a first timestamp and a second timestamp of the target physical unit, wherein the first timestamp records a time at which the target physical unit is written last, and the second timestamp records a time at which the target physical unit is read last; and selecting a target reading voltage among a plurality of reading voltages according to the first timestamp or the second timestamp of the target physical unit so as to read the target data from the target physical unit by using the target reading voltage set.); and a semiconductor device (Hsiao: Fig. 1 bock 220) configured to store data or output data stored in the semiconductor device, based on the read command or the write command (Hsiao: (7-8), col2/ln1-col2/ln46: teaches selecting a target reading voltage among a plurality of reading voltages according to the first timestamp or the second timestamp of the target physical unit so as to read the target data from the target physical unit by using the target reading voltage set. Selecting a target read voltage using first/second timestamp indicates storing timestamp of read/write operations which implies either storing data (write operation) or outputting stored data (read operation) from memory device.).
Regarding claim 19 Hsiao discloses: The semiconductor system of claim 18, wherein when providing the read command to the semiconductor device, the controller is configured to: determine a level of a read voltage based on the stored time stamp provided by the buffer memory, and provide the semiconductor device with the read voltage along with the read command (Hsiao: (7), col2/ln1-col2/ln18: teaches a data reading method that includes receiving a read command from a host system. The method includes identifying a first timestamp and a second timestamp of the target physical unit, wherein the first timestamp records a time at which the target physical unit is written last, and the second timestamp records a time at which the target physical unit is read last; and selecting a target reading voltage among a plurality of reading voltages according to the first timestamp or the second timestamp of the target physical unit so as to read the target data from the target physical unit by using the target reading voltage set. Reading data is completed once the read command and the selected read voltage is provided to the memory (i.e. semiconductor device)).
Regarding claim 20 Hsiao discloses: The semiconductor system of claim 18, wherein when the stored time stamp provided by the buffer memory is the write time stamp, the controller is configured to: calculate an elapsed time from the write time stamp to a time when the read command is provided; and determine a level of a read voltage based on the elapsed time (Hsiao: (7), col2/ln1-col2/ln18: teaches a data reading method that includes receiving a read command from a host system. The method includes identifying a first timestamp of the target physical unit, wherein the first timestamp records a time at which the target physical unit is written last; and selecting a target reading voltage among a plurality of reading voltages according to the first timestamp (write time stamp) of the target physical unit so as to read the target data from the target physical unit by using the target reading voltage set. Hsiao: (37), col8/ln61-col9/ln17, FIG. 3: teaches the first time value (also referred to as retention time) represent a time length (elapsed time) counted/calculated from the last writing operation of the target physical unit to the current read operation time. Hsiao: (41), col10/ln6-col10/ln47, Fig. 3: Teaches the read voltage level selection/determination process based on the calculated elapsed time).
Regarding claim 21 Hsiao discloses: The semiconductor system of claim 20, wherein the controller determines the level of the read voltage to be higher than a target level when the elapsed time is greater than a critical time (Hsiao: (40-44), col9/ln53-col11/ln58, Fig. 3, Fig. 4 and claim 7: teaches if the second time value (read-to-read elapsed time) is greater than the second time threshold value (similar to critical time) then target reading voltage value selected is VS2. Hsiao: claim 7: teaches an average voltage value of the second reading voltage set (VS2) is larger than an average voltage value of the first reading voltage set (VS1), i.e. VS2>VS1. Hsiao (55), col14/ln26-col14/ln36: teaches the first reading voltage set VS1 is a predetermined reading voltage set (target voltage). So, Hsiao teaches if the read elapsed time is greater than some threshold value (similar to critical time) then selected voltage (first level or VS2) is higher than target level (target voltage)).
Regarding claim 22 Hsiao discloses: The semiconductor system of claim 18, wherein when the stored time stamp provided by the buffer memory is the read time stamp, the controller is configured to: calculate an elapsed time from the read time stamp to the time when the read command is provided; and determine a level of a read voltage based on the elapsed time (Hsiao: (7), col2/ln1-col2/ln18: teaches a data reading method that includes receiving a read command from a host system. The method includes identifying a second timestamp of the target physical unit, wherein the second timestamp records a time at which the target physical unit is read last. Hsiao: (37), col8/ln61-col9/ln17, FIG. 3: teaches the second time value represent a time length (read-to-read elapsed time) counted/calculated from the last reading operation of the target physical unit. Hsiao: (41), col10/ln6-col10/ln47, Fig. 3: Teaches the read voltage level selection/determination process based on the calculated elapsed time.).
Regarding claim 23 Hsiao discloses: The semiconductor system of claim 22, wherein the controller determines the level of the read voltage to be higher than a target level when the elapsed time is greater than a critical time (Hsiao: (40-44), col9/ln53-col11/ln58, Fig. 3, Fig. 4 and claim 7: teaches if the second time value (read-to-read elapsed time) is greater than the second time threshold value (similar to critical time) then target reading voltage value selected is VS2. Hsiao: claim 7: teaches an average voltage value of the second reading voltage set (VS2) is larger than an average voltage value of the first reading voltage set (VS1), i.e. VS2>VS1. Hsiao (55), col14/ln26-col14/ln36: teaches the first reading voltage set VS1 is a predetermined reading voltage set (target voltage). So, Hsiao teaches if the read elapsed time is greater than some threshold value (similar to critical time) then selected voltage (first level or VS2) is higher than target level (target voltage)).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-9 are rejected under 35 U.S.C. 103 as being unpatentable over KIM; YOON et al. (US 20160004437 A1)[Kim] in view of Hsiao; Yu-Hua et al. (US 10698762 B2)[Hsiao]
Regarding Claim 1 Kim discloses:
An operating method of a semiconductor device, the method comprising: checking whether there is a stored read time stamp upon receiving a read command (Kim:[0113] teaches, when a read request is received, in step S110, a read operation is conducted depending on a time stamp table and a time-read level look-up table. Using time stamp table and look-up table indicates checking read time stamp.); calculating an elapsed time based on the stored read time stamp and a time when the read command is received, the stored read time stamp corresponding to a time when a previous read operation is performed (Kim:[0113] teaches, when a read request is received, in step S110, a read operation is conducted depending on a time stamp table and a time-read level look-up table. The read operation may be performed by means of an optimal read voltage that is determined in view of a current time of a timer 205 (refer to FIG. 1) and a program elapsed time. So, Kim calculating elapsed time using current time and time stamp of past reads.); comparing the elapsed time with a first setting time; selecting a read voltage having a first level instead of a target level when the elapsed time is greater than the first setting time (Kim: [0019] teaches, a memory controller controlling the at least one nonvolatile memory device, wherein the memory controller comprises a timer adapted to indicate a current time; and a read level compensation unit adapted to set a read voltage based on the current time, a time stamp table storing a program time, and a read level shift corresponding to a program elapsed time. Kim: [0069] teaches, the time-read level look-up table 101 stores a value indicating a change in a read level due to a lapse of program time (hereafter, “program elapsed time”). Kim: [0072], Fig. 1 and Fig. 2 teaches, the read level compensation unit 210 controlling the nonvolatile memory device 100 to set an optimal read voltage on a page to be read by use of a current time of the timer 205, the time-read level look-up table 101, and the time stamp table 102. So, Kim (Fig. 2) teaches adjusting read voltage (read level shift) based on different elapsed time and involves comparing elapsed time with time in the table. Fig. 2, original Time-RL LUT table shows, at each time t1, t2, t3 etc. read voltage level is shifted by some delta amount. Here t2-t1, t3-t2 or t3-t1 are similar to first, second, third setting times.); and performing a read operation using the selected read voltage (Kim: [0019], [0069], [0072] quoted above teaches selecting a read voltage using time stamps and elapsed times. Selecting read voltage implies performing a read operation using the selected read voltage.).
Kim teaches all the limitation of claim 1. Applicant uses (spec [0043-0044]) first setting time to select voltage level and uses voltage level adjustment comparing an elapsed time between a write operation and a read operation or between a previous read operation and a current read operation with a critical time defined as first/second setting times. Examiner finds it useful to add Hsiao who also teaches elapsed time between write operation and a current read operation or between a previous read operation and a current read operation and the combination of Kim with Hsiao will enable a person ordinarily skilled in the art to develop a robust and reliable memory device that reads accurate data from storage device easily.
Hsiao discloses:
checking whether there is a stored read time stamp upon receiving a read command; calculating an elapsed time based on the stored read time stamp and a time when the read command is received, the stored read time stamp corresponding to a time when a previous read operation is performed; comparing the elapsed time with a first setting time; selecting a read voltage having a first level instead of a target level when the elapsed time is greater than the first setting time; and performing a read operation using the selected read voltage (Hsiao: (7), col2/ln1-col2/ln18: teaches a data reading method that includes receiving a read command from a host system. The method includes identifying a first timestamp and a second timestamp of the target physical unit, wherein the first timestamp records a time at which the target physical unit is written last, and the second timestamp records a time at which the target physical unit is read last; and selecting a target reading voltage among a plurality of reading voltages according to the first timestamp and the second timestamp of the target physical unit so as to read the target data from the target physical unit by using the target reading voltage set. Hsiao: (44), col11/ln6-col11/ln58, FIG. 4: teaches a look up (called rule table) illustrated in FIG. 4 to select the target reading voltage set among the plurality of reading voltage sets (VS.sub.1˜VS.sub.8). Teaches, comparing the magnitude relationship between the first time value and the first time threshold value (i.e., Y), comparing the magnitude relationship between the first time value and the second time threshold value (i.e., Z) and comparing the magnitude relationship between the second time value with the second time threshold value to find the corresponding reading voltage set.).
Both Kim and Hsiao represent works within the same field of endeavor, namely information processing devices focusing data storage and retrieval operations. It would therefore have been obvious to one of ordinary skill in the art before the claimed invention was effectively filed to apply Kim in view of Hsiao as it represents a combination of known prior art elements according to known methods (accurate data reading method of Kim using first and second timestamp and selecting target reading voltage as per the rule table of Fig. 4 of Hsiao as used in Hsiao's system) to yield a more accurate and robust memory access system (see also Hsiao col2/ln1-col2/ln18 and col11/ln6-col11/ln58)
The instant claim checks for an elapsed time between two successive read and compares the value with some predefined value or threshold values and depending on the result determines a read voltage for that read operation. Both Kim and Hsiao teach the same.
Regarding claim 2 Kim/Hsiao discloses: The operating method of claim 1, wherein the first level is higher than the target level (Hsiao: (40-44), col9/ln53-col11/ln58, Fig. 3, Fig. 4 and claim 7: teaches if the second time value (read-to-read elapsed time) is less than the second time threshold value then target reading voltage value selected is VS1 and if the second time value (read-to-read elapsed time) is greater than the second time threshold value then target reading voltage value selected is VS2 (similar to first level). Hsiao: claim 7: teaches an average voltage value of the second reading voltage set (VS2) is larger than an average voltage value of the first reading voltage set (VS1), i.e. VS2>VS1. Hsiao (55), col14/ln26-col14/ln36: teaches the first reading voltage set VS1 is a predetermined reading voltage set (target voltage). So, Hsiao teaches if the read elapsed time is greater than some threshold value (similar to first setting time) then selected voltage (first level) is higher than target level (target voltage).
Regarding claim 3 Kim/Hsiao discloses: The operating method of claim 1, further comprising storing a time when the read operation is performed as a read time stamp (Hsiao: (7), col2/ln1-col2/ln18: teaches a data reading method that includes receiving a read command from a host system. The method includes identifying a second timestamp of the target physical unit, wherein the second timestamp records a time at which the target physical unit is read last. So, Hsiao teaches recording/storing time of a current read operation (the last read operation) as second timestamp).
Regarding claim 4 Kim/Hsiao discloses: The operating method of claim 1, further comprising selecting the read voltage having the target level when the elapsed time is equal to or smaller than the first setting time (Hsiao: (40-44), col9/ln53-col11/ln58, Fig. 3, Fig. 4 and claim 7: teaches if the second time value (read-to-read elapsed time) is less than the second time threshold value then target reading voltage value selected is VS1. Hsiao (55), col14/ln26-col14/ln36: teaches the first reading voltage set VS1 is a predetermined reading voltage set (target voltage). So, Hsiao teaches if the read elapsed time is lower than some threshold value (similar to first setting time) then selected voltage is the target voltage).
Regarding claim 5 Kim/Hsiao discloses: The operating method of claim 3, wherein the read time stamp is stored in a specific area of a memory area in the semiconductor device (Hsiao: (40-44), col9/ln53-col11/ln58, Fig. 3, Fig. 4 and claim 7: teaches if the second time value (read-to-read elapsed time) is less than the second time threshold value then target reading voltage value selected is VS1. So, Hsiao calculates second time value or read elapsed time which involves saving/storing last read time into some memory to be able to read/load/use it to calculate current read voltage).
Regarding claim 6 Kim/Hsiao discloses: The operating method of claim 1, further comprising calculating an elapsed time based on a write time stamp and a time when the read command is received, when there is no stored read time stamp, the write time stamp corresponding to a time when a write operation is performed, the read operation following the write operation (Hsiao: (7), col2/ln1-col2/ln18: teaches a data reading method that includes receiving a read command from a host system. The method includes identifying a first timestamp and a second timestamp of the target physical unit, wherein the first timestamp records a time at which the target physical unit is written last, and the second timestamp records a time at which the target physical unit is read last; and selecting a target reading voltage among a plurality of reading voltages according to the first timestamp or the second timestamp of the target physical unit so as to read the target data from the target physical unit by using the target reading voltage set. So, even if the second timestamp is missing or not stored the read voltage for a read operation is selected using first/write timestamp.).
Regarding claim 7 Kim/Hsiao discloses: The operating method of claim 6, wherein the write time stamp corresponds to a time when a write operation is performed before receiving the read command (Hsiao: (7), col2/ln1-col2/ln18: teaches a data reading method that includes receiving a read command from a host system. The method includes identifying a first timestamp, wherein the first timestamp records a time at which the target physical unit is written last.).
Regarding claim 8 Kim/Hsiao discloses: The operating method of claim 1, further comprising selecting a read voltage having a second level different from the first level, when the elapsed time is greater than a second setting time (Hsiao: (40-44), col9/ln53-col11/ln58, Fig. 3, Fig. 4 and claim 7: teaches if the first time value is greater than first time threshold value and second time value (read-to-read elapsed time) is greater than the second time threshold value then target reading voltage value selected is VS4 (similar to second level). Teaches if the first time value is greater than first time threshold value and the second time value (read-to-read elapsed time) is lower than the second time threshold value then target reading voltage value selected is VS3 (similar to first level). So, VS4 is selected when second time value (or read elapsed time) is greater than second time threshold value (similar to second setting time). The second time value (or read elapsed time) being greater than second threshold is similar to second setting time. The second time value (or read elapsed time) being less than second threshold is similar to first setting time. As per spec [0044] second setting time is greater than first setting time. Hsiao claim 7: teaches VS3 is greater than VS4. Hence read voltage being second level i.e. VS4 is different from first level i.e. VS3 when read elapsed time is greater than second setting time.).
Regarding claim 9 Kim/Hsiao discloses: The operating method of claim 8, wherein the second setting time is longer than the first setting time, and the second level is higher than the first level (Hsiao: (40-44), col9/ln53-col11/ln58, Fig. 3, Fig. 4 and claim 7: teaches if the first time value is greater than first time threshold value and second time value (read-to-read elapsed time) is greater than the second time threshold value then target reading voltage value selected is VS4 (similar to second level). Teaches if the first time value is greater than first time threshold value and the second time value (read-to-read elapsed time) is lower than the second time threshold value then target reading voltage value selected is VS3 (similar to first level). So, VS4 is selected when second time value (or read elapsed time) is greater than second time threshold value (similar to second setting time). The second time value (or read elapsed time) being greater than second threshold is similar to second setting time. The second time value (or read elapsed time) being less than second threshold is similar to first setting time. As per spec [0044] second setting time is greater than first setting time. Hsiao claim 7: teaches VS3 is greater than VS4. Hence read voltage being second level i.e. VS4 is different from first level i.e. VS3 when read elapsed time is greater than second setting time.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure is recorded in pe2e_search_note.pdf and is attached as OA.APPENDIX.
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/M.S.H/Examiner, Art Unit 2138
/SHAWN X GU/
Primary Examiner, AU2138
Prosecution Insights