N O N - F I N A L A C T I O N
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 1/17/25 complies with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Election / Restriction – Election without Traverse
Applicant’s reply filed on 7/08/2026, elected Species I (representative of Fig. 3) and Sub-Species B (representative of Fig. 10-11) drawn to claims 1-11 and 13-20, which is without traverse.
Therefore, claim 12 is withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to nonelected embodiments, there being no allowable generic or linking claim.
Claim Objections
Claim 20 is objected to because of the following informalities (in lines 9-10) which recites (emphasis in bold) “outputting a third image signal generated from the of the first pixels and a fourth image signal from each of the second pixels”. The bolded language is improper grammar and does not make clear whether Applicant intends for this limitation to actually state “outputting a third image signal generated from each ” as similarly recited in claim 1. For examination purposes, Examiner will interpret this feature as “outputting a third image signal generated from each of the first pixels…”. Appropriate correction is required.
Closest Prior Art
The prior art (cited on PTO-892) is considered pertinent to applicant's disclosure. Among these, the following references are considered to be the closest, collectively disclosing the state of the art concerned with pixel array circuitry for a solid state image sensor configured for phase difference autofocus (PDAF) and/or high dynamic range (HDR).
KIM (US 20230171491) – applied to 35 USC 103 rejection, see Abstract, Fig. 1, 2, 5, 16, 18-20, and para [0164-167, 0172-174].
LI (US 20230090827) – applied to 35 USC 103 rejection, see Abstract, Fig. 4, 5B, 5C, 7, 8B, 9E, and para [0052-53, 0056, 0079-80, 0090-92, 0101, 0104]. Fig. 8B (shown below) discloses 2x2 quad pixels arranged in alternating pattern with a phase difference autofocus (PDAF) quad pixel 802a/802d having shared micro lens 810/812 AND with a high resolution/high SNR quad pixel 802b/802c having unshared micro lenses 808a/b.
LI’s Figure 8B shown below:
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TAKAHASHI (WO-2023092248-A1) – (English translation attached), see Abstract, Fig. 1, Fig. 5, Fig. 13-14, and para [0001, 0094, 0127-0133], discloses a control circuit 102, readout circuit 103, processor circuit 104 for a pixel array 101 comprising high resolution 2x2 quad pixel groups (Fig. 13-14) configured with dual conversion transistors DCG for acquiring image data with high dynamic range and improved SNR.
PYO (US 20220344389) – see Abstract, Fig. 1-4, Fig. 5, Fig. 18 and para [0044-61, 0083, 0127].
NOTE: Examiner welcomes INTERVIEW(s) to discuss the instant application’s claimed invention as it corresponds to the specification embodiments, as well as, discussing the similarities/differences taught/not taught by prior art. In the interest of compact prosecution, Applicant’s arguments/amendments should not only address the cited closest art applied/relied on in the 35 USC 103 rejection (below), but also address the other cited closest art not applied/relied on.
Examiner cites particular columns and line numbers in the references as applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the applicant fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner.
Claim Rejections – 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 4-6, 11, 13-17, and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over LI (US 20230090827) in view of KIM (US 20230171491) -- hereafter, termed as shown “underlined”.
As per INDEPENDENT CLAIM 1, LI teaches an image sensor (see Fig. 4 and 7 in view of Fig. 8B and 9E, and para [0052-53, 0054-56, 0061, 0079, 0090, 0092, 0101, 0104] which has a processor that serves as a timing controller for driving the pixel transistors, row select, and column select in an operating method) comprising:
a first pixel group comprising a plurality of first pixels, wherein a plurality of first micro lenses are on the plurality of first pixels, respectively, a second pixel group comprising a plurality of second pixels, wherein a second micro lens is on at least two of the plurality of second pixels (see Fig. 8B: discloses 2x2 quad pixels arranged in alternating pattern with a phase difference autofocus (PDAF) quad pixel 802a/802d having shared micro lens 810/812 (Fig. 5B) which corresponds to “second pixel group” AND with a high resolution/high SNR quad pixel 802b/802c having unshared micro lenses 808a/b (Fig. 5C) which corresponds to “first pixel group”. Fig. 7: each quad pixel may have four photodiodes PDs with a shared floating diffusion FD 708 and shared readout 704.);
Regarding the limitations: “a timing controller configured to:
control, in a first sensing readout period of a readout period, a first image signal generated from each of the plurality of first pixels and a second image signal generated from a first portion of the plurality of second pixels to be output,
and control, in a second sensing readout period of the readout period that follows the first sensing readout period, a third image signal generated from each of the plurality of first pixels and a fourth image signal generated from each of the plurality of second pixels to be output”,
LI discloses a processor may serve as a timing controller for driving the pixel transistors, readout transistors, row select circuit, and column select circuit in various operating methods for the image sensor (Fig. 4 in view of Fig. 7 and para [0056, 0061, 0079-80, 0090, 0092, 0101, 0104]), wherein para [0079] (emphasis in bold) states – “When the integration period ends, the accumulated charge in some or all of the photodetectors 702 may be transferred to the sense region 708 by sequentially or simultaneously applying drive signals to (e.g., by pulsing gate voltages of) the charge transfer transistors 706. Typically, the reset transistor 710 is used to reset the voltage on the sense region 708 to a predetermined level prior to the transfer of charge from a set of one or more photodetectors 702 to the sense region 708. When charge is to be read out for the array of pixels 700, a drive signal may be applied to the row select transistor 714 (e.g., a gate voltage of the row select transistor 714 may be pulsed) via a row select line 718 coupled to row select circuitry, and charge from one, two, or any number of the photodetectors 702 may be read out over an output line 716 coupled to column select circuitry”.
Furthermore, LI’s para [0079] taken with Fig. 8B in view of para [0080, 0090-92] discloses that the photodiode charges may be transferred to the floating diffusion 708 and readout in pairs or all together such that per para [0092] the 1×1 OCLs over each pixel in the green subsets of pixels 802b, 802c enables the capture of a high resolution green image with high signal-to-noise ratio (SNR) AND 2×1 or 2×2 OCLs over the pixels in the red and blue subsets of pixels 802a, 802d enable the capture of good PDAF information.
Given the above discussion, Examiner understands that the high resolution/high SNR quad pixel 802b/802c having unshared micro lenses 808a/b (Fig. 5C) which corresponds to the “first pixel group” could be readout as an added/binned image signal from all four photodiodes (of same color) for purposes of producing image data with high signal-to-noise ratio (SNR).
Furthermore, given the above discussion, Examiner understands that the (PDAF) quad pixel 802a/802d having shared micro lens 810/812 (Fig. 5B) which corresponds to the “second pixel group” could be readout as an added image signal from some (i.e. single or pair) of photodiodes or all four photodiodes for purposes of producing image data useful for determining phase difference autofocus information along horizontal/vertical edges (para [0053]), wherein para [0052] states – “The focus of the first and/or second sets of edges may be detected in the same or different image capture frames, using the same or different pixels”.
For above reasons, the teachings of LI’s operation method for an image sensor are believed to either anticipate or found obvious for one of ordinary skill in the art to configure a timing controller / readout circuit to perform the following limitations:
“control, in a first sensing readout period of a readout period, a first image signal generated from each of the plurality of first pixels and a second image signal generated from a first portion (some) of the plurality of second pixels to be output,
and control, in a second sensing readout period of the readout period that follows the first sensing readout period, a fourth image signal generated from each (all) of the plurality of second pixels to be output”.
LI does not teach “control, in a second sensing readout period of the readout period that follows the first sensing readout period, a third image signal generated from each of the first pixels”.
LI’s invention differs from Applicant’s invention in that LI’s disclosure for a 2x2 quad pixel (Fig. 7) does not teach a dual conversion gain transistor and extra capacitor in which the floating diffusion may controlled to have an adjusted capacitance such that the first pixel group may be controlled to output a first image signal generated from each of the first pixels in a high conversion gain mode and sequentially output a third image signal generated from each of the first pixels in a low conversion gain mode for improving dynamic range purposes.
Therefore, to further show that the operating method performed by the timing controller / readout circuit as claimed by Applicant would have been obvious to one of ordinary skill in the art, Examiner points to prior art KIM. See Fig. 1, Fig. 2 in view of Fig.18, para [0164-167, 0172-174], and timing diagrams in Fig. 5, 16, 19-20. KIM discloses a 2x2 quad pixel group (PXC in Fig. 2) similar to LI’s disclosure, wherein KIM discloses that this 2x2 quad pixel group may be modified (PXC in Fig. 18) to include a dual conversion gain transistor and extra capacitor in which the floating diffusion may controlled to have an adjusted capacitance such that a pixel group PXC may be controlled to output an image signal generated from all the pixels in a high conversion gain mode (see operation S2 in Fig. 19 or operation S3 in Fig. 20) AND sequentially output a subsequent image signal generated from all the pixels in a low conversion gain mode (see operation S3 in Fig. 19 or operation S4 in Fig. 20) for improving dynamic range purposes (para [0164-166, 0172, 0174]).
KIM also discloses that a 2x2 quad pixel group (PXC in Fig. 2 or Fig. 18) may be operated to output an image signal generated from some “a first portion pair” of the pixel group (see operation S2 in Fig. 5 or operation S2 in Fig. 16) AND output a subsequent image signal from all of the pixels in the pixel group (see operation S4 in Fig. 5 or operation S3 in Fig. 16) for purposes of producing image data useful for determining phase difference autofocus information.
Thus, when considering the collective knowledge bestowed by each applied prior art, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to COMBINE the teachings of KIM into suitable modification with the teachings of LI to produce Applicant’s claimed image sensor with the structural / functional configuration stated in said underlined limitation for the MOTIVATED REASON to produce first image data with high dynamic range / high SNR and second image data useful for PDAF while having a reduced frame period and reduced number of pixel readout operations in the analogous art of an image sensor configured with PDAF pixel groups.
As per CLAIM 2, LI in view of KIM teaches the image sensor of claim 1, wherein each of the plurality of first pixels and each of the plurality of second pixels comprises:
a photoelectric conversion element configured to generate photocharges based on incident light, and a transmission transistor configured to transmit the photocharges generated by the photoelectric conversion element to a floating diffusion node (see quad pixel circuit 700 in LI’s Fig. 7 having shared FD 708 amongst four PDs with respective transfer transistors AND quad pixel circuit PXC in KIM’s Fig. 2 in view of Fig. 18 having shared FD amongst four PDs with respective transfer transistors),
and wherein in the first sensing readout period, the transmission transistor of each of the plurality of first pixels is turned on, and wherein the transmission transistor of each of the first portion of the plurality of second pixels is turned on, and the transmission transistor of each of a second portion of the plurality of second pixels is turned off (See prior art combination discussed in claim 1 over LI’s first pixel group 802b/c and second “PDAF” pixel group 802a/d in Fig. 8B/9E in view of para [0052-53, 0056, 0079-80, 0090, 0092] taken with KIM’s pixel groups PXC in Fig. 2 or Fig. 18 and timing diagrams Fig. 5 & Fig. 16 which turn on/off portions of pixels for PDAF purposes).
As per CLAIM 4, LI in view of KIM teaches the image sensor of claim 1, wherein the readout period further comprises a reset readout period preceding the first sensing readout period, and wherein the timing controller is further configured to control, in the reset readout period, a first reset signal for the plurality of first pixels to be output and a second reset signal for the plurality of second pixels to be output (See prior art combination discussed in claim 1 over LI’s para [0079] taken with KIM’s quad pixel group (PXC in Fig. 2 or Fig. 18) and timing diagrams in Fig. 19-20).
As per CLAIM 5, LI in view of KIM teaches the image sensor of claim 1, wherein the timing controller is further configured to generate phase detection data for auto-focusing based on the second image signal and the fourth image signal (See prior art combination discussed in claim 13 over LI’s PDAF quad pixel group 802a/d Fig. 8B in view of para [0052-53, 0056, 0079-80, 0090, 0092] taken with KIM’s quad pixel group (PXC in Fig. 2 or Fig. 18) may be operated to output an image signal generated from some “a first portion pair” of the pixel group (see operation S2 in Fig. 5 or operation S2 in Fig. 16) AND output a subsequent image signal from all of the pixels in the pixel group (see operation S4 in Fig. 5 or operation S3 in Fig. 16) for purposes of producing image data useful for determining phase difference autofocus information).
As per CLAIM 6, LI in view of KIM teaches the image sensor of claim 1, wherein the timing controller is further configured to generate image data for improving a signal to noise ratio (SNR) based on the first image signal and the third image signal (This feature is obvious over the prior art combination discussed in claim 1 over LI’s para [0079] taken with Fig. 5C/8B in view of para [0080, 0090-92] discloses that the photodiode charges may be transferred to the floating diffusion 708 and readout in pairs or all together such that per para [0092] the 1×1 OCLs over each pixel in the green subsets of pixels 802b, 802c enables the capture of a high resolution green image with high signal-to-noise ratio (SNR)).
As per CLAIM 11, LI in view of KIM teaches the image sensor of claim 1, wherein the plurality of first pixels comprises four first pixels, and the plurality of first micro lenses comprises four first micro lenses, wherein the first portion of the plurality of second pixels comprises two adjacent second pixels, wherein the plurality of second pixels comprises four second pixels, and the second micro lens extends across the four second pixels, and wherein the timing controller is further configured to: control, in the first sensing readout period, the first image signal the be obtained by summing respective image signals of the four first pixels and the second image signal to be obtained by summing image signals of the two adjacent second pixels, and control, in the second sensing readout period, the third image signal to be obtained by summing respective image signals of the four first pixels and the fourth image signal to be obtained by summing respective image signals of the four second pixels (See prior art combination discussed in claim 1 over LI’s first pixel group 802b/c and second “PDAF” pixel group 802a/d in Fig. 8B/9E in view of para [0052-53, 0056, 0079-80, 0090, 0092] taken with KIM’s pixel groups PXC in Fig. 2 in view of Fig. 18 and timing diagrams Fig. 5 & Fig. 16 to operate a pixel group for PDAF purposes and timing diagrams Fig. 19-20 to operate a pixel group for improved dynamic range purposes).
As per INDEPENDENT CLAIM 13, LI teaches an image sensor (see Fig. 4 and 7 in view of Fig. 8B and 9E, and para [0052-53, 0054-56, 0061, 0079, 0090, 0092, 0101, 0104] which has a processor that serves as a timing controller for driving the pixel transistors, row select, and column select in an operating method) comprising:
a first pixel group comprising a plurality of first pixels arranged in rows and columns, a second pixel group comprising a plurality of second pixels arranged in rows and columns, a plurality of first micro lenses on the plurality of first pixels, respectively, a second micro lens on at least two of the plurality of second pixels, the second micro lens having a diameter greater than that of a first micro lens of the plurality of first micro lenses (see Fig. 8B: discloses 2x2 quad pixels arranged in alternating pattern with a phase difference autofocus (PDAF) quad pixel 802a/802d having shared micro lens 810/812 (Fig. 5B) which corresponds to “second pixel group” AND with a high resolution/high SNR quad pixel 802b/802c having unshared micro lenses 808a/b (Fig. 5C) which corresponds to “first pixel group”. Fig. 7: each quad pixel may have four photodiodes PDs with a shared floating diffusion FD 708 and shared readout 704.);
Regarding the limitations: “a readout circuit configured to:
sequentially output, in a readout period, a first pixel value generated based on each of the plurality of first pixels and a third pixel value generated based on each of the plurality of first pixels,
and sequentially output, in the readout period, a second pixel value generated based on a first portion of the plurality of second pixels among the plurality of second pixels and a fourth pixel value generated based on each of the plurality of second pixels”,
LI discloses a processor may serve as a timing controller for driving the pixel transistors, readout transistors, row select circuit, and column select circuit in various operating methods for the image sensor (Fig. 4 in view of Fig. 7 and para [0056, 0061, 0079-80, 0090, 0092, 0101, 0104]), wherein para [0079] (emphasis in bold) states – “When the integration period ends, the accumulated charge in some or all of the photodetectors 702 may be transferred to the sense region 708 by sequentially or simultaneously applying drive signals to (e.g., by pulsing gate voltages of) the charge transfer transistors 706. Typically, the reset transistor 710 is used to reset the voltage on the sense region 708 to a predetermined level prior to the transfer of charge from a set of one or more photodetectors 702 to the sense region 708. When charge is to be read out for the array of pixels 700, a drive signal may be applied to the row select transistor 714 (e.g., a gate voltage of the row select transistor 714 may be pulsed) via a row select line 718 coupled to row select circuitry, and charge from one, two, or any number of the photodetectors 702 may be read out over an output line 716 coupled to column select circuitry”.
Furthermore, LI’s para [0079] taken with Fig. 8B in view of para [0080, 0090-92] discloses that the photodiode charges may be transferred to the floating diffusion 708 and readout in pairs or all together such that per para [0092] the 1×1 OCLs over each pixel in the green subsets of pixels 802b, 802c enables the capture of a high resolution green image with high signal-to-noise ratio (SNR) AND 2×1 or 2×2 OCLs over the pixels in the red and blue subsets of pixels 802a, 802d enable the capture of good PDAF information.
Given the above discussion, Examiner understands that the high resolution/high SNR quad pixel 802b/802c having unshared micro lenses 808a/b (Fig. 5C) which corresponds to the “first pixel group” could be readout as an added/binned image signal from all four photodiodes (of same color) for purposes of producing image data with high signal-to-noise ratio (SNR).
Furthermore, given the above discussion, Examiner understands that the (PDAF) quad pixel 802a/802d having shared micro lens 810/812 (Fig. 5B) which corresponds to the “second pixel group” could be readout as an added image signal from some (i.e. single or pair) of photodiodes or all four photodiodes for purposes of producing image data useful for determining phase difference autofocus information along horizontal/vertical edges (para [0053]), wherein para [0052] states – “The focus of the first and/or second sets of edges may be detected in the same or different image capture frames, using the same or different pixels”.
For above reasons, the teachings of LI’s operation method for an image sensor are believed to either anticipate or found obvious for one of ordinary skill in the art to configure a timing controller / readout circuit to perform the following limitations:
“sequentially output, in a readout period, a first pixel value generated based on each of the plurality of first pixels,
and sequentially output, in the readout period, a second pixel value generated based on a first portion (some) of the plurality of second pixels among the plurality of second pixels and a fourth pixel value generated based on each (all) of the plurality of second pixels”.
LI does not teach “sequentially output, in a readout period, a third pixel value generated based on each of the plurality of first pixels”.
LI’s invention differs from Applicant’s invention in that LI’s disclosure for a 2x2 quad pixel (Fig. 7) does not teach a dual conversion gain transistor and extra capacitor in which the floating diffusion may controlled to have an adjusted capacitance such that the first pixel group may be controlled to output a first image signal generated from each of the first pixels in a high conversion gain mode and sequentially output a third image signal generated from each of the first pixels in a low conversion gain mode for improving dynamic range purposes.
Therefore, to further show that the operating method performed by the timing controller / readout circuit as claimed by Applicant would have been obvious to one of ordinary skill in the art, Examiner points to prior art KIM. See Fig. 1, Fig. 2 in view of Fig.18, para [0164-167, 0172-174], and timing diagrams in Fig. 5, 16, 19-20. KIM discloses a 2x2 quad pixel group (PXC in Fig. 2) similar to LI’s disclosure, wherein KIM discloses that this 2x2 quad pixel group may be modified (PXC in Fig. 18) to include a dual conversion gain transistor and extra capacitor in which the floating diffusion may controlled to have an adjusted capacitance such that a pixel group PXC may be controlled to output an image signal generated from all the pixels in a high conversion gain mode (see operation S2 in Fig. 19 or operation S3 in Fig. 20) AND sequentially output a subsequent image signal generated from all the pixels in a low conversion gain mode (see operation S3 in Fig. 19 or operation S4 in Fig. 20) for improving dynamic range purposes (para [0164-166, 0172, 0174]).
KIM also discloses that a 2x2 quad pixel group (PXC in Fig. 2 or Fig. 18) may be operated to output an image signal generated from some “a first portion pair” of the pixel group (see operation S2 in Fig. 5 or operation S2 in Fig. 16) AND output a subsequent image signal from all of the pixels in the pixel group (see operation S4 in Fig. 5 or operation S3 in Fig. 16) for purposes of producing image data useful for determining phase difference autofocus information.
Thus, when considering the collective knowledge bestowed by each applied prior art, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to COMBINE the teachings of KIM into suitable modification with the teachings of LI to produce Applicant’s claimed image sensor with the structural / functional configuration stated in said underlined limitation for the MOTIVATED REASON to produce first image data with high dynamic range / high SNR and second image data useful for PDAF while having a reduced frame period and reduced number of pixel readout operations in the analogous art of an image sensor configured with PDAF pixel groups.
As per CLAIM 14, LI in view of KIM teaches the image sensor of claim 13, wherein the readout circuit is further configured to, in a first sensing readout period in the readout period, output the first pixel value and the second pixel value (See prior art combination discussed in claim 13 over LI’s first pixel group 802b/c and second “PDAF” pixel group 802a/d in Fig. 8B/9E in view of para [0052-53, 0056, 0079-80, 0090, 0092] taken with KIM’s pixel groups PXC in Fig. 2 or Fig. 18 may readout a first pixel group PX1 and second pixel group PX3 in a first sensing readout period per timing diagram in Fig. 16).
As per CLAIM 15, LI in view of KIM teaches the image sensor of claim 13, wherein each of the plurality of first pixels and each of the plurality of second pixels comprises: a photoelectric conversion element configured to generate photocharges based on incident light; and a transmission transistor configured to transmit the photocharges generated by the photoelectric conversion element to a floating diffusion node (see quad pixel circuit 700 in LI’s Fig. 7 having shared FD 708 amongst four PDs with respective transfer transistors AND quad pixel circuit PXC in KIM’s Fig. 2 in view of Fig. 18 having shared FD amongst four PDs with respective transfer transistors), and wherein in the readout period, the transmission transistor of each of the plurality of first pixels is turned on and then turned off, and after the transmission transistor of each of the first portion of the plurality of second pixels is turned on, the transmission transistor of each of the plurality of second pixels is turned on (See prior art combination discussed in claim 13 over LI’s first pixel group 802b/c and second “PDAF” pixel group 802a/d in Fig. 8B/9E in view of para [0052-53, 0056, 0079-80, 0090, 0092] taken with KIM’s pixel groups PXC in Fig. 2 or Fig. 18 and timing diagrams Fig. 5 & Fig. 16 which turn on/off portions of pixels for PDAF purposes).
As per CLAIM 16, LI in view of KIM teaches the image sensor of claim 13, wherein auto-focusing data is generated based on the second pixel value and the fourth pixel value (See prior art combination discussed in claim 13 over LI’s PDAF quad pixel group 802a/d Fig. 8B in view of para [0052-53, 0056, 0079-80, 0090, 0092] taken with KIM’s quad pixel group (PXC in Fig. 2 or Fig. 18) may be operated to output an image signal generated from some “a first portion pair” of the pixel group (see operation S2 in Fig. 5 or operation S2 in Fig. 16) AND output a subsequent image signal from all of the pixels in the pixel group (see operation S4 in Fig. 5 or operation S3 in Fig. 16) for purposes of producing image data useful for determining phase difference autofocus information).
As per CLAIM 17, LI in view of KIM teaches the image sensor of claim 13, wherein the first pixel value comprises a pixel value generated based on the plurality of first pixels operating in a high conversion gain (HCG) mode in the readout period, and wherein the third pixel value comprises a pixel value generated based on the plurality of first pixels operating in a low conversion gain (LCG) mode in the readout period (See prior art combination discussed in claim 13 over LI’s quad pixel group 802b/c in Fig. 8B in view of para [0079-80, 0092] taken with KIM’s quad pixel group PXC in Fig. 2 as modified by Fig. 18 to include a dual conversion gain transistor and extra capacitor in which the floating diffusion may controlled to have an adjusted capacitance such that a pixel group PXC may be controlled to output an image signal generated from all the pixels in a high conversion gain mode (see operation S2 in Fig. 19 or operation S3 in Fig. 20) AND sequentially output a subsequent image signal generated from all the pixels in a low conversion gain mode (see operation S3 in Fig. 19 or operation S4 in Fig. 20) for improving dynamic range purposes per para [0164-166, 0172, 0174]).
As per CLAIM 19, LI in view of KIM teaches the image sensor of claim 13, wherein the plurality of first pixels comprises four first pixels, and the plurality of first micro lenses comprises four first micro lenses, and wherein the plurality of second pixels comprises four second pixels, and the second micro lens extends across the four second pixels (see LI’s Fig. 8B: discloses 2x2 quad pixels arranged in alternating pattern with a phase difference autofocus (PDAF) quad pixel 802a/802d having shared micro lens 810/812 (Fig. 5B) which corresponds to “second pixel group” AND with a high resolution/high SNR quad pixel 802b/802c having unshared micro lenses 808a/b (Fig. 5C) which corresponds to “first pixel group”. Fig. 7: each quad pixel may have four photodiodes PDs with a shared floating diffusion FD 708 and shared readout 704.).
As per INDEPENDENT CLAIM 20, LI teaches an operating method of an image sensor, the image sensor (see Fig. 4 and 7 in view of Fig. 8B and 9E, and para [0052-53, 0054-56, 0061, 0079, 0090, 0092, 0101, 0104] which has a processor that serves as a timing controller for driving the pixel transistors, row select, and column select in an operating method) comprising a first pixel group comprising first pixels, a second pixel group including second pixels, first micro lenses disposed on the first pixels, respectively, and a second micro lens disposed on at least two of the second pixels (see Fig. 8B: discloses 2x2 quad pixels arranged in alternating pattern with a phase difference autofocus (PDAF) quad pixel 802a/802d having shared micro lens 810/812 (Fig. 5B) which corresponds to “second pixel group” AND with a high resolution/high SNR quad pixel 802b/802c having unshared micro lenses 808a/b (Fig. 5C) which corresponds to “first pixel group”. Fig. 7: each quad pixel may have four photodiodes PDs with a shared floating diffusion FD 708 and shared readout 704.),
Regarding the limitations: “the operating method comprising:
outputting a first reset signal for the first pixels and a second reset signal for the second pixels;
outputting a first image signal generated from each of the first pixels and a second image signal generated from a first portion of the second pixels;
and outputting a third image signal generated from each of the first pixels and a fourth image signal from each of the second pixels”,
LI discloses a processor may serve as a timing controller for driving the pixel transistors, readout transistors, row select circuit, and column select circuit in various operating methods for the image sensor (Fig. 4 in view of Fig. 7 and para [0056, 0061, 0079-80, 0090, 0092, 0101, 0104]), wherein para [0079] (emphasis in bold) states – “When the integration period ends, the accumulated charge in some or all of the photodetectors 702 may be transferred to the sense region 708 by sequentially or simultaneously applying drive signals to (e.g., by pulsing gate voltages of) the charge transfer transistors 706. Typically, the reset transistor 710 is used to reset the voltage on the sense region 708 to a predetermined level prior to the transfer of charge from a set of one or more photodetectors 702 to the sense region 708. When charge is to be read out for the array of pixels 700, a drive signal may be applied to the row select transistor 714 (e.g., a gate voltage of the row select transistor 714 may be pulsed) via a row select line 718 coupled to row select circuitry, and charge from one, two, or any number of the photodetectors 702 may be read out over an output line 716 coupled to column select circuitry”.
Furthermore, LI’s para [0079] taken with Fig. 8B in view of para [0080, 0090-92] discloses that the photodiode charges may be transferred to the floating diffusion 708 and readout in pairs or all together such that per para [0092] the 1×1 OCLs over each pixel in the green subsets of pixels 802b, 802c enables the capture of a high resolution green image with high signal-to-noise ratio (SNR) AND 2×1 or 2×2 OCLs over the pixels in the red and blue subsets of pixels 802a, 802d enable the capture of good PDAF information.
Given the above discussion, Examiner understands that the high resolution/high SNR quad pixel 802b/802c having unshared micro lenses 808a/b (Fig. 5C) which corresponds to the “first pixel group” could be readout as an added/binned image signal from all four photodiodes (of same color) for purposes of producing image data with high signal-to-noise ratio (SNR).
Furthermore, given the above discussion, Examiner understands that the (PDAF) quad pixel 802a/802d having shared micro lens 810/812 (Fig. 5B) which corresponds to the “second pixel group” could be readout as an added image signal from some (i.e. single or pair) of photodiodes or all four photodiodes for purposes of producing image data useful for determining phase difference autofocus information along horizontal/vertical edges (para [0053]), wherein para [0052] states – “The focus of the first and/or second sets of edges may be detected in the same or different image capture frames, using the same or different pixels”.
For above reasons, the teachings of LI’s operation method for an image sensor are believed to either anticipate or found obvious for one of ordinary skill in the art to configure a timing controller / readout circuit to perform the following limitations:
“outputting a first reset signal for the first pixels and a second reset signal for the second pixels; outputting a first image signal generated from each of the first pixels and a second image signal generated from a first portion (some) of the second pixels; and outputting a fourth image signal from each (all) of the second pixels”.
LI does not teach “outputting a third image signal generated from each of the first pixels”.
LI’s invention differs from Applicant’s invention in that LI’s disclosure for a 2x2 quad pixel (Fig. 7) does not teach a dual conversion gain transistor and extra capacitor in which the floating diffusion may controlled to have an adjusted capacitance such that the first pixel group may be controlled to output a first image signal generated from each of the first pixels in a high conversion gain mode and sequentially output a third image signal generated from each of the first pixels in a low conversion gain mode for improving dynamic range purposes.
Therefore, to further show that the operating method claimed by Applicant would have been obvious to one of ordinary skill in the art, Examiner points to prior art KIM.
See Fig. 1, Fig. 2 in view of Fig.18, and para [0164-167, 0172-174]. KIM discloses a 2x2 quad pixel group (PXC in Fig. 2) similar to LI’s disclosure, wherein KIM discloses that this 2x2 quad pixel group may be modified (PXC in Fig. 18) to include a dual conversion gain transistor and extra capacitor in which the floating diffusion may controlled to have an adjusted capacitance such that a pixel group PXC may be controlled to output an image signal generated from all the pixels in a high conversion gain mode (see operation S2 in Fig. 19 or operation S3 in Fig. 20) AND sequentially output a subsequent image signal generated from all the pixels in a low conversion gain mode (see operation S3 in Fig. 19 or operation S4 in Fig. 20) for improving dynamic range purposes (para [0164-166, 0172, 0174]).
KIM also discloses that a 2x2 quad pixel group (PXC in Fig. 2 or Fig. 18) may be operated to output an image signal generated from some “a first portion pair” of the pixel group (see operation S2 in Fig. 5 or operation S2 in Fig. 16) AND output a subsequent image signal from all of the pixels in the pixel group (see operation S4 in Fig. 5 or operation S3 in Fig. 16) for purposes of producing image data useful for determining phase difference autofocus information.
Thus, when considering the collective knowledge bestowed by each applied prior art, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to COMBINE the teachings of KIM into suitable modification with the teachings of LI to produce Applicant’s claimed image sensor with the structural / functional configuration stated in said underlined limitation for the MOTIVATED REASON to produce first image data with high dynamic range / high SNR and second image data useful for PDAF while having a reduced frame period and reduced number of pixel readout operations in the analogous art of an image sensor configured with PDAF pixel groups.
Allowable Subject Matter
Claims 3, 7-10, and 18 are objected to as being dependent upon a rejected base claim but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
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/AKSHAY TREHAN/
Examiner, Art Unit 2639
/TWYLER L HASKINS/Supervisory Patent Examiner, Art Unit 2639
