Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Other Refs: Wang (US 20240403222) – Memory Controller for read operations.
Allowable Subject Matter
Claims 2-9, 11-14, 16-23 are objected to as being dependent upon a rejected base claims, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Specifically, Claims 2-9, 11-14 and 16-23 are dependent upon rejected Claims 1, 10 and 15, respectively.
REASONS FOR ALLOWANCE
The following is an examiner’s statement of reasons for allowance:
For Claims 2-9, the prior art discloses and/or renders obvious the limitations from Claim 1. The prior art does not appear to disclose the limitations from Claims 2-9.
For Claims 11-14, the prior art discloses and/or renders obvious the limitations from Claim 10. The prior art does not appear to disclose the limitations from Claims 11-14.
For Claims 16-23, the prior art discloses and/or renders obvious the limitations from Claim 15. The prior art does not appear to disclose the limitations from Claims 16-23.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 10 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Reiter (US 20110072199) and in view of Ke (US 20210326042) and further in view of Conley (US 20050195635)
Claim 1. Reiter discloses A method for accelerating execution of host read commands (eg., 0059, 0069 - host requests to read data from flash media 118, buffer layer 210 might temporarily store the data in buffer 114 until host layer 202 coordinates sending the data to the host via communication link 102.), comprising:
obtaining a first group number and a first section number associated with a logical address carried in a first host read command (eg., 0063 Fig. 4a - FTL 208 derives LBN 406 by dividing LSN 404 by a number of sectors per block of flash media 118. FTL 208 derives LPN 408 by dividing LSN 404 by a number of sectors per page of flash media 118. LBN 406 in turn corresponds to Superblock number 410 and block index 412, while LPN 408 corresponds to page index 414.).
Reiter does not disclose, but Ke discloses
determining whether a first variable corresponding to a first mode is less than or equal to a first accumulation threshold, wherein the first variable stores a total number that mapping records temporarily stored in a random access memory (RAM) are judged as a low-usage state during the first mode (0036 - When the respective access counts {AC} (e.g., {3, 5}) of certain logical addresses {L_ADD} reach (e.g. greater than or equal to) the average value AC_avg such as 2.5, the memory controller 110 can determine that the access probability of the logical addresses {L_ADD} reaches the average access probability,; 0022 - wherein each block in the multiple blocks can comprise multiple pages (e.g., data pages), and an access operation (e.g., reading or writing) can be performed on one or more pages);
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the buffered read requests from flash media as disclosed by Reiter with Ke, providing the benefit of performing block management regarding a non-volatile (NV) memory and associated apparatus such as a memory device, a memory controller of the memory device (see Ke, 0006).
Reiter in view of Ke does not disclose, but Conley discloses
when the first variable is less than or equal to the first accumulation threshold, performing operations of the first mode for reading a plurality of first records associated with the first group number and the first section number and a plurality of second records associated with the first group number and a second section number from a host-address to flash-address mapping (H2F) table in a flash module, and storing the first records and the second records in the RAM, wherein the first records store mapping information about which physical address where user data associated with each of a plurality of first logical addresses is actually stored in an order of the first logical addresses, the second records are located after the first records, and the second records store mapping information about which physical address where user data associated with each of a plurality of second logical addresses is actually stored in an order of the second logical addresses (eg., 0043 Fig. 5, 6A 6B - Where a new command is received it is first determined if it is a read command 510. If it is not, then the command is executed 512 without RLA operations. For a read command, if it is determined that a requested sector is not in read cache 514, the process waits for it to be transferred from flash to the read cache 516. Once the requested sector is in read cache, it is transferred to the host 518. If more sectors are to be read 519 then the process repeats this sequence for subsequent sectors. Thus, this process keeps transferring requested sectors from read cache to the host until all requested sectors have been transferred.; 0048 - flash memory that uses a metapage that contains 8 sectors of data. A flash 703 has a data cache that holds 8 sectors which is equal to the amount of data in one metapage of flash 703); and
when the first variable is greater than the first accumulation threshold, performing operations of a second mode for reading the first records associated with the first group number and the first section number from the H2F table in the flash module, and storing the first records in the RAM (eg., 0043 Fig. 5, 6A 6B – Once the requested sector is in read cache, it is transferred to the host 518)
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the buffered read requests from flash media as disclosed by Reiter with Ke, with Conley, providing the benefit of efficiently manage the memory, blocks may be linked together to form virtual blocks or metablocks (see Conley, 0009) improves efficiency of read and write operations involving small amounts of data in an NVM (0015) additional data is identified as being data that the host is likely to request in a subsequent command. The additional data may simply be the next sequential data in the memory array (00178).
Claim 10. Reiter discloses A non-transitory computer-readable storage medium having stored therein program code that, when loaded and executed by a processing unit, causes the processing unit to: (eg., 0059, 0069 - host requests to read data from flash media 118, buffer layer 210 might temporarily store the data in buffer 114 until host layer 202 coordinates sending the data to the host via communication link 102.), comprising:
obtain a first group number and a first section number associated with a logical address carried in a first host read command (eg., 0063 Fig. 4a - FTL 208 derives LBN 406 by dividing LSN 404 by a number of sectors per block of flash media 118. FTL 208 derives LPN 408 by dividing LSN 404 by a number of sectors per page of flash media 118. LBN 406 in turn corresponds to Superblock number 410 and block index 412, while LPN 408 corresponds to page index 414.).
Reiter does not disclose, but Ke discloses
determine whether a first variable corresponding to a first mode is less than or equal to a first accumulation threshold, wherein the first variable stores a total number that mapping records temporarily stored in a random access memory (RAM) are judged as a low-usage state during the first mode (0036 - When the respective access counts {AC} (e.g., {3, 5}) of certain logical addresses {L_ADD} reach (e.g. greater than or equal to) the average value AC_avg such as 2.5, the memory controller 110 can determine that the access probability of the logical addresses {L_ADD} reaches the average access probability,; 0022 - wherein each block in the multiple blocks can comprise multiple pages (e.g., data pages), and an access operation (e.g., reading or writing) can be performed on one or more pages);
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the buffered read requests from flash media as disclosed by Reiter with Ke, providing the benefit of performing block management regarding a non-volatile (NV) memory and associated apparatus such as a memory device, a memory controller of the memory device (see Ke, 0006).
Reiter in view of Ke does not disclose, but Conley discloses
when the first variable is less than or equal to the first accumulation threshold, perform operations of the first mode for reading a plurality of first records associated with the first group number and the first section number and a plurality of second records associated with the first group number and a second section number from a host-address to flash-address mapping (H2F) table in a flash module, and storing the first records and the second records in the RAM, wherein the first records store mapping information about which physical address where user data associated with each of a plurality of first logical addresses is actually stored in an order of the first logical addresses, the second records are located after the first records, and the second records store mapping information about which physical address where user data associated with each of a plurality of second logical addresses is actually stored in an order of the second logical addresses (eg., 0043 Fig. 5, 6A 6B - Where a new command is received it is first determined if it is a read command 510. If it is not, then the command is executed 512 without RLA operations. For a read command, if it is determined that a requested sector is not in read cache 514, the process waits for it to be transferred from flash to the read cache 516. Once the requested sector is in read cache, it is transferred to the host 518. If more sectors are to be read 519 then the process repeats this sequence for subsequent sectors. Thus, this process keeps transferring requested sectors from read cache to the host until all requested sectors have been transferred.; 0048 - flash memory that uses a metapage that contains 8 sectors of data. A flash 703 has a data cache that holds 8 sectors which is equal to the amount of data in one metapage of flash 703); and
when the first variable is greater than the first accumulation threshold, perform operations of a second mode for reading the first records associated with the first group number and the firstsection number from the H2F table in the flash module, and storing the first records in the RAM (eg., 0043 Fig. 5, 6A 6B – Once the requested sector is in read cache, it is transferred to the host 518)
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the buffered read requests from flash media as disclosed by Reiter with Ke, with Conley, providing the benefit of efficiently manage the memory, blocks may be linked together to form virtual blocks or metablocks (see Conley, 0009) improves efficiency of read and write operations involving small amounts of data in an NVM (0015) additional data is identified as being data that the host is likely to request in a subsequent command. The additional data may simply be the next sequential data in the memory array (00178).
Claim 15. Reiter discloses An apparatus for accelerating execution of host read commands (eg., 0059, 0069 - host requests to read data from flash media 118, buffer layer 210 might temporarily store the data in buffer 114 until host layer 202 coordinates sending the data to the host via communication link 102.), comprising:
a flash interface (I/F), coupled to a flash module (eg., 0058 Fig. 2 - host layer 202 implements protocols to control flow of data between communications link 102 and flash controller 104. For example, host layer 202 might process data access commands from communication link 102 and communicate with flash translation layer),
wherein the flash module is arranged operably to: store a host-address to flash-address mapping (H2F) table, the H2F table comprises a plurality of groups, each group comprises a plurality of sections, each section comprises a plurality of records, each record stores mapping information about which physical address where user data associated with each of a plurality of logical addresses is actually stored in an order of the logical addresses (eg., 0058 Fig. 2 - FTL 208 translates the logical-to-physical addresses (and vice-versa) of data stored in flash media 118; [0062] FIGS. 4a-4d show block diagrams of exemplary data structures employed by FTL 208 for logical-to-physical translation of memory addresses. FIG. 4a shows an exemplary relation of a logical address of data (LBA 402) to a physical address of data (Superblock number 410, Block index 412 and Page Index 414) as managed by FTL 208 of FIG. 2); and
a processing unit, coupled to the flash I/F , arranged operably to: obtain a first group number and a first section number associated with a logical address carried in a first host read command (eg., 0063 Fig. 4a - FTL 208 derives LBN 406 by dividing LSN 404 by a number of sectors per block of flash media 118. FTL 208 derives LPN 408 by dividing LSN 404 by a number of sectors per page of flash media 118. LBN 406 in turn corresponds to Superblock number 410 and block index 412, while LPN 408 corresponds to page index 414.).
Reiter does not disclose, but Ke discloses
determine whether a first variable corresponding to a first mode is less than or equal to a first accumulation threshold, wherein the first variable stores a total number that mapping records temporarily stored in a random access memory (RAM) are judged as a low-usage state during the first mode (0036 - When the respective access counts {AC} (e.g., {3, 5}) of certain logical addresses {L_ADD} reach (e.g. greater than or equal to) the average value AC_avg such as 2.5, the memory controller 110 can determine that the access probability of the logical addresses {L_ADD} reaches the average access probability,; 0022 - wherein each block in the multiple blocks can comprise multiple pages (e.g., data pages), and an access operation (e.g., reading or writing) can be performed on one or more pages);
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the buffered read requests from flash media as disclosed by Reiter with Ke, providing the benefit of performing block management regarding a non-volatile (NV) memory and associated apparatus such as a memory device, a memory controller of the memory device (see Ke, 0006).
Reiter in view of Ke does not disclose, but Conley discloses
when the first variable is less than or equal to the first accumulation threshold, perform operations of the first mode for driving the flash I/F to read a plurality of first records associated with the first group number and the first section number and a plurality of second records associated with the first group number and a second sectionnumber from the H2F table in the flash module, and storing the first records and the second records in the RAM, wherein the second records are located after the first records (eg., 0043 Fig. 5, 6A 6B - Where a new command is received it is first determined if it is a read command 510. If it is not, then the command is executed 512 without RLA operations. For a read command, if it is determined that a requested sector is not in read cache 514, the process waits for it to be transferred from flash to the read cache 516. Once the requested sector is in read cache, it is transferred to the host 518. If more sectors are to be read 519 then the process repeats this sequence for subsequent sectors. Thus, this process keeps transferring requested sectors from read cache to the host until all requested sectors have been transferred.; 0048 - flash memory that uses a metapage that contains 8 sectors of data. A flash 703 has a data cache that holds 8 sectors which is equal to the amount of data in one metapage of flash 703); and
when the first variable is greater than the first accumulation threshold, perform operations of a second mode for driving the flash I/F to read the first records associated with the first group number and the first section number from the H2F table in the flash module, and storing the first records in the RAM (eg., 0043 Fig. 5, 6A 6B – Once the requested sector is in read cache, it is transferred to the host 518)
It would have been obvious to one of ordinary skill in the art prior to the filing date of the claimed invention to modify the buffered read requests from flash media as disclosed by Reiter with Ke, with Conley, providing the benefit of efficiently manage the memory, blocks may be linked together to form virtual blocks or metablocks (see Conley, 0009) improves efficiency of read and write operations involving small amounts of data in an NVM (0015) additional data is identified as being data that the host is likely to request in a subsequent command. The additional data may simply be the next sequential data in the memory array (00178).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to GAUTAM SAIN whose telephone number is (571)270-3555. The examiner can normally be reached M-F 9-5.
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/GAUTAM SAIN/Primary Examiner, Art Unit 2135