DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
EXAMINER’S AMENDMENT
An examiner’s amendment to the record appears below. Should the changes and/or additions be unacceptable to applicant, an amendment may be filed as provided by 37 CFR 1.312. To ensure consideration of such an amendment, it MUST be submitted no later than the payment of the issue fee.
The application has been amended as follows:
(Currently amended) [[8]]9. The apparatus of claim 1, wherein the one or more ingress control circuits are to provide one or more control signals associated with: distributing first packet data of the one or more packets to a first sub-crossbar domain of the plurality of sub-crossbar domains; and distributing second packet data of the one or more packets to a second sub-crossbar domain of the plurality of sub-crossbar domains.
(Currently amended) [[9]]10. The apparatus of claim 1, wherein the crossbar circuit is to: route first packet data of the one or more packets, via a first sub-crossbar domain of the plurality of sub-crossbar domains, to a multiplexer device associated with an egress domain of the one or more egress domains; and route second packet data of the one or more packets, via a second sub-crossbar domain of the plurality of sub-crossbar domains, to the multiplexer device.
(Currently amended) 11[[0]]. The apparatus of claim 1, wherein the crossbar circuit comprises: a multiplexer device to, based on one or more control signals from an ingress control circuit of the one or more ingress control circuits, provide packet data of the one or more packets to a sub-crossbar domain of the plurality of sub-crossbar domains; and a second multiplexer device to distribute the packet data among buffers of the sub-crossbar domain.
(Currently amended) 12[[1]]. An apparatus comprising: a crossbar circuit that routes one or more packets between one or more ingress domains and one or more egress domains associated with the apparatus, wherein the crossbar circuit comprises a plurality of sub-crossbar domains; and processing circuitry to: distribute, by one or more ingress control circuits associated with the one or more ingress domains, packet data of the one or more packets to the plurality of sub-crossbar domains; and receive, by an egress control circuit associated with an egress domain of the one or more egress domains, data bits associated with the packet data from egresses associated with the plurality of sub-crossbar domains.
(Currently amended) 18[[2]]. A switching device comprising: a crossbar circuit comprising a plurality of sub-crossbar domains; and one or more ingress control circuits that are to distribute packet data of one or more packets to the plurality of sub-crossbar domains; and an egress control circuit that is to receive data bits associated with the packet data from egresses associated with the plurality of sub-crossbar domains.
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Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-5, 7, 9, 12-16 and 18-20 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Jain et al. U.S. Patent Publication 11,070,474.
Claim 1,
Jain discloses
An apparatus comprising:
a crossbar circuit that routes one or more packets between one or more ingress domains and one or more egress domains associated with the apparatus (fig. 3, item 118, also see col 10 lines 5-20), wherein the crossbar circuit comprises a plurality of sub-crossbar domains (Fig. 1, item 122a-c- the fabric planes are mapped to the sub-crossbar domains);
one or more ingress control circuits associated with the one or more ingress domains, wherein the one or more ingress control circuits are to distribute packet data of the one or more packets to the plurality of sub-crossbar domains (Fig.3, item 128A); and
an egress control circuit associated with an egress domain of the one or more egress domains, wherein the egress control circuit is to receive data bits associated with the packet data from egresses associated with the plurality of sub-crossbar domains (Fig. 3,128B).
Claim 2,
the one or more ingress control circuits are to spread the packet data of the one or more packets among the plurality of sub-crossbar domains based on at least one criterion. (Col 10, lines 5-20- Fabric endpoint 120A transmits each such request across a different one of fabric planes 122 in a round-robin or other balancing order to fairly distribute the transport load as described in further detail below.)
Claim 3,
wherein the one or more ingress control circuits are to spread the packet data of the one or more packets among the plurality of sub-crossbar domains based on: a random spreading of the packet data among the plurality of sub-crossbar domains; a pseudo-random spreading of the packet data among the plurality of sub-crossbar domains; a flow hash based spreading of the packet data among the plurality of sub-crossbar domains; a bandwidth spreading of the packet data among the plurality of sub-crossbar domains; a cyclic based spreading of the packet data among the plurality of sub-crossbar domains; buffer occupancy associated with the plurality of sub-crossbar domains; or a combination thereof. (Col 10, lines 5-20- Fabric endpoint 120A transmits each such request across a different one of fabric planes 122 in a round-robin or other balancing order to fairly distribute the transport load as described in further detail below.)
Claim 4,
the packet data of the one or more packets is spread among buffers associated with at least one sub-crossbar domain of the plurality of sub-crossbar domains based on: one or more control signals from an ingress control circuit of the one or more ingress control circuits; or one or more second control signals from processing circuitry of the crossbar circuit.(Col 11, lines 8-11- Each traffic shaper regulates packet rate across all the ingress ports associated with the corresponding ingress arbiter. )
Claim 5,
wherein the one or more ingress control circuits are to: set respective buffer thresholds associated with a plurality of buffers allocated to the plurality of sub-crossbar domains; and distribute the packet data among the plurality of buffers based on satisfying at least one buffer threshold of the respective buffer thresholds. (Col 14 lines 28-50- In some examples, occupancy threshold T may be fixed through the life of an application. Packet processor 24A may create a vector for subchannels having occupancy less than the programmed value T. For example, packet processor 24A may set a bit corresponding to a subchannel to logical ‘1’ if the subchannel has total occupancy less than T and reset the bit corresponding to the subchannel to logical ‘0’ if the subchannel has total occupancy of not less than T.
When performing high priority round robin arbitration 512, packet processor 24A performs a bit-wise AND operation 514 with per-subchannel occupancy 520 and greater than zero vector 506. The resulting vector acts as an input for high priority round robin arbitration 512. For example, to select a subchannel, packet processor 24A may determine the credit count assigned to the selected subchannel in greater than zero vector 506 is greater than a credit threshold (e.g., zero) and determine per-subchannel occupancy 520 for the selected subchannel is less than an occupancy threshold (e.g., T). Said differently, for example, packet processor 24A may pick the next subchannel that satisfies both the greater than a credit threshold and the occupancy threshold (e.g., T). In this example, if the next subchannel does not satisfy both the greater than a credit threshold and the occupancy threshold (e.g., T), then packet processor 24A may move to the next subchannel.)
Claim 7 ,
further comprising: one or more queueing circuits comprising a dispatcher circuit, wherein the dispatcher circuit is to spread a set of transmission jobs among the plurality of sub-crossbar domains (Col 10- lines 32-40- the load module performs the function of a queueing circuit comprising a dispatcher circuit. Also see col 12 lines 1-25),
and wherein the set of transmission jobs are associated with routing the packet data of the one or more packets between a buffer domain of each sub-crossbar domain and the one or more egress domains (Col 12, lines 1-25, the transmission jobs are mapped to the packets distributed across the switch fabrics, also see fig. 3).
Claim 12,
Jain discloses
An apparatus comprising:
a crossbar circuit that routes one or more packets between one or more ingress domains and one or more egress domains associated with the apparatus fig. 3, item 118), wherein the crossbar circuit comprises a plurality of sub-crossbar domains (Fig. 1, item 122a-c- the fabric planes are mapped to the sub-crossbar domains); and
processing circuitry to:
distribute, by one or more ingress control circuits associated with the one or more ingress domains, packet data of the one or more packets to the plurality of sub-crossbar domains (Fig.3, item 128A); and
receive, by an egress control circuit associated with an egress domain of the one or more egress domains, data bits associated with the packet data from egresses associated with the plurality of sub-crossbar domains (Fig. 3,128B).
Claim 13,
wherein the processing circuitry is to further: spread, by the one or more ingress control circuits, the packet data of the one or more packets among the plurality of sub-crossbar domains based on at least one criterion (Col 10, lines 5-20- Fabric endpoint 120A transmits each such request across a different one of fabric planes 122 in a round-robin or other balancing order to fairly distribute the transport load as described in further detail below.).
Claim 14,
wherein the processing circuitry is to further: spread, by the one or more ingress control circuits, the packet data of the one or more packets among the plurality of sub-crossbar domains based on: a random spreading of the packet data among the plurality of sub-crossbar domains; a pseudo-random spreading of the packet data among the plurality of sub-crossbar domains; a flow hash based spreading of the packet data among the plurality of sub-crossbar domains; a bandwidth spreading of the packet data among the plurality of sub-crossbar domains; a cyclic based spreading of the packet data among the plurality of sub crossbar domains; buffer occupancy associated with each sub-crossbar domain of the plurality of sub-crossbar domains; or a combination thereof. (Col 10, lines 5-20- Fabric endpoint 120A transmits each such request across a different one of fabric planes 122 in a round-robin or other balancing order to fairly distribute the transport load as described in further detail below.)
Claim 15,
wherein: the packet data of the one or more packets is spread among buffers associated with at least one sub-crossbar domain of the plurality of sub-crossbar domains based on: one or more control signals from an ingress control circuit of the one or more ingress control circuits; or one or more second control signals from processing circuitry of the crossbar circuit. (Col 11, lines 8-11- Each traffic shaper regulates packet rate across all the ingress ports associated with the corresponding ingress arbiter. )
Claim 16,
wherein the processing circuitry is to further: set, by the one or more ingress control circuits, respective buffer thresholds associated with a plurality of buffers allocated to the plurality of sub-crossbar domains; and distribute, by the one or more ingress control circuits, the packet data among the plurality of buffers based on satisfying at least one buffer threshold of the respective buffer thresholds. (Col 14 lines 28-50- In some examples, occupancy threshold T may be fixed through the life of an application. Packet processor 24A may create a vector for subchannels having occupancy less than the programmed value T. For example, packet processor 24A may set a bit corresponding to a subchannel to logical ‘1’ if the subchannel has total occupancy less than T and reset the bit corresponding to the subchannel to logical ‘0’ if the subchannel has total occupancy of not less than T.
When performing high priority round robin arbitration 512, packet processor 24A performs a bit-wise AND operation 514 with per-subchannel occupancy 520 and greater than zero vector 506. The resulting vector acts as an input for high priority round robin arbitration 512. For example, to select a subchannel, packet processor 24A may determine the credit count assigned to the selected subchannel in greater than zero vector 506 is greater than a credit threshold (e.g., zero) and determine per-subchannel occupancy 520 for the selected subchannel is less than an occupancy threshold (e.g., T). Said differently, for example, packet processor 24A may pick the next subchannel that satisfies both the greater than a credit threshold and the occupancy threshold (e.g., T). In this example, if the next subchannel does not satisfy both the greater than a credit threshold and the occupancy threshold (e.g., T), then packet processor 24A may move to the next subchannel.)
Claim 18,
Jain discloses
A switching device comprising:
a crossbar circuit comprising a plurality of sub-crossbar domains (fig. 3); and
one or more ingress control circuits that are to distribute packet data of one or more packets to the plurality of sub-crossbar domains (Fig.3, item 128A- mapped to the ingress circuits item 118- mapped to the sub-crossbars); and
an egress control circuit that is to receive data bits associated with the packet data from egresses associated with the plurality of sub-crossbar domains. (Fig. 3,128B)
Claim 19 ,
wherein the one or more ingress control circuits are to spread the packet data of the one or more packets among the plurality of sub-crossbar domains based on at least one criterion. (Col 10, lines 5-20- Fabric endpoint 120A transmits each such request across a different one of fabric planes 122 in a round-robin or other balancing order to fairly distribute the transport load as described in further detail below.)
Claim 20,
wherein the packet data of the one or more packets is spread among buffers associated with at least one sub-crossbar domain of the plurality of sub-crossbar domains based on: one or more control signals from an ingress control circuit of the one or more ingress control circuits; or one or more second control signals from processing circuitry of the crossbar circuit. (Col 11, lines 8-11- Each traffic shaper regulates packet rate across all the ingress ports associated with the corresponding ingress arbiter. )
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Jain et al. U.S. Patent Publication 11,070,474 in view of Fleming et al. U.S. Patent Application Publication 2019/0007332.
Claim 10,
Jain discloses
wherein the crossbar circuit is to:
route first packet data of the one or more packets, via a first sub-crossbar domain of the plurality of sub-crossbar domains, to a device associated with an egress domain of the one or more egress domains (fig.3- disclose a plurality of Fabric planes routing packets to endpoint 120B);
and route second packet data of the one or more packets, via a second sub-crossbar domain of the plurality of sub-crossbar domains, to the device (fig.3- disclose a plurality of Fabric planes routing packets to endpoint 120B).
Although Jain discloses substantial limitations of the claimed invention, it fails to disclose
The endpoint devices are multiplexers
In an analogous art, Fleming discloses
The endpoint devices are multiplexers (para 0136- a multiplexer is associated with an egress of the switch fabric which transmitters data from the egress buffer)
One of ordinary skill in the art before the effective filing date of the invention would find it obvious to combine the multiplexer of Fleming with the Jain system to produce the predictable result of routing packets through a multiplex associated with a egress domain.
Double Patenting
A rejection based on double patenting of the “same invention” type finds its support in the language of 35 U.S.C. 101 which states that “whoever invents or discovers any new and useful process... may obtain a patent therefor...” (Emphasis added). Thus, the term “same invention,” in this context, means an invention drawn to identical subject matter. See Miller v. Eagle Mfg. Co., 151 U.S. 186 (1894); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Ockert, 245 F.2d 467, 114 USPQ 330 (CCPA 1957).
A statutory type (35 U.S.C. 101) double patenting rejection can be overcome by canceling or amending the claims that are directed to the same invention so they are no longer coextensive in scope. The filing of a terminal disclaimer cannot overcome a double patenting rejection based upon 35 U.S.C. 101.
Claims 8 and 17 are rejected under 35 U.S.C. 101 as claiming the same invention as that of claims 8 and 12 of prior U.S. Patent No. 12,273,281. This is a statutory double patenting rejection.
Claims 1-7, 9-16 and 18-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-16 of U.S. Patent No. 12,273,281. Although the claims at issue are not identical, they are not patentably distinct from each other because claims 1-6 of U.S. Patent No. 12,273,281 disclose all of the limitations of Claims 1-6 of the present application.
Claims 9-16 of U.S. Patent No. 12,273,281 disclose all of the limitations of Claims 9-16 of the present application.
Claims 17-18 of U.S. Patent No. 12,273,281 disclose all of the limitations of Claims 18-20 of the present application. The limitations of claim 20 in the present application are disclosed by the crossbar circuitry of claim 17 of U.S. Patent No. 12,273,281.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOSEPH M COUSINS whose telephone number is (571)270-7746. The examiner can normally be reached 9:00am -5:00pm EST.
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/JMC/Examiner, Art Unit 2459
/TONIA L DOLLINGER/Supervisory Patent Examiner, Art Unit 2459
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