DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
2. This action is in response to application filed on January 17, 2025.
Information Disclosure Statement
3. The information disclosure statements (IDS) submitted on 8/19/2025 and 10/15/2025 have been considered by the examiner.
Priority
4. Receipt is acknowledged of certified copies of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Drawings
5. The drawings were received on January 17, 2025. These drawings are accepted.
Claim Rejections - 35 USC § 102
6. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
7. Claims 1-2 and 14-15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al (US 9,939,830).
Regarding claim 1, Lee et al discloses a power supply circuit (i.e. circuit of Figure 2), comprising:
a first voltage converter (Fig. 2, first voltage regulating unit 132);
a second voltage converter (Fig. 2, LDO voltage regulating unit 131);
a first low dropout regulator (Fig. 2, second voltage regulating unit 133), wherein an output end (Fig. 2, output terminal from second voltage regulating unit 133) of the first low dropout regulator (Fig. 2, second voltage regulating unit 133) is electrically connected to a first load end (Fig. 2, input terminal of back-end device 3); and
a multiplexing module (Fig. 2, circuit of input voltage detecting unit 11 and switch controlling unit 12) configured to connect, based on a power-on state (i.e. enable signal En at a high-level inputted to LDO voltage regulating unit 131) and a power-off state of the second voltage converter (Fig. 2, LDO voltage regulating unit 131), one of an output end of the first voltage converter and an output end of the second voltage converter (Fig. 2, LDO voltage regulating unit 131) to the first load end (Fig. 2, input terminal of back-end device 3) through the first low dropout regulator (Fig. 2, second voltage regulating unit 133) (i.e. setting an enable signal En to be a high-level signal, and then inputting the enable signal En to the switch unit 134 and the LDO voltage regulating unit 131 enables operation mode where regulating unit 131 outputs through switch unit 134 to the first low dropout regulator 133. See column 7, lines 39 to column 8, line 15).
Regarding claim 2, Lee et al further discloses wherein the multiplexing module (Fig. 2, circuit of input voltage detecting unit 11 and switch controlling unit 12) is configured to:
when the second voltage converter (Fig. 2, LDO voltage regulating unit 131) is in the power-off state (i.e. enable signal En at a low-level inputted to LDO voltage regulating unit 131), disconnect the output end of the second voltage converter (Fig. 2, LDO voltage regulating unit 131) from the first load end (Fig. 2, input terminal of back-end device 3) and connect the output end of the first voltage converter (Fig. 2, first voltage regulating unit 132) to the first load end (Fig. 2, input terminal of back-end device 3) (i.e. when enable signal En is set to a low-level, sleep mode is enabled and first voltage regulating unit 132 sends its output to second voltage regulating unit 133 via switch 134 instead of LDO voltage regulating unit 131. See column 7, lines 39 to column 8, line 15); and
when the second voltage converter (Fig. 2, LDO voltage regulating unit 131) is in the power-on state (i.e. enable signal En at a high-level inputted to LDO voltage regulating unit 131), connect the output end of the second voltage converter (Fig. 2, LDO voltage regulating unit 131) to the first load end (Fig. 2, input terminal of back-end device 3) and disconnect the output end of the first voltage converter (Fig. 2, first voltage regulating unit 132) from the first load end (Fig. 2, input terminal of back-end device 3) (i.e. setting an enable signal En to be a high-level signal, and then inputting the enable signal En to the switch unit 134 and the LDO voltage regulating unit 131 enables operation mode where regulating unit 131 outputs through switch 134 to the first low dropout regulator 133. See column 7, lines 39 to column 8, line 15).
Regarding claim 14, Lee et al discloses a control method for a power supply circuit (i.e. circuit of Figure 2) having a first voltage converter (Fig. 2, first voltage regulating unit 132), a second voltage converter (Fig. 2, LDO voltage regulating unit 131), and a first low dropout regulator (Fig. 2, second voltage regulating unit 133), wherein an output end (Fig. 2, output terminal from second voltage regulating unit 133) of the first low dropout regulator (Fig. 2, second voltage regulating unit 133) is electrically connected to a first load end (Fig. 2, input terminal of back-end device 3), the control method comprising:
connecting, based on a power-on state (i.e. enable signal En at a high-level inputted to LDO voltage regulating unit 131) and a power-off state of the second voltage converter (Fig. 2, LDO voltage regulating unit 131), one of an output end of the first voltage converter and an output end of the second voltage converter (Fig. 2, LDO voltage regulating unit 131) to the first load end (Fig. 2, input terminal of back-end device 3) through the first low dropout regulator (Fig. 2, second voltage regulating unit 133) (i.e. setting an enable signal En to be a high-level signal, and then inputting the enable signal En to the switch unit 134 and the LDO voltage regulating unit 131 enables operation mode where regulating unit 131 outputs through switch unit 134 to the first low dropout regulator 133. See column 7, lines 39 to column 8, line 15).
Regarding claim 15, Lee et al further discloses wherein:
the connecting, based on a power-on state (i.e. enable signal En at a high-level inputted to LDO voltage regulating unit 131) and a power-off state of the second voltage converter (Fig. 2, LDO voltage regulating unit 131), one of an output end of the first voltage converter and an output end of the second voltage converter (Fig. 2, LDO voltage regulating unit 131) to the first load end (Fig. 2, input terminal of back-end device 3) through the first low dropout regulator (Fig. 2, second voltage regulating unit 133) (i.e. setting an enable signal En to be a high-level signal, and then inputting the enable signal En to the switch unit 134 and the LDO voltage regulating unit 131 enables operation mode where regulating unit 131 outputs through switch unit 134 to the first low dropout regulator 133. See column 7, lines 39 to column 8, line 15) comprises:
when the second voltage converter (Fig. 2, LDO voltage regulating unit 131) is in the power-off state (i.e. enable signal En at a low-level inputted to LDO voltage regulating unit 131), disconnecting the second voltage converter (Fig. 2, LDO voltage regulating unit 131) from the first load end (Fig. 2, input terminal of back-end device 3) and connecting the output end of the first voltage converter (Fig. 2, first voltage regulating unit 132) to the first load end (Fig. 2, input terminal of back-end device 3) (i.e. when enable signal En is set to a low-level, sleep mode is enabled and first voltage regulating unit 132 sends its output to second voltage regulating unit 133 via switch 134 instead of LDO voltage regulating unit 131. See column 7, lines 39 to column 8, line 15); and
when the second voltage converter (Fig. 2, LDO voltage regulating unit 131) is in the power-on state (i.e. enable signal En at a high-level inputted to LDO voltage regulating unit 131), connecting the output end of the second voltage converter (Fig. 2, LDO voltage regulating unit 131) to the first load end (Fig. 2, input terminal of back-end device 3) and disconnecting the output end of the first voltage converter (Fig. 2, first voltage regulating unit 132) from the first load end (Fig. 2, input terminal of back-end device 3) (i.e. setting an enable signal En to be a high-level signal, and then inputting the enable signal En to the switch unit 134 and the LDO voltage regulating unit 131 enables operation mode where regulating unit 131 outputs through switch 134 to the first low dropout regulator 133. See column 7, lines 39 to column 8, line 15).
Claim Rejections - 35 USC § 103
8. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
9. Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Lee et al (US 9,939,830) in view of Kim et al (US 2020/0310477).
Regarding claim 13, Lee et al discloses a first voltage converter (Fig. 2, first voltage regulating unit 132) and a second voltage converter (Fig. 2, LDO voltage regulating unit 131).
Lee et al fails to explicitly disclose wherein both the first voltage converter and the second voltage converter are buck converters.
However, Kim et al discloses where a first voltage converter (Fig. 4, first DC-DC converter 211) and a second voltage converter (Fig. 4, first DC-DC converter 211) are buck converters (i.e. DC-DC converters can be step-down converters or buck converters. See ¶[0027] and [0080]).
Therefore, it would have been obvious, to one having ordinary skill in the art, at the effective filing date of the claimed invention, to have modified the circuit of Lee et al, by including buck converters, as taught by Kim et al, in order to obtain a circuit to step-down voltages and achieve various design purposes.
Allowable Subject Matter
10. Claims 3-12 and 16-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
11. The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 3, the prior art fails to disclose or suggest the emboldened and italicized features below:
A power supply circuit, wherein:
in a first time period, the first voltage converter is in a power-on state and the second voltage converter is in the power-on state; and
in a second time period, the first voltage converter is in the power-on state, and the second voltage converter is in the power-off state.
Regarding claim 4, the prior art fails to disclose or suggest the emboldened and italicized features below:
A power supply circuit, wherein:
when the second voltage converter is in the power-on state, an output voltage of the second voltage converter is VI and an output voltage of the first voltage converter is V2, where V l<V2.
Regarding claims 5-6 and 8-11, the prior art fails to disclose or suggest the emboldened and italicized features below:
A power supply circuit, wherein the multiplexing module comprises:
a first switch module, wherein a first end of the first switch module is electrically connected to the output end of the first voltage converter and a second end of the first switch module is electrically connected to the first load end;
a second switch module, wherein a first end of the second switch module is electrically connected to the output end of the second voltage converter and a second end of the second switch module is electrically connected to the first load end; and
a control circuit configured to turn off the first switch module when the second voltage converter is in the power-on state and turn off the second switch module when the second voltage converter is in the power-off state.
Regarding claim 7, the prior art fails to disclose or suggest the emboldened and italicized features below:
A power supply circuit, wherein the multiplexing module comprises:
a first switch module connected in series between an input end of the first low dropout regulator and the output end of the first voltage converter; and
a second switch module connected in series between the input end of the first low dropout regulator and the output end of the second voltage converter; and
the multiplexing module is configured to:
when the second voltage converter is in the power-on state, turn off the first switch module and turn on the second switch module; and
when the second voltage converter is in the power-off state, turn off the second switch module and turn on the first switch module.
Regarding claim 12, the prior art fails to disclose or suggest the emboldened and italicized features below:
A power supply circuit, further comprising:
a second load end connected to the output end of the second voltage converter;
a third low dropout regulator, wherein an input end of the third low dropout regulator is electrically connected to the output end of the first voltage converter, and an output end of the third low dropout regulator is electrically connected to a third load end; and
a fourth low dropout regulator, wherein an input end of the fourth low dropout regulator is electrically connected to the output end of the second voltage converter, and an output end of the fourth low dropout regulator is electrically connected to a fourth load end.
Regarding claim 16, the prior art fails to disclose or suggest the emboldened and italicized features below:
A method, wherein:
in a first time period, the first voltage converter is in a power-on state and the second voltage converter is in the power-on state; and
in a second time period, the first voltage converter is in the power-on state and the second voltage converter is in the power-off state.
Regarding claims 17-20, the prior art fails to disclose or suggest the emboldened and italicized features below:
A method, wherein:
when the second voltage converter is in the power-on state, an output voltage of the second voltage converter is V1, and an output voltage of the first voltage converter is V2, where V1<V2.
Conclusion
12. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Lin et al (US 2021/0096586) deals with a low-dropout (LDO) regulator, Ho et al (US 10,627,839) deals with multiple input multiple output regulator control systems, Cowell et al (US 2008/0122416) deals with a dual input prioritized regulator, and Currelly et al (US 6,661,211) deals with a quick-start DC-DC converter circuit and method.
13. Any inquiry concerning this communication or earlier communications from the examiner should be directed to GARY NASH whose telephone number is (571) 270-3349. The examiner can normally be reached on Monday-Friday 8am-4pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner‘s supervisor, Thienvu Tran can be reached on (571) 270-1276. The fax number for the organization where this application or proceeding is assigned is 571-273-8300.
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/GARY A NASH/Primary Examiner, Art Unit 2838
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