DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Allowable Subject Matter
Subject to the double patenting and §112 rejection below, claims 7-11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Double Patenting
Claims 1-11 are rejected on the ground of nonstatutory obviousness-type double patenting as being unpatentable over claims 1-9 of U.S. Patent No. 12,238,436.
The new claims map to the parent claims as follows:
New Parent
1 1
2 3
3 7
4 8
5 9
6 1, 3
7 2
8 3
9 4
10 5
11 6
Although the conflicting claims are not identical, they are not patentably distinct from each other because the examined application claim would have been obvious over the parent claims. Both sets of claims are directed to a method of voltage management for an endoscopic image sensor, and one of ordinary skill would see the claims in question as obvious variants of each other.
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees.
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the conflicting application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement.
Effective January 1, 1994, a registered attorney or agent of record may sign a terminal disclaimer. A terminal disclaimer signed by the assignee must fully comply with 37 CFR 3.73(b).
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 9-11 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention, because claim 9 recites “the second reference voltage” without antecedent basis.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 and 3-6 are rejected under 35 U.S.C. 103 as being unpatentable over Shigehisa et al., US 2018/0199003 in view of Adachi, US 2016/0213238.
Claims 1 and 5. Shigehisa teaches a camera unit and method, comprising:
an image sensor configured to receive a first power source voltage [power supply P supplies V1, Fig. 1, paras. 18, 22-24, 57, 70] transferred by a power source line [L1, Fig. 1] as a second power source voltage [distal end portion voltage V1D, Fig. 1, para. 59, 71-77] and generate a video signal by using the second power source voltage [image pickup 21, Fig. 1, paras. 18-23, 32];
a reference voltage generation circuit configured to generate a first reference voltage [ground is a reference voltage that designates zero volts; other voltages are relative (referenced) to ground; ground is based on GND in distal portion, Fig. 1, para. 26];
a conversion circuit configured to convert the second power source voltage so as to generate a voltage signal having a first voltage indicating the second power source voltage [V1d is converted to V1s by line Fb, Fig. 1, paras. 61, 64]; and
signal output circuit configured to output the video signal [paras. 22-24], a reference signal having the first reference voltage [GND on line G2, Fig. 1, para. 26], and the voltage signal [V1s is output on line Fb, Fig. 1, 39, 61, 64].
Shigehisa is silent on outputting different signals on one line, i.e. multiplexing the signals. Adachi teaches a signal output circuit configured to output a video signal [imaging signal output, Fig. 2, paras. 51, 52] and a reference signal having the first reference voltage [reference signal, based on a reference voltage, is transmitted in different period from same output (e.g. reading unit 24), Fig. 2, paras. 51, 52, 113; note imaging signal has a frame rate, para. 108, 127, 128] to a video signal line [signals are time-multiplexed for output, paras. 51, 52].
Before the effective filing date of the claimed invention, it would have been obvious to one skilled in the art to transmit the recited signals via a single line by time-division multiplexing them as taught in Adachi, to minimize the wiring needed to pass from the distal end to the apparatus body. This saves space in the insertion portion, allowing for small size and saving room for other components.
3. Shigehisa teaches the output of a video signal [paras. 22-24], a reference signal having the first reference voltage [GND on line G2, Fig. 1, para. 26], and the voltage signal [V1s is output on line Fb, Fig. 1, 39, 61, 64].
Adachi teaches outputting different signals in different respective time periods as recited [paras. 51, 52].
4. Adachi teaches an endoscope of which a distal end is to be inserted into a living body, the endoscope comprising the camera unit according to claim 1, wherein the camera unit is disposed in the distal end [Figs. 1, 2, paras. 24-29].
6. Shigehisa teaches a camera unit and method, comprising:
an image sensor configured to receive a first power source voltage [power supply P supplies V1, Fig. 1, paras. 18, 22-24, 57, 70] transferred by a power source line [L1, Fig. 1] as a second power source voltage [distal end portion voltage V1D, Fig. 1, para. 59, 71-77] and generate a video signal by using the second power source voltage [image pickup 21, Fig. 1, paras. 18-23, 32];
a reference voltage generation circuit configured to generate a first reference voltage [ground is a reference voltage that designates zero volts; other voltages are relative (referenced) to ground; ground is based on GND in distal portion, Fig. 1, para. 26];
a conversion circuit configured to convert the second power source voltage so as to generate a voltage signal having a first voltage indicating the second power source voltage [V1d is converted to V1s by line Fb, Fig. 1, paras. 61, 64]; and
signal output circuit configured to output the video signal [paras. 22-24], a reference signal having the first reference voltage [GND on line G2, Fig. 1, para. 26], and the voltage signal [V1s is output on line Fb, Fig. 1, 39, 61, 64].
a control unit including:
a signal reception circuit configured to receive the video signal [receiving section 41, Fig. 1, paras. 24, 28], the reference signal [GND in apparatus body 2, Fig. 1, para. 25] and the voltage signal [control section C receives feedback voltage, Fig. 1, paras. 44, 61];
a calculation circuit configured to calculate a control value used for adjusting a value of the first power source voltage by using the reference signal and the voltage signal [power supply control section C calculates a driving voltage value based on V1s and ground reference, Figs. 1-3, paras. 25, 36, 37, 49, 55];
a power source voltage generation circuit configured to generate the first power source voltage and output the generated first power source voltage to the power source line [power supply P, Figs. 1-3, paras. 55, 56, 63, 64]; and
a voltage adjustment circuit configured to adjust the value of the first power source voltage by controlling the power source voltage generation circuit based on the control value [voltage adjustment sections, Figs. 2, 3, paras. 48, 58, 59, 74].
Shigehisa is silent on outputting different signals on one line, i.e. multiplexing the signals. Adachi teaches a signal output circuit configured to output a video signal [imaging signal output, Fig. 2, paras. 51, 52] and a reference signal having the first reference voltage [reference signal, based on a reference voltage, is transmitted in different period from same output (e.g. reading unit 24), Fig. 2, paras. 51, 52, 113; note imaging signal has a frame rate, para. 108, 127, 128].
Before the effective filing date of the claimed invention, it would have been obvious to one skilled in the art to transmit the recited signals via a single line by time-division multiplexing them as taught in Adachi, to minimize the wiring needed to pass from the distal end to the apparatus body. This saves space in the insertion portion, allowing for small size and saving room for other components.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Shigehisa and Adachi as cited above, further in view of Minakuchi, US 2015/0280550.
2. The above references are silent on converting (adjusting) the second voltage (the voltage applied at the image sensor) to a specified range. Minakuchi teaches a voltage control system for an endoscope wherein a value of the second power source voltage [VL, Fig. 2] is not within a range of a voltage of the video signal, wherein the conversion circuit is configured to convert the second power source voltage into the first voltage having a value within the range so as to generate the voltage signal [when VL is outside the rated voltage, VL is adjusted to be within specified voltage range by adjusting P1/V1 so that VL is within range, Figs. 1, 2, paras. 14, 16, 38-40, 45, 46, 54, 59, 64].
It would have been obvious to one skilled in the art before the effective filing date of the claimed invention to combine the references, maintaining an applied voltage within the specified range of the imager, preventing damage to the imager and ensuring proper operation and usable image signals.
Conclusion
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/TIMOTHY R NEWLIN/Examiner, Art Unit 2424