Prosecution Insights
Last updated: October 02, 2026
Application No. 19/030,674

VISION SENSORS, IMAGE PROCESSING DEVICES INCLUDING THE VISION SENSORS, AND OPERATING METHODS OF THE VISION SENSORS

Non-Final OA §DP
Filed
Jan 17, 2025
Priority
Jun 26, 2019 — RE 10-2019-0076347 +4 more
Examiner
OSINSKI, MICHAEL S
Art Unit
Tech Center
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
76%
Grant Probability
Favorable
1-2
OA Rounds
1y 1m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allowance Rate
479 granted / 634 resolved
+15.6% vs TC avg
Strong +23% interview lift
Without
With
+23.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
15 currently pending
Career history
644
Total Applications
across all art units

Statute-Specific Performance

§101
6.5%
-33.5% vs TC avg
§103
45.7%
+5.7% vs TC avg
§102
23.9%
-16.1% vs TC avg
§112
18.7%
-21.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 634 resolved cases

Office Action

§DP
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION 1. The following Office action is in response to communications filed on 2/25/2025. Claims 21-40 are currently pending within this application. Information Disclosure Statement 2. The information disclosure statement(s) filed on 1/17/2025, 2/3/2026, 8/3/2026 is/are in compliance with the provisions of 37 CFR 1.97, and has/have been considered and a copy/copies is/are enclosed with this Office action. Foreign Priority 3. Acknowledgement is made of applicant’s claim for foreign priority under 35 U.S.C 119(a-d) based on KR 10-2019-0076347, filed on 6/26/2019. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory obviousness-type double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the conflicting application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. Effective January 1, 1994, a registered attorney or agent of record may sign a terminal disclaimer. A terminal disclaimer signed by the assignee must fully comply with 37 CFR 3.73(b). 4. Claims 21-40 of the instant application are rejected on the grounds of non-statutory double patenting as being unpatentable over claims 21-40 of US Patent Application 19/030665 (hereafter ‘665). 5. Although the conflicting claims are not identical, they are not patentably distinct from each other because the subject matter claimed in the instant application is broader and fully incorporated within the claims of the patented application. Claims 21-40 of the instant application are anticipated in the limitations of claims 21-40 of patent application ‘665. The claims of the instant application are broader than those of cited patent ‘665 and merely omit certain limitations in the claims of the cited patent ‘665. Instant Application Claim 21 US Application 19/030665 Claim 21 A dynamic vision sensor, comprising: a pixel array comprising a plurality of pixels arranged in a matrix, each pixel of the plurality of pixels configured to generate one or more electrical signals in response to a change in intensity of incident light; an event detection circuit configured to receive electrical signals from the pixel array and generate first event signals; an event rate controller configured to transmit a portion of the first event signals when an amount of the first event signals is equal or greater than a reference value; and an interface circuit configured to receive the portion of the first event signals from the event rate controller and transmit the portion of the first event signals as a packet unit or a frame unit to an external device. A dynamic vision sensor, comprising: a pixel array including a plurality of pixels arranged in a matrix, each pixel of the plurality of pixels configured to generate one or more electrical signals in response to a change in intensity of incident light; an event detection circuit configured to receive electrical signals from the pixel array and generate first event signals; an event rate controller configured to transmit a portion of the first event signals when an amount of the first event signals is equal or greater than a reference value; and an interface circuit configured to receive the portion of the first event signals and transmit the portion of the first event signals as a packet unit or a frame unit to an external device, wherein the event rate controller or the event detection circuit is configured to transmit second event signals corresponding to a first limited selection of pixels of the pixel array that are included in a first region of interest of the pixel array as the portion of the first event signals. Table 1 Instant Application Claim 35 US Application 19/030665 Claims 21, 22, and 29 A dynamic vision sensor, comprising: a pixel array including a plurality of pixels arranged in a matrix, each pixel of the plurality of pixels configured to generate one or more electrical signals in response to a change in intensity of incident light; an event detection circuit configured to receive electrical signals from the pixel array and generate first event signals; and an event rate controller configured to control a generation and/or transmission of the first event signals when an amount of the first event signals is equal or greater than a reference value, wherein each pixel of the plurality of pixels includes a photoelectric transformation element, a boosting circuit configured to connect to the photoelectric transformation element, and an amplification transistor, and wherein a gate of the amplification transistor is connected to the photoelectric transformation element. A dynamic vision sensor, comprising: a pixel array including a plurality of pixels arranged in a matrix, each pixel of the plurality of pixels configured to generate one or more electrical signals in response to a change in intensity of incident light; an event detection circuit configured to receive electrical signals from the pixel array and generate first event signals; an event rate controller configured to transmit a portion of the first event signals when an amount of the first event signals is equal or greater than a reference value; and an interface circuit configured to receive the portion of the first event signals and transmit the portion of the first event signals as a packet unit or a frame unit to an external device, wherein the event rate controller or the event detection circuit is configured to transmit second event signals corresponding to a first limited selection of pixels of the pixel array that are included in a first region of interest of the pixel array as the portion of the first event signals, wherein the packet unit or the frame unit includes polarity information of at least one event signal of the portion of the first event signals and a row address of at least one pixel of the pixel array in which the electrical signals are generated, wherein each pixel of the plurality of pixels comprises a photoelectric transformation element, a boosting circuit configured to connect to the photoelectric transformation element, and an amplification transistor, and a gate of the amplification transistor is connected to the photoelectric transformation element Table 2 6. As can be seen in Tables 1-2, each of the claimed limitations of independent claims 21 and 35 of the instant application are included within the claimed limitations of claims 21, 22, and 29 of cited patent application '665. Additionally, claims 22-34 and 36-40 of the instant application are anticipated by claims 21-40 of cited patent application ‘665. Conclusion 7. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL S OSINSKI whose telephone number is (571) 270-3949. The examiner can normally be reached on Monday - Friday, 10:00am - 6:00pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Nay Maung can be reached on 571-272-7882. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. MO /MICHAEL S OSINSKI/Primary Examiner, Art Unit 2674 8/20/2026
Read full office action

Prosecution Timeline

Jan 17, 2025
Application Filed
Feb 25, 2025
Response after Non-Final Action
Aug 24, 2026
Non-Final Rejection mailed — §DP (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12749295
METHOD FOR CREATING A DEEP LEARNING-BASED MODEL AND DEVICE FOR IMPLEMENTING THE MODEL CREATED BY SAID METHOD
2y 1m to grant Granted Sep 29, 2026
Patent 12743897
METHOD FOR AUTOMATICALLY SEARCHING FOR AT LEAST ONE TEXTILE PATTERN IN A COMPOSITE MATERIAL REINFORCEMENT
3y 4m to grant Granted Sep 22, 2026
Patent 12740768
Method for Ultrasonic Panoramic Imaging
2y 1m to grant Granted Sep 22, 2026
Patent 12738101
TECHNIQUES FOR AUTHENTICATING A USER
2y 1m to grant Granted Sep 15, 2026
Patent 12725425
Apparatus For Recognizing Object And Method Thereof
2y 5m to grant Granted Sep 01, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
76%
Grant Probability
99%
With Interview (+23.0%)
2y 9m (~1y 1m remaining)
Median Time to Grant
Low
PTA Risk
Based on 634 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month