DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2 and 6-10 are rejected under 35 U.S.C. 103 as being unpatentable over Kawakami et al. (US 2018/0277305 of record) in view of Park et al. (US 2020/0027661).
Kawakami (e.g. Fig. 1) teaches and electronic component including:
Regarding Claim 2, a stacked body including: a structure in which a plurality of insulator layers (e.g. 3a-3e) are stacked in an up-down direction; a mounting surface oriented in a down direction (e.g. the top surface in Fig. 1 having electrodes 7 and 8 is a bottom/mounting surface when the device is mounted, e.g. see the last lines of [0030]); an upper surface (e.g. the lower surface in Fig. 1) oriented in an up direction; a side surface (e.g. the left and right sides in Fig. 1) located between the mounting surface and the upper surface; a plurality of conductor layers (e.g. 4a-d) provided in the stacked body; and a mounting electrode (e.g. 7, 8) provided on the mounting surface and not provided on the side surface, the upper surface, the first corner surface, or the second corner surface (e.g. the mounting electrodes 7, 8 are away from the corners).
Regarding Claim 6, wherein the plurality of conductor layers are coils (e.g. see [0065], the conductor layers can be coil conductors).
Regarding Claim 7, wherein the plurality of conductor layers are capacitors (e.g. see [0030], the conductor layers can include capacitor conductors).
Regarding Claim 8, further comprising an interlayer connection conductor located in the first region or the second region and passing through the plurality of insulator layers in the up-down direction (e.g. via electrodes 5, 6 extend through the device to at least one of the top or bottom side).
Regarding Claims 9 and 10, further comprising an interlayer connection conductor located in the first region or the second region and passing through the plurality of insulator layers in the up-down direction (e.g. via electrodes 5, 6 extend through the device to at least one of the top or bottom side).
However, Kawakami does not teach the Claim 2 limitations of:
a region with the first curved surface in the up-down direction is defined as a first region; a region with the second curved surface in the up-down direction is defined as a second region; a region without the first curved surface or the second curved surface in the up-down direction is defined as a third region; the plurality of conductor layers include a plurality of first conductor layers and a plurality of second conductor layers; the plurality of first conductor layers consist of all of one or more conductor layers located in the first region and a conductor layer closest to the first region among one or more conductor layers located in the third region; the plurality of second conductor layers consist of all of one or more conductor layers located in the second region and a conductor layer closest to the second region among one or more conductor layers located in the third region; a distance in an orthogonal direction orthogonal to the up-down direction between the plurality of first conductor layers and the side surface increases toward the mounting surface, and distances in the orthogonal direction between any adjacent conductor layers among the plurality of first conductor layers and the side surface are different from each other, and/or a distance in the orthogonal direction between the plurality of second conductor layers and the side surface increases toward the upper surface, and distances in the orthogonal direction between any adjacent conductor layers among the plurality of second conductor layers and the side surface are different from each other.
Park (e.g. Fig. 2) teaches an electronic component including a region with the first curved surface (e.g. the upper right corner is a curved surface) in the up-down direction is defined as a first region; a region with the second curved surface e.g. the bottom right corner is a curved surface) in the up-down direction is defined as a second region; a region without the first curved surface or the second curved surface in the up-down direction is defined as a third region (i.e. the region between the two curved surfaces); the plurality of conductor layers (e.g. 121, 122) include a plurality of first conductor layers and a plurality of second conductor layers; the plurality of first conductor layers consist of all of one or more conductor layers located in the first region and a conductor layer closest to the first region among one or more conductor layers located in the third region; the plurality of second conductor layers consist of all of one or more conductor layers located in the second region and a conductor layer closest to the second region among one or more conductor layers located in the third region; a distance in an orthogonal direction orthogonal to the up-down direction between the plurality of first conductor layers and the side surface increases toward the mounting surface, and distances in the orthogonal direction between any adjacent conductor layers among the plurality of first conductor layers and the side surface are different from each other, and/or a distance in the orthogonal direction between the plurality of second conductor layers and the side surface increases toward the upper surface, and distances in the orthogonal direction between any adjacent conductor layers among the plurality of second conductor layers and the side surface are different from each other (e.g. see Fig. 2 and [0052-0054] of Park, the conductors are different respective distances from the side surface in the identical manner to the present application invention Figs. 2-3, and Claim 2).
Regarding Claim 2, it would have been considered obvious to one of ordinary skill in the art to have modified the Kawakami electronic component to have the corners curved/rounded and the conductor layers have the distance adjusted from the edges in an increasing/decreasing pattern as shown/taught by Park Fig. 2, because the modification would have provided the advantageous benefits of preventing chipping of the ridges/corners (e.g. see [0052]) and thus avoiding unwanted exposure of the conductor layers to the outside of the device, thereby suggesting the obviousness of the modification. As an obvious consequence of the modification, the device would have the three regions and the same claimed orientation of conductors and distance relationships/differences as in Claim 2.
Response to Arguments
Applicant’s arguments that the amendments overcome the rejections based on Takahashi are persuasive. However, the amendments necessitated the new grounds of rejection in view of Park et al. as detailed above.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to STEPHEN E JONES whose telephone number is (571)272-1762. The examiner can normally be reached 9AM to 5PM.
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/Stephen E. Jones/ Primary Examiner, Art Unit 2843
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