Prosecution Insights
Last updated: July 17, 2026
Application No. 19/032,487

ELECTRONIC DEVICE FOR PROCESSING ARTIFICIAL NEURAL NETWORK OPERATION BY PREDICTING DATA ACCESS REQUEST

Non-Final OA §102
Filed
Jan 21, 2025
Priority
Nov 02, 2020 — RE 10-2020-0144308 +2 more
Examiner
CHOE, YONG J
Art Unit
2135
Tech Center
2100 — Computer Architecture & Software
Assignee
DeepX Co., Ltd.
OA Round
1 (Non-Final)
92%
Grant Probability
Favorable
1-2
OA Rounds
11m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 92% — above average
92%
Career Allowance Rate
815 granted / 883 resolved
+37.3% vs TC avg
Minimal +4% lift
Without
With
+4.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
16 currently pending
Career history
903
Total Applications
across all art units

Statute-Specific Performance

§101
4.9%
-35.1% vs TC avg
§103
42.5%
+2.5% vs TC avg
§102
35.6%
-4.4% vs TC avg
§112
7.5%
-32.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 883 resolved cases

Office Action

§102
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Information Disclosure Statement As required by M.P.E.P. 609 (C), the applicant’s submission of the information Disclosure Statement dated 11/17/2025 is acknowledged by the examiner and the cited references have been considered in the examination of the claims now pending. As required by M.P.E.P. 609 C(2), a copy of the PTOL-1449 initialed and dated by the examiner is attached to the instant office action. Claim Objections Claims 11-20 are objected to because of the following informalities: In claim 11, the use of phrases, "can be…" and “will be…”render the claims indefinite because it is unclear whether the functional limitation following the phrases is part of the claimed invention. Claim 12-20 are dependent on objected base claim 11 and therefore inherit the deficiency thereof. Appropriate correction is required. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. Claims 1 and 3-10 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Anghel et al. (US Pub. 2019/0332525). Regarding independent claim 1, Anghel discloses an electronic device for processing an artificial neural network operation, comprising: at least one processor for generating a plurality of data access requests required for the artificial neural network operation ([0067]: The machine learning models (as trained or retrained during successive phases j) are preferably implemented by a neural network. In this case, the neurons in the output layer of the neural network are used to predict the probabilities of the next p memory accesses for each sequence fed S34 as input. In variants, mere logistic regressions can be used); and at least one artificial neural network memory controller ([0043]: p logistic regression models may be used to predict S36 values corresponding to columns m+1, m+2, . . . m+p. In variants, a neural network is used) for sequentially recording the plurality of data access requests to acquire an artificial neural network data locality pattern of the artificial neural network operation (claim 1: monitoring sequences of memory addresses of data being accessed by the system, whereby sequences of m+1 memory addresses each, wherein m≥2, are continually identified; and for each sequence of the sequences of m+1 memory addresses identified: converting, upon identifying said each sequence, memory addresses of said each sequence into m relative addresses, whereby each of the m relative addresses is relative to a previous memory address in said each sequence, so as to obtain an auxiliary sequence of m relative addresses), and generating at least one advance data access request which predicts a next data access request after a present data access request based on the artificial neural network data locality pattern (claim 1: upon converting said memory addresses, feeding said auxiliary sequence of m relative addresses as input to a trained machine learning model for it to predict p relative addresses of next memory accesses by the system, wherein p≥1; and prefetching data at memory locations associated with one or more memory addresses that respectively correspond to one or more of the p relative addresses predicted); and wherein each of the plurality of data access requests is corresponded to a data including at least one of weights, feature maps, and inference data of the artificial neural network ([0021],[0027],[0030] and [0063]: The memory accesses monitored and predicted during the inference phase therefore correspond to inference data processed by the trained machine learning model. Accordingly, Anghel teaches data access requests corresponding to at least one of the recited data types, namely inference data of an artificial neural network). Regarding claim 3, Anghel teaches wherein the at least one artificial neural network memory controller is configured to generate the at least one advance data access request before a corresponding next data access request is generated by the at least one processor (Fig.1). Regarding claim 4, Anghel teaches wherein each data access request includes a memory start address and a continuous data read trigger (Fig.1: i.e., relative address). Regarding claim 5, Anghel teaches wherein the at least one artificial neural network memory controller is configured to compare the at least one advance data access request with the next data access request generated by the at least one processor to determine whether the requests match (Fig.1). Regarding claim 6, Anghel teaches wherein the artificial neural network data locality pattern is determined based on repeated loop characteristics of memory addresses accessed during the artificial neural network operation (Fig.2: i<N, then repeated loop). Regarding claim 7, Anghel teaches wherein the at least one artificial neural network memory controller is further configured to store both an updated artificial neural network data locality pattern and a previous artificial neural network data locality pattern to monitor changes in the artificial neural network model during operation (Fig.1). Regarding claim 8, Anghel teaches wherein the at least one artificial neural network memory controller is configured to identify whether the plurality of data access requests correspond to requests of a single artificial neural network model or are a mixture of requests from multiple artificial neural network models ([0043]: p logistic regression models may be used to predict S36 values corresponding to columns m+1, m+2, . . . m+p. In variants, a neural network is used). Regarding claim 9, Anghel teaches wherein, when handling data for multiple artificial neural network models, the at least one artificial neural network memory controller is configured to: generate individual artificial neural network data locality patterns for each artificial neural network model, and generate corresponding advance data access requests based on the respective artificial neural network data locality patterns ([0043]: p logistic regression models may be used to predict S36 values corresponding to columns m+1, m+2, . . . m+p. In variants, a neural network is used). Regarding claim 10, Anghel teaches at least one memory configured to communicate with the at least one artificial neural network memory controller, wherein the memory operates in response to the advance data access requests generated by the at least one artificial neural network memory controller ([0067]: The machine learning models (as trained or retrained during successive phases j) are preferably implemented by a neural network. In this case, the neurons in the output layer of the neural network are used to predict the probabilities of the next p memory accesses for each sequence fed S34 as input. In variants, mere logistic regressions can be used). Allowable Subject Matter Claim 2 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Claim 2 identifies the distinct features “wherein the plurality of data access requests include first data access request and second data access request after the first data access request, the artificial neural network data locality pattern is generated by recording a first memory address value included in the first data access request and a second memory address value included in the second data access request, wherein if a memory address included in the present data access request is same as the first memory address value, the at least one advance data access request is corresponded to a data stored in the second memory address", which are not taught or suggested by the prior art of records. Claim 2 would be allowable over the prior art of record because the claimed features as mentioned above in combination with other claimed features are not recited or suggested by the prior art of records. Reasons of Allowance Claims 11-20 would be allowable if the claim objection is overcome. The closest prior art, Anghel et al. (US Pub. 2019/0332525), discloses “at least one artificial neural network memory controller configured to acquire artificial neural network data locality information by recording the data access request to the at least on memory for data required for the operation of the artificial neural network model, with reference to the artificial neural network data locality information, configured to predict the data that will be requested by the at least one processor from a present data access request and acquire an advance data access request for the predicted data”. However, the prior art differs from the present invention because the prior art fails to disclose “at least one artificial neural network memory controller configured to acquire artificial neural network data locality information by recording the data access request to the at least on memory for data required for the operation of the artificial neural network model, with reference to the artificial neural network data locality information, configured to predict the data that will be requested by the at least one processor from a present data access request and acquire an advance data access request for the predicted data; the artificial neural network data locality information is configured by compiling the artificial neural network model so that the artificial neural network model can be executed by the at least one processor, the artificial neural network data locality information is configured by recording an order information of a word unit of data required to calculate the artificial neural network model by the at least one processor”. The following is an examiner’s statement of reasons for allowance: Independent Claim 11 identifies the distinct features “at least one artificial neural network memory controller configured to acquire artificial neural network data locality information by recording the data access request to the at least on memory for data required for the operation of the artificial neural network model, with reference to the artificial neural network data locality information, configured to predict the data that will be requested by the at least one processor from a present data access request and acquire an advance data access request for the predicted data; the artificial neural network data locality information is configured by compiling the artificial neural network model so that the artificial neural network model can be executed by the at least one processor, the artificial neural network data locality information is configured by recording an order information of a word unit of data required to calculate the artificial neural network model by the at least one processor", which are not taught or suggested by the prior art of records. Claims 11-20 would be allowable over the prior art of record because the claimed features as mentioned above in combination with other claimed features are not recited or suggested by the prior art of records. The above features in conjunction with all other limitations of the dependent and independent claims 11-20 are hereby allowed. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. BRECH (Pub. No.: US 2013/0151654) “DATA SERVICES USING LOCATION PATTERNS AND INTELLIGENT CACHING” Considered for teachings related to the data usage pattern that includes a plurality of previous requests from a user of the computing device to access data from the communication network. Does not disclose or suggest at least one artificial neural network memory controller configured to acquire artificial neural network data locality information by recording the data access request to the at least on memory for data required for the operation of the artificial neural network model, with reference to the artificial neural network data locality information, configured to predict the data that will be requested by the at least one processor from a present data access request and acquire an advance data access request for the predicted data; the artificial neural network data locality information is configured by compiling the artificial neural network model so that the artificial neural network model can be executed by the at least one processor, the artificial neural network data locality information is configured by recording an order information of a word unit of data required to calculate the artificial neural network model by the at least one processor. Any inquiry concerning this communication should be directed to Yong Choe at telephone number 571-270-1053 or email to yong.choe@uspto.gov. The examiner can normally be reached on M-F 10:00 am to 6:30pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Rutz, Jared Ian can be reached on (571) 272-5535. Any inquiry of a general nature or relating to the status of this application should be directed to the TC 2100 whose telephone number is (571) 272-2100. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PMR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-irect.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). /YONG J CHOE/Primary Examiner, Art Unit 2135
Read full office action

Prosecution Timeline

Jan 21, 2025
Application Filed
Jun 02, 2026
Non-Final Rejection mailed — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12681668
Memory Sub-Systems with Separate Paths for Applications to Access Memory Cells
2y 3m to grant Granted Jul 14, 2026
Patent 12682940
MEMORY DEVICES INCLUDING FERROELECTRIC CELL CAPACITORS AND OPERATING METHODS THEREOF
1y 11m to grant Granted Jul 14, 2026
Patent 12675708
Storage and Method for Machine Learning-based Temperature Forecasting for Storage Objects using Storage Sub-Objects and Temperature Projection
3y 5m to grant Granted Jul 07, 2026
Patent 12669940
ERROR HANDLING IN ASYMMETRIC SUB-BLOCKS
2y 10m to grant Granted Jun 30, 2026
Patent 12663925
Atomic Operations Implemented using Memory Services of Data Storage Devices
2y 4m to grant Granted Jun 23, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
92%
Grant Probability
97%
With Interview (+4.5%)
2y 4m (~11m remaining)
Median Time to Grant
Low
PTA Risk
Based on 883 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month