Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This is a reply to the application filed on 1/22/2025, in which, claim(s) 1-20 are pending.
Specification
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Drawings
The drawings filed on 1/22/2025 is/are accepted by The Examiner.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the claims at issue are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the reference application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The USPTO internet Web site contains terminal disclaimer forms which may be used. Please visit http://www.uspto.gov/forms/. The filing date of the application will determine what form should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to http://www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp.
Claim(s) 1-20 is/are rejected on the ground of nonstatutory double patenting over claim(s) 1-20 of U.S. Patent No. 10,984,435 since the claims, if allowed, would improperly extend the “right to exclude” already granted in the patent.
The subject matter claimed in the instant application is fully disclosed in the patent and is covered by the patent since the patent and the application are claiming common subject matter, as follows: Although the conflicting claims are not identical, they are not patentably distinct from each other because the parent application and its dependent claims fully anticipated claim 1 of the present application.
This is an obviousness-type double patenting rejection.
Claim(s) 1-20 is/are rejected on the ground of nonstatutory double patenting over claim(s) 1-20 of U.S. Patent No. 11,870,910 since the claims, if allowed, would improperly extend the “right to exclude” already granted in the patent.
The subject matter claimed in the instant application is fully disclosed in the patent and is covered by the patent since the patent and the application are claiming common subject matter, as follows: Although the conflicting claims are not identical, they are not patentably distinct from each other because the parent application and its dependent claims fully anticipated claim 1 of the present application.
This is an obviousness-type double patenting rejection.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-20 is/are rejected under 35 U.S.C. 102(a)(1) as being clearly anticipated by Spanier et al. (US 20110040809 A1; hereafter Spanier).
Regarding claims 1, 19 and 17, Spanier discloses an intelligent electronic device (IED) (the IED is an enclosed device, such as a power meter or other utilities devices [Spanier; Abstract; Figs. 4-6 and associated texts]) comprising:
at least one sensor coupled to an electrical distribution system, the at least one sensor configured to measure at least one parameter of the electrical distribution system and generate at least one analog signal indicative of the at least one parameter (sensors to measure input value of different signals [Spanier; ¶16, 74-86; Figs. 4-6 and associated texts]);
at least one analog-to-digital converter configured to receive the at least one analog signal and convert the at least one analog signal to at least one digital signal (A/D converters for converting analog signals from the sensors [Spanier; ¶16, 74-86; Figs. 4-6 and associated texts]);
a communication interface configured to receive at least one communication (communication interfaces to communicate between may devices connected to the same network [Spanier; ¶15-17, 70, 74-86; Figs. 4-6 and associated texts]);
a processing system including one or more processors, the processing system configured for receiving the at least one digital signal and performing at least one calculation based on the received at least one digital signal (The CPU 50 or DSP Processors 60, 70 are configured to operatively receive digital signals from the A/D converters 7, 8 and 9 to perform calculations necessary to determine power usage and to control the overall operations of the IED [Spanier; ¶15-17, 70, 74-86; Figs. 4-6 and associated texts]);
a memory including a plurality of memory locations connected to the processing system (a volatile memory 19, an non-volatile memory 17 for storage [Spanier; ¶15-17, 70, 74-86; Figs. 4-6 and associated texts]); and
a sealing switch in communication with the processing system, wherein activation of the sealing switch sends a switch signal to the processing system (the power supply 20 can be a switch mode power supply in which the primary AC signal will be converted to a form of DC signal and then switched at high frequency, such as, for example, 100 Khz, and then brought through a transformer to step the primary voltage down to, for example, 5 Volts AC. A rectifier and a regulating circuit would then be used to regulate the voltage and provide a stable DC low voltage output. Other embodiments, such as, but not limited to, linear power supplies or capacitor dividing power supplies are also contemplated [Spanier; ¶15-17, 70, 74-86; Figs. 4-6 and associated texts]).
Regarding claim 2, Spanier discloses the IED of claim 1, wherein the communication interface is configured to receive a request from a user to make changes to information stored in the memory and wherein the processing system is configured to require the switch signal to allow changes to the information stored in the memory (the switching of voltage allows input signal to the sensors and ADC data which can be stored to the memories [Spanier; ¶15-17, 70, 74-86; Figs. 4-6 and associated texts]).
Regarding claim 3, Spanier discloses the IED of claim 2, wherein the processing system is configured to require a password to allow changes to the information stored in the memory (user login with username and password to perform different operation [Spanier; ¶19, 103, 120-120; Figs. 4-6 and associated texts]).
Regarding claim 4, Spanier discloses the IED of claim 2, wherein the processing system is configured to maintain a log of changes to the information stored in the memory (logging data to the log files and stored in the memory [Spanier; ¶16, 92-94; Figs. 4-6 and associated texts]).
Regarding claim 5, Spanier discloses the IED of claim 1, wherein the processing system is configured to require the switch signal to allow access to a feature of the IED (user login to allow access, any switches function may be carried out through the operation of program logic, through dedicated logic, through the interaction of program control and dedicated logic [Spanier; ¶19, 69, 103, 120-125; Figs. 4-6 and associated texts]).
Regarding claim 6, Spanier discloses the IED of claim 1, wherein the memory includes a firmware package and the processing system is configured to require a switch signal to allow changes to the firmware package (change of voltage allow changes to data value [Spanier; ¶258, 289; Figs. 4-6 and associated texts]).
Regarding claim 7, Spanier discloses the IED of claim 1, wherein the sealing switch and processing system are positioned in the same housing (part of the IED [Spanier; ¶258, 289; Figs. 4-6 and associated texts]).
Regarding claim 8, Spanier discloses the IED of claim 1, wherein the processing system is configured to require a switch signal to allow a communication through the communication interface (allow to turn on and off based on the signal, when on allow to function [Spanier; ¶24, 258, 289; Figs. 4-6 and associated texts]).
Regarding claim 10, Spanier discloses the IED of claim 9, wherein the sealing switch is accessible through a secured door of the housing (the switches are secured in the housing [Spanier; ¶16, 69; Figs. 4-6 and associated texts]).
Regarding claim 11, Spanier discloses the IED of claim 10, wherein the door is secured with a tamper seal (secure housing [Spanier; ¶16, 69; Figs. 4-6 and associated texts]).
Regarding claim 12, Spanier discloses the IED of claim 9, wherein the communication interface is configured to receive a request from a user to make changes to information stored in the memory and wherein the processing system is configured to require the switch signal to allow changes to the information stored in the memory (user login with username and password to perform different operation [Spanier; ¶19, 24, 103; Figs. 4-6 and associated texts]).
Regarding claim 13, Spanier discloses the IED of claim 12, wherein the processing system is configured to require a password to allow changes to the information stored in the memory (user login with username and password to perform different operation [Spanier; ¶19, 24, 103, 120-120; Figs. 4-6 and associated texts]).
Regarding claim 14, Spanier discloses the IED of claim 9, wherein the memory includes a firmware package and the processing system is configured to require a switch signal to allow changes to the firmware package (user login to allow access, any switches function may be carried out through the operation of program logic, through dedicated logic, through the interaction of program control and dedicated logic [Spanier; ¶19, 24, 69, 103, 120-125; Figs. 4-6 and associated texts]).
Regarding claim 15, Spanier discloses the IED of claim 9, wherein the processing system is configured to require a switch signal to allow a communication through the communication interface (allow to turn on and off based on the signal, when on allow to function and communicate [Spanier; ¶24, 258, 289; Figs. 4-6 and associated texts]).
Regarding claim 16, Spanier discloses the IED of claim 15, wherein the communication interface includes a communication port accessible via the housing [Spanier; ¶9, 24, 74; Figs. 1 and associated texts].
Regarding claim 18, Spanier discloses the method of claim 17, wherein the processing system is configured to prevent communication through the communication interface unless the switch signal has been received within a predetermined time (In addition, before the IED can respond, the IED must also wait for a "dead time" when the slave is not receiving any further characters. The wait time or "dead time" is used to indicate to the slave that the message it was sent is complete. This time period is defined by the Modbus specification. The IED then has to process the query and send the response [Spanier; ¶16, 24, 83; Figs. 4-6 and associated texts]).
Regarding claim 19, Spanier discloses the method of claim 17, wherein the request includes a change in information stored in the memory (user login to allow access, any switches function may be carried out through the operation of program logic, through dedicated logic, through the interaction of program control and dedicated logic [Spanier; ¶19, 24, 69; Figs. 4-6 and associated texts]).
Regarding claim 20, Spanier discloses the method of claim 17, wherein the request includes access to a feature of the IED (user login to allow access, any switches function may be carried out through the operation of program logic, through dedicated logic, through the interaction of program control and dedicated logic [Spanier; ¶19, 24, 69; Figs. 4-6 and associated texts]).
Internet Communications
Applicant is encouraged to submit a written authorization for Internet communications (PTO/SB/439, http:ljwww.uspto.gov/sites/default/files/documents/sb0439.pdf) in the instant patent application to authorize the examiner to communicate with the applicant via email. The authorization will allow the examiner to better practice compact prosecution. The written authorization can be submitted via one of the following methods only: (1) Central Fax which can be found in the Conclusion section of this Office action; (2) regular postal mail; (3) EFS WEB; or (4) the service window on the Alexandria campus. EFS web is the recommended way to submit the form since this allows the form to be entered into the file wrapper within the same day (system dependent). Written authorization submitted via other methods, such as direct fax to the examiner or email, will not be accepted. See MPEP § 502.03.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAO Q HO whose telephone number is (571)270-5998. The examiner can normally be reached on 7:00am - 5:00pm.
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/DAO Q HO/Primary Examiner, Art Unit 2432
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