Prosecution Insights
Last updated: July 17, 2026
Application No. 19/035,376

Address Hashing in a Multiple Memory Controller System

Non-Final OA §112
Filed
Jan 23, 2025
Priority
Apr 26, 2021 — provisional 63/179,666 +2 more
Examiner
CYGIEL, GARY W
Art Unit
2137
Tech Center
2100 — Computer Architecture & Software
Assignee
Apple Inc.
OA Round
1 (Non-Final)
76%
Grant Probability
Favorable
1-2
OA Rounds
1y 10m
Est. Remaining
86%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allowance Rate
414 granted / 542 resolved
+21.4% vs TC avg
Moderate +9% lift
Without
With
+9.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
10 currently pending
Career history
561
Total Applications
across all art units

Statute-Specific Performance

§101
2.0%
-38.0% vs TC avg
§103
62.5%
+22.5% vs TC avg
§102
22.4%
-17.6% vs TC avg
§112
10.2%
-29.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 542 resolved cases

Office Action

§112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1-4 and 9-12 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No. 12,236,130. Although the claims at issue are not identical, they are not patentably distinct from each other because the instant claims are anticipated by the claims of the reference patent. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 16-21 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claims 16, at line 12, claims a particular drop register. However, in this claim, the scope of a particular drop register is unclear. Claim 20 further limits a drop register by defining a value included in the drop register, but since a dependent claim must be further limiting, the scope of a more broadly recited particular drop register is unclear. Additionally, the claim doesn’t recite a drop register generically, it recites a particular drop register. It is unclear what a particular drop register is in the absence of a clear understanding of drop registers. Further, there is no recitation of “a particular drop register” in the specification. The examiner will interpret this consistent with the description provided at ¶0051 of the applicants originally filed specification: The drop registers may include a register for each level of granularity and may be programmable to identify at least one address bit in the subset of address bits corresponding to that level of granularity that is to be dropped by the targeted memory controller. Claims 17-21 are rejected as being dependent from, but failing to cure the deficiencies of a rejected base claim. Allowable Subject Matter Claims 5-8 and 13-15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claims 16-21 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action. The following is an examiner’s statement of reasons for allowance: The prior art teaches plural memory controllers wherein a given memory address specifies a location in a particular one of the devices and accessing data stored in the system via one of the controllers (see, e.g., CABARCAS:p252-253; Fig 1; Table I.) and generating a memory request and using the address to send the request to a controller (see, e.g., CABARCAS:p252-253). Therefore, primary reason for the allowance of claims 5-8 and 13-15 in this case, is the inclusion of the specific storage management details a plurality of drop registers, wherein a given drop register of the plurality of drop registers includes a respective plurality of fields that identify respective portions of a given memory address, in accordance with the interpretation made by the examiner, in combination with the other elements recited, which is not found or fairly obviated by the prior art of record. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: [A] Goubert et al. (US Patent No. 5,481,687) – describes systems and methods for compressing a memory address; [B] Guerrero et al. (US PGPub No. 2004/0042463) – describes systems and methods for migrating between controllers using different access granularity. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Gary W Cygiel whose telephone number is (571)270-1170. The examiner can normally be reached Monday - Thursday 11am-3pm PST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Arpan P Savla can be reached at (571) 272-1077. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Gary W. Cygiel/Primary Examiner, Art Unit 2137
Read full office action

Prosecution Timeline

Jan 23, 2025
Application Filed
Jun 29, 2026
Non-Final Rejection mailed — §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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HARDWARE ACCESSIBLE MEMORY FABRIC
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Patent 12656966
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Patent 12645606
LOGIC MODULE FOR USE WITH ENCODED INSTRUCTIONS
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Patent 12619382
MEMORY CONTROLLER AND STORAGE DEVICE INCLUDING THE SAME
2y 9m to grant Granted May 05, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
76%
Grant Probability
86%
With Interview (+9.2%)
3y 4m (~1y 10m remaining)
Median Time to Grant
Low
PTA Risk
Based on 542 resolved cases by this examiner. Grant probability derived from career allowance rate.

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