Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-20 are now pending in the application under prosecution and have been examined.
The specification has not been checked to the extent necessary to determine the presence of all possible minor errors.
The specification should be amended to reflect the status of all related application, whether patented or abandoned. Therefore, applications noted by their serial number and/or attorney docket number should be updated with correct serial number and patent number if patented.
The first instance of all acronyms or abbreviation should be spelled out for clarity, whether or not considered well known in the art.
In the response to this Office action, the Examiner respectfully requests that support be shown for language added to any original claims on amendment and any new claims. That is, indicate support for newly added claim language by specifically pointing to page(s) and line numbers in the specification and/or drawing figure(s). This will assist the Examiner in prosecuting this application.
Examiner cites particular columns and line numbers in the references as applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the applicant fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner.
37 C.F.R. § 1.83(a) requires the Drawings to illustrate or show all claimed features.
Applicant must clearly point out the patentable novelty that they think the claims present, in view of the state of the art disclosed by the references cited or the objections made, and must also explain how the amendments avoid the references or objections. See 37 C.F.R. § 1.111(c).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-2, 11-12, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over US 9,921,963 B1 (LI et al) in view of US 20190332426A1 (ZHANG et al).
With respect to claim 1, US 9,921,963 B1 (LI et al) teaches method for evicting cached data, comprising: acquiring a cached metadata item in a real-time weight queue (maintaining a metadata set for each cache unit of a cache device, wherein the cache device comprises a plurality of cache units, each cache unit having a plurality of segments (segment group)) [Col. 9, Lines 39 to Col. 10, Line 14; Col. 13, Lines 16-55, wherein the cached metadata item comprises a cached weight value (calculating a score for each metadata set or group score; Col. 10, Lines 52-66; Col. 14, Lines 23 to Col. 15, Line 8), and the cached weight value is dynamically updated at least based on a number of access and/or time of access to a corresponding cached data item (the calculated score being dependent upon segment priority associated with the segment (a hotness associated with the segment access count value indicating the number of times any of the segments in cache unit has been accessed and the accessed timestamp of the segment) [Col. 13, Lines 26-55; Col. 10, Lines 16-39; Col. 14, Lines 23-51];
assigning the cached metadata item to a cached weight queue with a corresponding weight level based on the cached weight value in the cached metadata item, wherein different weight levels correspond to different weight ranges of cached weight value
(calculating a score for each of the metadata sets based at least in part on the segment count metadata, the validity metadata, and the LAT metadata for assigning different weights to different metadata) [Col. 14, Lines 23; to Col. 15, Line 8; Col. 9, Lines 52 to Col. 10, Line 30; Col. 10, Line 54 to Col. 11; Line 15],
in response to a cache eviction instruction, determining at least one target cached weight queue based on the weight level
(scoring the cache unit metadata derived by performing function on segment level and segment group level metadata) [Col. 14, Lines 23-45; Col. 12, Lines 35-65; Col. 8, Line 64 to Col. 9, Line 14; Col. 15, Lines 9-30].
LI teaches: maintaining sets of cache unit metadata, segment group metadata; and maintaining a score of each of segment group metadata [Col. 15, Lines 9-54]; wherein, response to determining that a cache eviction is to be performed, selecting a cache unit corresponding to the metadata set in the list in accordance with the score level and evicting the selected cache unit [Abstract ; Col. 14, Line 23 to Col. 15, Line 22]. LI fails to specifically teach evicting sequentially cached data items corresponding to target cached metadata items in the at least one target cached weight queue. However, ZHANG teaches storing metadata being related to data blocks to be processed that are associated with the respective cores, and the metadata in each of the queues being sorted by arrival times of the respective data blocks to be processed; obtaining from the plurality of queues associated with the plurality of cores, metadata located at the heads of the plurality of queues to determine the weight of each core identifier from the first metadata of each queue, core identifiers sorted according to their weights and then the sorted core identifiers are stored to determine that the metadata corresponding to which core identifier should be processed [Fig. 3-4; Fig. 6-7; Par. 0057-0061; Par. 0029-0034; Par. 0040-0046]. Therefore, it would have been obvious to one having at least ordinary skill in the art before the effective filing date of the instant application, to include into LI’s segment group metadata eviction with the sequential eviction process of the segment group, as taught by ZHANG, in order to process data blocks so as to avoid the adverse effect brought by thread processing when multiple threads are used, therefore, shortening the time for determining the metadata with the predetermined weight that would improve the efficiency for processing data blocks, as taught by ZHANG [Par. 0026; Par. 0051-0053].
With respect to claim 11, LI teaches electronic device, comprising: a processor and a memory; wherein the memory stores computer-executable instructions; and the processor executes the computer-executable instructions stored in the memory (storage service engine including file manager to be executed by a processor to provide an interface to access files stored at storage system) Col. 8, Lines 7-34] to cause the processor to: acquire a cached metadata item in a real-time weight queue (maintaining a metadata set for each cache unit of a cache device, wherein the cache device comprises a plurality of cache units, each cache unit having a plurality of segments (segment group)) [Col. 9, Lines 39 to Col. 10, Line 14; Col. 13, Lines 16-55, wherein the cached metadata item comprises a cached weight value (calculating a score for each metadata set or group score; Col. 10, Lines 52-66; Col. 14, Lines 23 to Col. 15, Line 8), and the cached weight value is dynamically updated at least based on a number of access and/or time of access to a corresponding cached data item (the calculated score being dependent upon segment priority associated with the segment (a hotness associated with the segment access count value indicating the number of times any of the segments in cache unit has been accessed and the accessed timestamp of the segment) [Col. 13, Lines 26-55; Col. 10, Lines 16-39; Col. 14, Lines 23-51]; assign the cached metadata item to a cached weight queue with a corresponding weight level based on the cached weight value in the cached metadata item, wherein different weight levels correspond to different weight ranges of cached weight values (calculating a score for each of the metadata sets based at least in part on the segment count metadata, the validity metadata, and the LAT metadata) [Col. 14, Lines 23; to Col. 15, Line 8; Col. 9, Lines 52 to Col. 10, Line 30]; and in response to a cache eviction instruction, determine at least one target cached weight queue based on the weight level (calculating a score for each of the metadata sets based at least in part on the segment count metadata, the validity metadata, and the LAT metadata for assigning different weights to different metadata) [Col. 14, Lines 23; to Col. 15, Line 8; Col. 9, Lines 52 to Col. 10, Line 30; Col. 10, Line 54 to Col. 11; Line 15], and evict cached data items corresponding to target cached metadata items in the at least one target cached weight queue (scoring the cache unit metadata derived by performing function on segment level and segment group level metadata for eviction) [Col. 14, Lines 23-45; Col. 12, Lines 35-65; Col. 8, Line 64 to Col. 9, Line 14; Col. 15, Lines 9-30].
LI teaches: maintaining sets of cache unit metadata, segment group metadata; and maintaining a score of each of segment group metadata [Col. 15, Lines 9-54]; wherein, response to determining that a cache eviction is to be performed, selecting a cache unit corresponding to the metadata set in the list in accordance with the score level and evicting the selected cache unit [Abstract ; Col. 14, Line 23 to Col. 15, Line 22]. LI fails to specifically teach evicting sequentially cached data items corresponding to target cached metadata items in the at least one target cached weight queue. However, ZHANG teaches storing metadata being related to data blocks to be processed that are associated with the respective cores, and the metadata in each of the queues being sorted by arrival times of the respective data blocks to be processed; obtaining from the plurality of queues associated with the plurality of cores, metadata located at the heads of the plurality of queues to determine the weight of each core identifier from the first metadata of each queue, core identifiers sorted according to their weights and then the sorted core identifiers are stored to determine that the metadata corresponding to which core identifier should be processed [Fig. 3-4; Fig. 6-7; Par. 0057-0061; Par. 0029-0034; Par. 0040-0046]. Therefore, it would have been obvious to one having at least ordinary skill in the art before the effective filing date of the instant application, to include into LI’s segment group metadata eviction with the sequential eviction process of the segment group, as taught by ZHANG, in order to process data blocks so as to avoid the adverse effect brought by thread processing when multiple threads are used, therefore, shortening the time for determining the metadata with the predetermined weight that would improve the efficiency for processing data blocks, as taught by ZHANG [Par. 0026; Par. 0051-0053].
With respect to claim 20, LI and ZHANG, combined teach non-transitory computer-readable storage medium storing computer-executable instructions, wherein the computer-executable instructions, when executed by a processor (storage service component including file manager to be executed by a processor to provide an interface to access files stored at storage system, the storage service component implemented in software installed and stored in a persistent storage device, which can be loaded and executed in a memory by a processor) Col. 8, Lines 7-34], causes the processor to execute the method as recited in claim 1.
With respect to claims 2 and 12, LI and ZHANG, combined teach the electronic device and method thereof, wherein the processor executes the computer-executable instructions stored in the memory to further cause the processor to: in response to a first cached data item being received, create a corresponding cached metadata item initially, and configure a cached weight value of the first cached data item as a default weight value, wherein the first cached data item is any cached data item (when a cache unit is accessed in cache device, cache manager determines the score (weight value) of the accessed cache unit metadata, the determined score being based on segment count, segment validity, and last access time) [Col. 13, Lines 26-55; Col. 10, Lines 16-39; Col. 14, Lines 23-51]; and record a number of access and/or time of access to the first cached data item dynamically, and update the cached weight value of the first cached data item dynamically based on the number of the access and/or the time of the access to the first cached data item (the metadata cache manager determines the score of each accessed cache unit metadata, as the cache unit is accesses , and determines a location in list to reposition the cache unit metadata such that the order of scores is preserved (.i.e. the repositioned is dynamically based on last time accessed or mostly relevant and hotness of access)) [Fig. 10A-10B; Col.10, Lines 1-23] , wherein the cached weight value is positively correlated with the number of the access and negatively correlated with a duration from the time of the access to current time, and the cached weight value represents a probability that the cached data item still needs to continue being cached (implementing a score or weight value for each segment and each segment group in cache unit, each score or weight value being depreciated as the probability of access becomes low wherein a deprecated segments may revert back to being non-deprecated when the accessed time of the segment is recent) [Fig. 4a-4C; Col. 15, Line 32 to Col. 16, Line 38].
Allowable Subject Matter
Claims 3-10 and 13-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure
9,892,045 (ZHANG et al).
US 20250217279 A1 (RUBY et al) teaching managing garbage collection using a plurality of queues of memory bands of a memory system. The memory system obtains a request to organize data stored in a plurality of memory bands of the memory system, and each memory band has a data validity level.
US 20210349834 A1 (ROHLEDER et al) teaching method of managing load units of executable instructions between internal memory in a microcontroller with multiple bus masters, and a non-volatile memory device external to the microcontroller, each of a plurality of load unit is with a corresponding load entity queue and each load entity queue is associated with a corresponding one of the multiple bus masters, each load entity queue selects an eviction candidate from the associated copy of the load units currently loaded in the internal memory.
US 11093397 B1 (DOUGLIS et al) teaching: use of a survival queue to manage a container-based flash cache is disclosed; a corresponding survival time is associated with each of a plurality of containers stored in a flash cache, each container comprising a plurality of data blocks, the survival time determined based at least in part on a calculated proportion of relatively recently accessed data blocks associated with the container is associated with the container; a container to evict from the flash cache is selected based at least in part on a determination that the corresponding survival time of the selected container has expired.
US 9740525 B2 (SCHEUER) teaching: computing system having a multiple central processing unit (CPU) cores a task scheduler configured to generate one or more priority value lists of elements, with each priority value list comprising elements having the same priority value; priority queue of a task scheduler can be populated by links to priority value lists that are arranged in order of priority.
US 20170199762 A1 (BUFE) teaching method including: receiving one or more customer activity inputs associated with one or more service tasks for performing in a service establishment on behalf of customers; receiving one or more metadata items associated with the one or more service tasks; determining a prioritization of the one or more service tasks based on the one or more customer activity inputs, wherein determining the prioritization includes generating a prioritization value for the one or more service tasks based at least in part on at least one of the one or more metadata items or the one or more customer activity inputs, and updating the one or more service tasks based on the prioritization value.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PIERRE MICHEL BATAILLE whose telephone number is (571)272-4178. The examiner can normally be reached Monday - Thursday 7-6 ET.
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/PIERRE MICHEL BATAILLE/Primary Examiner, Art Unit 2138
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