Prosecution Insights
Last updated: April 19, 2026
Application No. 19/037,705

OVERLAP CIRCUIT FOR A POWER SYSTEM

Non-Final OA §103
Filed
Jan 27, 2025
Examiner
SHIAO, DAVID A
Art Unit
2836
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Blixt Tech AB
OA Round
1 (Non-Final)
75%
Grant Probability
Favorable
1-2
OA Rounds
2y 7m
To Grant
99%
With Interview

Examiner Intelligence

Grants 75% — above average
75%
Career Allow Rate
357 granted / 474 resolved
+7.3% vs TC avg
Strong +31% interview lift
Without
With
+30.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
16 currently pending
Career history
490
Total Applications
across all art units

Statute-Specific Performance

§101
0.7%
-39.3% vs TC avg
§103
39.5%
-0.5% vs TC avg
§102
26.4%
-13.6% vs TC avg
§112
23.2%
-16.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 474 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed in parent Application No. 17/918165, filed on 11 October 2022. Claim Objections Claims 1-2, 5, 7 are objected to because of the following informalities: Re claims 1-2, 5, the claims should be amended to avoid repeated reference to "a first current i1" and "a second current i2" after the elements have already been introduced to avoid potential antecedent basis issues. It is recommended the claims be amended to refer to "the first current" and "the second current" respectively if referring to the same general current flow through the respective switches. Alternatively, the claim may be rephrased in other manner, such as generally "feeding current from the first/second power" without referring to an element name if just generally describing the state/function of the switch. It is noted that as the claims are currently understood in light of the Specification that the respective currents refer to general state of switch to allow/block the respective current, rather than a specific current magnitude value. Re claim 5, it is recommended the claims be amended to provide consistent reference to "the at least one" first diode, first variable resistor, second diode, and second variable resistor. Applicant is also cautioned to review the manner of reciting the arrangement and operation of the diode and resistor pairs, since at present the limitations appear to potentially be able to be interpreted in a manner inconsistent with the Specification/Drawings (i.e. if referring to Figs. 15-19 then current would generally not be considered as passing through a variable resistor and then the diode which is directly parallel to it). Re claim 7, the claim should be amended: "the first threshold voltage VTh1 is dependent on a nominal voltage…" to correct grammar. Note also the claim limitations as recited may also refer to elements only required in the alternative in claim 6, and care should be taken that all elements be introduced and required if needed for a corresponding limitation. Appropriate correction is required. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Makwana (US2007/0247114). Re claim 1. Makwana teaches an overlap circuit for a power system (see Makwana: Figs. 6-7), the overlap circuit comprising: a first controllable switch (charge/discharge switch <80>) configured to be coupled between a power source (charger <90>, current control <76>) and a first load (<Battery 1>; see Makwana: [0024], Fig. 6); a second controllable switch (charge/discharge switch <82>) configured to be coupled between the power source and a second load (<Battery 2>; see Makwana: [0024], Fig. 6); wherein: in a switching configuration i) during a first time period T1, the first controllable switch is configured to feed a first current i1 from the power source to the first load when the second controllable switch is configured to block a second current i2 from the power source to the second load (see Makwana: [0028-0029], [0033-0035], Figs. 6-7 regarding connecting and charging one battery at a time while disconnecting other batteries, e.g. Battery 1); in a switching configuration ii) during a second time period T2 following the first time period T1, the first controllable switch configured to feed a first current i1 from the power source to the first load when the second controllable switch is configured to feed a second current i2 from the power source to the second load (see Makwana: [0028], [0035-0036], Figs. 6-7 and discussion below regarding obviousness of the smooth transition as applied to charging batteries); and in a switching configuration iii) during a third time period T3 following the second time period T2, the first controllable switch is configured to block a first current i1 from the power source to the first load when the second controllable switch is configured to feed a second current i2 from power source to the second load (see Makwana: [0028-0029], [0033-0036], Figs. 6-7 regarding connecting and charging one battery at a time while disconnecting other batteries, and changing to charge another battery, e.g. Battery 2, according to charge protocol). See Makwana: [0024-0029], [0033-0036], Figs. 6-7. Makwana only gives an example step-by-step switch sequence for smooth transition of active batteries that are discharging (see Makwana: [0036]). However, one of ordinary skill in the art would understand that the description of Makwana: [0036] may obviously be applied to transitioning between active batteries being charged according to the charge protocol, given that both charging and discharging protocols are described as part of the system operation and in the same manner of one battery at a time (see Makwana: [0027-0031]), and the description of “active battery” is earlier described as applying to either the selected battery for powering load/discharging or being charged depending on the system state (see Makwana: [0035]). Given these suggestions of Makwana, one of ordinary skill would therefore find it obvious that Makwana implies the smooth transition operation of Makwana: [0036] could be extended similarly to changing between active battery being charged according to the earlier described charging protocol as well. One of ordinary skill applying the smooth transition operation to changing between charging batteries would thereby result in a similar sequence as described in Makwana: [0035-0036], except reversing signals to respective charge MOSFET <100> and discharge MOSFET <110> of each charge/discharge switch (i.e. initially Battery 1-100,1-110 ON to charge, Battery 2-100,2-110 OFF to disconnect; 1-100 ON, 1-110 OFF so charge current can continue to flow to Battery 1 through body diode of disabled 1-110; 2-100 ON, 2-110 OFF enabling Battery 2 to begin charging through now-enabled charge MOSFET 100 and diode of 2-110; 1-100 OFF, 1-110 OFF so no charge current can flow to Battery 1; 2-100 ON, 2-110 ON to fully enable Battery 2). It would therefore have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to further operate the system of Makwana as implied such that in a switching configuration ii) during a second time period T2 following the first time period T1, the first controllable switch configured to feed a first current i1 from the power source to the first load when the second controllable switch is configured to feed a second current i2 from the power source to the second load, for purposes of enabling smooth transitions between active batteries being charged and also thus preventing batteries being switched from discharging when already depleted (see Makwana: [0035-0036], Figs. 6-7). Re claim 2. Makwana teaches the overlap circuit of claim 1, wherein: iv) during a fourth time period T4 following the third time period T3, the first controllable switch is configured to feed a first current 1i from the power source to the first load when the second controllable switch is configured to feed a second current i2 from the power source to the second load (see discussion of claim 1 regarding smooth transition between active charging batteries). Although Makwana does not explicitly discuss example operation of switching between charging Battery 1 and charging Battery 2 again at a later time, one of ordinary skill would understand that Makwana: [0028-0031], Figs. 6-7 suggests that batteries may deplete charge during system operation and thus require recharging at a later time, and thus it would be obvious that at some in time the system will again charge Battery 1 and Battery 2 and repeat the charge protocol process, i.e. including a smooth transition time period as discussed in claim 1. Re claim 3. Makwana teaches the overlap circuit of claim 1, further comprising a control device (battery detection and control logic <86>, see Makwana: [0025], [0029], [0035-0036], Figs. 6-7 regarding control logic providing all control signals to respective switch of both Battery 1 and Battery 2) configured to provide first control signals to the first controllable switch and provide second control signals to the second controllable switch so that the first controllable switch and the second controllable switch both are conductive during the second time period T2 thereby simultaneously feeding currents to the first load and the second load, respectively, wherein the first control signals and the second control signals are simultaneously or non-simultaneously clocked (see Makwana: [0028-0029], [0035-0036], and discussion of claim 1 regarding control so charge current flows to both Battery 1 and Battery 2 during smooth transition via non-simultaneously clocked signals). Re claim 4. Makwana teaches the overlap circuit of claim 3, wherein the first control signals and the second control signals are non-simultaneously clocked with a time offset dependent on at least one of current provided to the first load and a current provided to the second load, a voltage difference between the first load and the second load, or a resistance value when a resistance of the first controllable switch equals a resistance of the second controllable switch (see Makwana: [0028-0029], [0035-0036], Figs. 6-7 regarding switching between active charging battery using respective MOSFET circuits which inherently have some controllable drain-source resistance during switching and thus affect overall time taken for switching; see NPL: “Power MOSFET” and “What are MOSFETs” for further information regarding inherent properties of MOSFETs). Re claim 5. Makwana teaches the overlap circuit of claim 1, wherein: the first controllable switch comprises at least one first diode (respective body diode <114> for switch <80>) coupled in parallel with at least one first variable resistor (discharge MOSFET <110> for switch <80>) between the power source and the first load; the second controllable switch comprises at least one second diode (respective body diode <114> for switch <82>) coupled in parallel with at least one second variable resistor (discharge MOSFET <110> for switch <82>; see Makwana: [0033-0035], Figs. 6-7 regarding implementation of each charge/discharge switch <80,82>; see NPL: “Power MOSFET” and “What are MOSFETs” for further information regarding inherent properties of MOSFETs including function as a controllable resistance essentially) between the power source and the second load; during the first time period T1, the first variable resistor is configured to provide a first current i1 to the first load and subsequently the first diode is configured to provide a first current i to the first load; during the second time period T2, the first diode is configured to provide a first current to the first load and the second diode is configured to provide a second current i2 to the second load; and during the third time period T3, the second diode is configured to provide a second current i2 to the second load and subsequently the second variable resistor is configured to provide a second current 12 to the second load (see Makwana: [0028-0029], [0035-0036], and discussion of claim 1 regarding obviousness of the smooth transition sequence as applied to changing between active batteries being charged, including control such that current flows through body diodes during transition). Re claims 6-7. Makwana teaches the overlap circuit of claim 1, and discloses charging batteries in sequence, i.e. the overlap circuit is configured to: switch from the switching configuration i) to the switching configuration ii) when Battery 1 is charged (see Makwana: [0028-0029] and discussion of claim 1), but does not explicitly disclose based on what condition the battery detection and control logic determines that Battery 1 has finished charging and should change to charging Battery 2. Official Notice is hereby taken, however, that it is very well-known in the art of battery charging control and monitoring circuits for a system to detect battery is fully charged when detecting its voltage is higher than a first threshold voltage as well-known indication of battery state of charge, that is generally dependent on a nominal voltage Vn of the battery when it is fully charged. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the system of Makwana to have the control logic determine Battery 1 is fully charged and to switch to next battery based on the voltage of Battery 1 being higher than a first threshold voltage based on battery’s nominal voltage as recited, for purposes of providing known means to predictably enable the system to electronically determine that a battery is fully charged and allow the next battery to be switched to charge. Conclusion In summary, it is recommended Applicant consider the cited prior art of record which teach suggest the claimed features as broadly recited. Applicant is advised that as currently drafted, the claims broadly recite switching configurations that could be present in various parallel load systems due to a variety of reasons that would cause loads to connect/disconnect in potentially overlapping time periods, such that other prior art could broadly apply. It is recommended that Applicant consider explicitly, and specifically claiming the details of the entire intended system combination, since broadly reciting individual portions of the switch arrangement and operations may be taught by various prior art under broadest reasonable interpretation. In particular, it is recommended Applicant consider recitation of specific embodiment as energy storage devices and motor-generator which may function as both sources and loads, particular details/conditions for triggering a changeover/similar between battery connections, and then operation of the switches in both a discharging and a charging mode with overlap operation, as a possible combination of features. Other specific details, such as limiting scope to specific circuit embodiment and specific details of when switch signals are applied and resulting change in component states may also potentially distinguish from prior art disclosure. Applicant is cautioned that some behavior of the switches/MOSFETs such as resistance/delays appear to be merely inherent properties though as evidenced by the cited Non-Patent Literature. Applicant may contact the examiner as needed to discuss possible amendments or the office action. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Non-Patent Literature: “What are MOSFETs” provides some further information regarding basic MOSFET properties, such as known turn-on/off delay times where the effective resistance of the MOSFET is transitioning between high/low states. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID A SHIAO whose telephone number is (571)270-7265. The examiner can normally be reached Mon-Fri: 8:30AM-5:00PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Rexford Barnie can be reached at (571) 272-7492. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DAVID A SHIAO/Examiner, Art Unit 2836 /DANIEL CAVALLARI/Primary Examiner, Art Unit 2836
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Prosecution Timeline

Jan 27, 2025
Application Filed
Dec 31, 2025
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
75%
Grant Probability
99%
With Interview (+30.8%)
2y 7m
Median Time to Grant
Low
PTA Risk
Based on 474 resolved cases by this examiner. Grant probability derived from career allow rate.

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