DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or
nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1-2, 5 are rejected under 35 U.S.C. 103 as being unpatentable over [ Goyins et al. (US Pub No. 20040049726), hereinafter "Goyins", in view of Tiennot (US Pub No. 20090271536), hereinafter "Tiennot" ].
As per claim 1, Goyins significantly teaches a method for hardware integrity checks, the method comprising: receiving, by a processor of a system-on-a-chip (SoC), cyclic redundancy check (CRC) checksum of outgoing data of a first processing component (Multiplexer 114 initially outputs the message block from the inbound data stream 102 to FIFO 118. After outputting the message block, frame control logic 110 sends an append signal 116 to multiplexer 114, which causes multiplexer 114 to output the CRC 112 for the message block to FIFO 118. [Goyins PP 0023]);
receiving, by the processor of the SoC, CRC checksum of incoming data of a second processing component (A second CRC generator generates a second CRC value based on the data block after being output from the FIFO in an outbound data stream [Goyins PP 0005]);
determining, by the processor of the SoC, whether there is a mismatch of the CRC checksum of the outgoing data to the CRC checksum of the incoming data (Comparator 210 receives the extracted CRC 112 from CRC register 204, and receives the newly calculated CRC 214 from CRC generator 124 ... and outputs an error signal 212 if the two values 112 and 214 are not equal. [Goyins PP 0034]);
Goyins does not explicitly teach “and based on determining that there is the mismatch of the CRC checksum of the outgoing data to the CRC checksum of the incoming data, transmitting, by the processor of the SoC, an indication of an error.”
However, Tiennot, in an analogous art, teaches and based on determining that there is the mismatch of the CRC checksum of the outgoing data to the CRC checksum of the incoming data, transmitting, by the processor of the SoC, an indication of an error (When the checksum fails, the descriptor is corrupted, the channel is stopped and an error is reported to the operating system. [Tiennot PP 0018]).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the FIFO based error detection system disclosed by Goyins to incorporate Tiennot’s teachings of error reporting and channel stopping upon CRC mismatch, in order to improve system safety and allow a processor to take corrective action upon detection of a CRC mismatch (the channel is stopped and an error is reported to the operating system [Tiennot PP 0018]). Applying these teachings would have been a predictable variation for someone of ordinary skill in the art.
As per claim 2, Goyins does not explicitly teach “further comprising transmitting, based on the indication of the error, an indication to cease operation of one or more applications.”
However, Tiennot, in an analogous art, teaches further comprising transmitting, based on the indication of the error, an indication to cease operation of one or more applications (the channel is stopped [Tiennot PP 0018]).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the FIFO based error detection system disclosed by Goyins to incorporate Tiennot’s teachings of error reporting and channel stopping upon CRC mismatch, in order to improve system safety and allow a processor to take corrective action upon detection of a CRC mismatch (the channel is stopped and an error is reported to the operating system [Tiennot PP 0018]). Applying these teachings would have been a predictable variation for someone of ordinary skill in the art.
As per claim 5, Goyins does not explicitly teach “wherein the first processing component comprises a pixel direct memory access (DMA) component.”
However, Tiennot, in an analogous art, teaches wherein the first processing component comprises a pixel direct memory access (DMA) component (DMA controller 120 [Tiennot PP 0009] a pixel DMA is a specific type for image data).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the FIFO based error detection system disclosed by Goyins to incorporate Tiennot’s teachings of error reporting and channel stopping upon CRC mismatch, in order to improve system safety and allow a processor to take corrective action upon detection of a CRC mismatch (the channel is stopped and an error is reported to the operating system [Tiennot PP 0018]). Applying these teachings would have been a predictable variation for someone of ordinary skill in the art.
Claim(s) 3-4, 6, 8-9 are rejected under 35 U.S.C. 103 as being unpatentable over [ Goyins, in view of Tiennot, in further view of Seznayov et al. (US 11263077), hereinafter "Seznayov" ].
As per claim 3, Goyins in view of Tiennot do not explicitly teach “wherein the one or more applications comprise an autonomous driving application.”
However, Seznayov, in an analogous art, teaches wherein the one or more applications comprise an autonomous driving application (autonomous vehicles as dictated by the ISO 26262 standard [Seznayev PP 0018]).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the FIFO-based error detection system disclosed by Goyins and Tiennot to incorporate Seznayev’s teachings of applying CRC-based integrity checks in an automotive safety-critical SoC, in order to meet Automotive Safety Integrity Level (ASIL) requirements for autonomous driving applications (autonomous vehicles as dictated by the ISO 26262 standard [Seznayov PP 0367]). Applying these teachings would have been a predictable variation for someone of ordinary skill in the art.
As per claim 4, Goyins in view of Tiennot do not explicitly teach “sending an indication to use error checking and correction (ECC) for the first processing component.”
However, Seznayov, in an analogous art, teaches sending an indication to use error checking and correction (ECC) for the first processing component (memory error correction code (ECC) [Seznayev PP 0378]).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the FIFO-based error detection system disclosed by Goyins and Tiennot to incorporate Seznayev’s teachings of applying CRC-based integrity checks in an automotive safety-critical SoC, in order to meet Automotive Safety Integrity Level (ASIL) requirements for autonomous driving applications (autonomous vehicles as dictated by the ISO 26262 standard [Seznayov PP 0367]). Applying these teachings would have been a predictable variation for someone of ordinary skill in the art.
As per claim 6, Goyins in view of Tiennot do not explicitly teach “wherein the second processing component comprises an image signal processor (ISP) component.”
However, Seznayov, in an analogous art, teaches wherein the second processing component comprises an image signal processor (ISP) component (analysis of video streams … machine vision [Seznayev PP 0013] the processor performs image signal processing analogous to an ISP).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the FIFO-based error detection system disclosed by Goyins and Tiennot to incorporate Seznayev’s teachings of applying CRC-based integrity checks in an automotive safety-critical SoC, in order to meet Automotive Safety Integrity Level (ASIL) requirements for autonomous driving applications (autonomous vehicles as dictated by the ISO 26262 standard [Seznayov PP 0367]). Applying these teachings would have been a predictable variation for someone of ordinary skill in the art.
As per claim 8, Goyins in view of Tiennot do not explicitly teach “wherein the first processing component and the second processing component are components of a pixel processing data flow.”
However, Seznayov, in an analogous art, teaches wherein the first processing component and the second processing component are components of a pixel processing data flow (image recognition [Seznayev PP 0002], video streams [Seznayev PP 0013] the data flow described processes image pixels).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the FIFO-based error detection system disclosed by Goyins and Tiennot to incorporate Seznayev’s teachings of applying CRC-based integrity checks in an automotive safety-critical SoC, in order to meet Automotive Safety Integrity Level (ASIL) requirements for autonomous driving applications (autonomous vehicles as dictated by the ISO 26262 standard [Seznayov PP 0367]). Applying these teachings would have been a predictable variation for someone of ordinary skill in the art.
As per claim 9, Goyins in view of Tiennot do not explicitly teach “wherein the first processing component or the second processing component is integrated into an electric vehicle.”
However, Seznayov, in an analogous art, teaches wherein the first processing component or the second processing component is integrated into an electric vehicle (vehicle 940 comprises a plurality of sensors and processors … drive by wire controller 956. [Seznayev PP 0355]).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the FIFO-based error detection system disclosed by Goyins and Tiennot to incorporate Seznayev’s teachings of applying CRC-based integrity checks in an automotive safety-critical SoC, in order to meet Automotive Safety Integrity Level (ASIL) requirements for autonomous driving applications (autonomous vehicles as dictated by the ISO 26262 standard [Seznayov PP 0367]). Applying these teachings would have been a predictable variation for someone of ordinary skill in the art.
Claim(s) 7 is rejected under 35 U.S.C. 103 as being unpatentable over [ Goyins, in view of Tiennot, in further view of Mody et al. (US 10747692), hereinafter "Mody" ].
As per claim 7, Goyins in view of Tiennot do not explicitly teach “wherein the first processing component or the second processing component comprises a dewarp component.”
However, Mody, in an analogous art, teaches wherein the first processing component or the second processing component comprises a dewarp component (processing circuitry 502 may be configured to apply lens distortion correction to blocks of image data retrieved from the shared memory 214. ([Mody PP 0045]).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the FIFO-based error detection system disclosed by Goyins and Tiennot to incorporate Mody’s teachings of lens distortion correction applied by processing circuitry to blocks of image data, in order to perform geometric correction (dewarping) on image data flowing through the processing pipeline (processing circuitry 502 may be configured to apply lens distortion correction to blocks of image data retrieved from the shared memory 214 [Mody PP 0045]). Applying these teachings would have been a predictable variation for someone of ordinary skill in the art.
Claim(s) 10-11, 13-16, 18, 20 are rejected under 35 U.S.C. 103 as being unpatentable over [Goyins, in view of Seznayov].
As per claim 10, Goyins significantly teaches a processing pipeline that uses hardware integrity checks, the processing pipeline comprising: a first image processing component, which uses cyclic redundancy check (CRC) integrity checks for a data flow (first CRC generator for receiving an inbound data stream and generating a first CRC value [Goyins PP 0005]);
Goyins does not explicitly teach “and a second image processing component, which selectively uses CRC integrity checks or error checking and correction (ECC) for the data flow.”
However, Seznayov, in an analogous art, teaches and a second image processing component, which selectively uses CRC integrity checks or error checking and correction (ECC) for the data flow (calculating a first cyclic redundancy code (CRC) checksum on one or more blocks of the NN intermediate results … calculating second CRC checksums over each one or more blocks of NN intermediate results read from the memory, and verifying whether the second CRC checksums match the first CRC checksums ([Seznayev PP 0025], memory error correction code (ECC) [Seznayev PP 0378]).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the FIFO-based error detection system disclosed by Goyins to incorporate Seznayev’s teachings of applying CRC-based integrity checks in an automotive safety-critical SoC, in order to meet Automotive Safety Integrity Level (ASIL) requirements for autonomous driving applications (autonomous vehicles as dictated by the ISO 26262 standard [Seznayov PP 0351]). Applying these teachings would have been a predictable variation for someone of ordinary skill in the art.
As per claim 11, Goyins does not explicitly teach “wherein the first image processing component comprises a camera.”
However, Seznayov, in an analogous art, teaches wherein the first image processing component comprises a camera (forward looking camera 942. [Seznayev PP 0351]).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the FIFO-based error detection system disclosed by Goyins to incorporate Seznayev’s teachings of applying CRC-based integrity checks in an automotive safety-critical SoC, in order to meet Automotive Safety Integrity Level (ASIL) requirements for autonomous driving applications (autonomous vehicles as dictated by the ISO 26262 standard [Seznayov PP 0351]). Applying these teachings would have been a predictable variation for someone of ordinary skill in the art.
As per claim 13, Goyins does not explicitly teach “wherein the first image processing component comprises an image signal processor (ISP) component.”
However, Seznayov, in an analogous art, teaches wherein the first image processing component comprises an image signal processor (ISP) component (analysis of video streams … machine vision [Seznayev PP 0013]).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the FIFO-based error detection system disclosed by Goyins to incorporate Seznayev’s teachings of applying CRC-based integrity checks in an automotive safety-critical SoC, in order to meet Automotive Safety Integrity Level (ASIL) requirements for autonomous driving applications (autonomous vehicles as dictated by the ISO 26262 standard [Seznayov PP 0351]). Applying these teachings would have been a predictable variation for someone of ordinary skill in the art.
As per claim 14, Goyins does not explicitly teach “wherein the data flow is a pixel processing data flow.”
However, Seznayov, in an analogous art, teaches wherein the data flow is a pixel processing data flow (image recognition [Seznayev PP 0002], video streams [Seznayev PP 0013]).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the FIFO-based error detection system disclosed by Goyins to incorporate Seznayev’s teachings of applying CRC-based integrity checks in an automotive safety-critical SoC, in order to meet Automotive Safety Integrity Level (ASIL) requirements for autonomous driving applications (autonomous vehicles as dictated by the ISO 26262 standard [Seznayov PP 0351]). Applying these teachings would have been a predictable variation for someone of ordinary skill in the art.
As per claim 15, Goyins does not explicitly teach “wherein the CRC integrity checks or the ECC for the data flow is selectively used based on being within a threshold error level.”
However, Seznayov, in an analogous art, teaches wherein the CRC integrity checks or the ECC for the data flow is selectively used based on being within a threshold error level (the non-fatal error indicates an error occurred … the error, however, is deemed non-fatal and is passed to the higher level processing but operation of the NN processor continues. On the other hand, the fatal error indicates that the error that occurred … is severe enough that operation of the NN processor is now not reliable and upper layers should take appropriate action, e.g., immediately stop an autonomous vehicle [Seznayev PP 0525]).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the FIFO-based error detection system disclosed by Goyins to incorporate Seznayev’s teachings of applying CRC-based integrity checks in an automotive safety-critical SoC, in order to meet Automotive Safety Integrity Level (ASIL) requirements for autonomous driving applications (autonomous vehicles as dictated by the ISO 26262 standard [Seznayov PP 0351]). Applying these teachings would have been a predictable variation for someone of ordinary skill in the art.
As per claim 16, Goyins does not explicitly teach “wherein the processing pipeline is integrated into an electric vehicle.”
However, Seznayov, in an analogous art, teaches wherein the processing pipeline is integrated into an electric vehicle (vehicle 940 comprises a plurality of sensors and processors … drive by wire controller 956. [Seznayev PP 0355]).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the FIFO-based error detection system disclosed by Goyins to incorporate Seznayev’s teachings of applying CRC-based integrity checks in an automotive safety-critical SoC, in order to meet Automotive Safety Integrity Level (ASIL) requirements for autonomous driving applications (autonomous vehicles as dictated by the ISO 26262 standard [Seznayov PP 0351]). Applying these teachings would have been a predictable variation for someone of ordinary skill in the art.
As per claim 18, As per claim 13, Goyins significantly teaches a pixel processing pipeline that uses hardware integrity checks, the pixel processing pipeline comprising: a first processing component, which uses inline cyclic redundancy check (CRC) integrity checks for a data flow (first CRC generator for receiving an inbound data stream and generating a first CRC value [Goyins PP 0005]);
Goyins does not explicitly teach “and a second processing component, which uses inline CRC integrity checks for the data flow.”
However, Seznayov, in an analogous art, teaches and a second processing component, which uses inline CRC integrity checks for the data flow (calculating a first cyclic redundancy code (CRC) checksum on one or more blocks of the NN intermediate results, storing each the one or more blocks of NN intermediate results along with corresponding first CRC checksums in the memory, subsequently retrieving the one or more blocks of NN intermediate results with the corresponding first CRC checksums, calculating second CRC checksums over each one or more blocks of NN intermediate results read from the memory, and verifying whether the second CRC checksums match the first CRC checksums [Seznayov PP 0025]).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the FIFO-based error detection system disclosed by Goyins to incorporate Seznayev’s teachings of applying CRC-based integrity checks in an automotive safety-critical SoC, in order to meet Automotive Safety Integrity Level (ASIL) requirements for autonomous driving applications (autonomous vehicles as dictated by the ISO 26262 standard [Seznayov PP 0351]). Applying these teachings would have been a predictable variation for someone of ordinary skill in the art.
As per claim 20, Goyins does not explicitly teach “wherein the pixel processing pipeline is compliant with Automotive Safety Integrity Level (ASIL) B.”
However, Seznayov, in an analogous art, teaches wherein the pixel processing pipeline is compliant with Automotive Safety Integrity Level (ASIL) B (capable of achieving ASIL-B Ready [Seznayev PP 0367]).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the FIFO-based error detection system disclosed by Goyins to incorporate Seznayev’s teachings of applying CRC-based integrity checks in an automotive safety-critical SoC, in order to meet Automotive Safety Integrity Level (ASIL) requirements for autonomous driving applications (autonomous vehicles as dictated by the ISO 26262 standard [Seznayov PP 0351]). Applying these teachings would have been a predictable variation for someone of ordinary skill in the art.
Claim(s) 12, 19 are rejected under 35 U.S.C. 103 as being unpatentable over [ Goyins, in view of Seznayov, in further view of Tiennot].
As per claim 12, Goyins in view of Seznayov do not explicitly teach “wherein the first image processing component comprises a pixel direct memory access (DMA) component.”
However, Tiennot, in an analogous art, teaches wherein the first image processing component comprises a pixel direct memory access (DMA) component (DMA controller 120 [Tiennot PP 0009]).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the FIFO-based error detection system disclosed by Goyins and Seznayev to incorporate Tiennot’s teachings of error reporting and channel stopping upon CRC mismatch, in order to improve system safety and allow a processor to take corrective action upon detection of a CRC mismatch (the channel is stopped and an error is reported to the operating system [Tiennot PP 0018]). Applying these teachings would have been a predictable variation for someone of ordinary skill in the art.
As per claim 19, Goyins in view of Seznayov do not explicitly teach “wherein the first processing component comprises a camera, a pixel direct memory access (DMA) component, or an image signal processor (ISP) component.”
However, Tiennot, in an analogous art, teaches wherein the first processing component comprises a camera, a pixel direct memory access (DMA) component, or an image signal processor (ISP) component (DMA controller 120 [Tiennot PP 0009]).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the FIFO-based error detection system disclosed by Goyins and Seznayev to incorporate Tiennot’s teachings of error reporting and channel stopping upon CRC mismatch, in order to improve system safety and allow a processor to take corrective action upon detection of a CRC mismatch (the channel is stopped and an error is reported to the operating system [Tiennot PP 0018]). Applying these teachings would have been a predictable variation for someone of ordinary skill in the art.
Claim(s) 17 is rejected under 35 U.S.C. 103 as being unpatentable over [ Goyins, in view of Seznayov, in further view of Mody ].
As per claim 17, Goyins in view of Seznayov do not explicitly teach “wherein the first image processing component or the second image processing component comprises a dewarp component.”
However, Mody, in an analogous art, teaches wherein the first image processing component or the second image processing component comprises a dewarp component (processing circuitry 502 may be configured to apply lens distortion correction to blocks of image data retrieved from the shared memory 214. [Mody PP 0045]).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the FIFO-based error detection system disclosed by Goyins and Seznayov to incorporate Mody’s teachings of lens distortion correction applied by processing circuitry to blocks of image data, in order to perform geometric correction (dewarping) on image data flowing through the processing pipeline (processing circuitry 502 may be configured to apply lens distortion correction to blocks of image data retrieved from the shared memory 214 [Mody PP 0045]). Applying these teachings would have been a predictable variation for someone of ordinary skill in the art.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KAREEM FUAD ALHWAMDEH whose telephone number is (571)272-5501. The examiner can normally be reached Mon-Fri 7:30-5:00.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Albert Decady can be reached at (571) 272-3819. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/KAREEM FUAD ALHWAMDEH/Examiner, Art Unit 2112
/ALBERT DECADY/Supervisory Patent Examiner, Art Unit 2112