DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 01/28/2025. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: ORGANIC LIGHT-EMITTING DEVICE INCLUDING TRANSISTORS WITH HALO INJECTION LAYERS TO REDUCE LEAKAGE CURRENT IN LIGHT-EMITTING DEVICE
Claim Objections
Claims 1-3, 6, 9 and 16 are objected to because of the following informalities:
As per claim 1, the limitation “wherein the first transistor includes a halo injection layer in diffusion regions of the source and the drain, and the halo injection layer is opposite in polarity to the diffusion regions” should be “wherein the first transistor includes a halo injection layer in diffusion regions of the source and the drain of the first transistor, and the halo injection layer is opposite in polarity to the diffusion regions of the source and the drain of the first transistor”.
As per claim 2, the limitation “wherein the second transistor does not include a halo injection layer in diffusion regions of the source and the drain, and the halo injection layer is opposite in polarity to the diffusion regions” should be “wherein the second transistor does not include a halo injection layer in diffusion regions of the source and the drain of the second transistor, and the halo injection layer is opposite in polarity to the diffusion regions of the source and the drain of the second transistor”.
As per claim 3, the limitation “wherein the third transistor includes a halo injection layer in diffusion regions of a source and a drain, and the halo injection layer is opposite in polarity to the diffusion regions” should be “wherein the third transistor includes a halo injection layer in diffusion regions of a source and a drain of the third transistor, and the halo injection layer is opposite in polarity to the diffusion regions of the source and the drain of the third transistor”.
As per claim 6, the limitation “wherein the fourth transistor includes a halo injection layer in diffusion regions of a source and a drain, wherein the halo injection layer is opposite in polarity to the diffusion regions” should be “wherein the fourth transistor includes a halo injection layer in diffusion regions of a source and a drain of the fourth transistor, wherein the halo injection layer is opposite in polarity to the diffusion regions of the source and the drain of the fourth transistor”.
As per claim 9, the limitation “the terminal being either the drain or source of the second transistor” should be “the terminal being either the drain or the source of the second transistor”,
“wherein the fifth transistor includes a halo injection layer in diffusion regions of a source and a drain, and the halo injection layer is opposite in polarity to the diffusion regions” should be “wherein the fifth transistor includes a halo injection layer in diffusion regions of a source and a drain of the fifth transistor, and the halo injection layer is opposite in polarity to the diffusion regions of the source and the drain of the fifth transistor”.
As per claim 16, the limitation “an outside” should be “an exterior”.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 2-11 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 2 recites the limitation of “wherein the second transistor does not include a halo injection layer in diffusion regions of the source and the drain, and the halo injection layer is opposite in polarity to the diffusion regions”.
However, it is not known how the halo injection layer can be opposite in polarity to the diffusion regions since the second transistor does not include the halo injection layer in diffusion regions.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-16 are rejected under 35 U.S.C. 103 as being unpatentable over Tsuboi (US 20210242292) in view of Cheng (US 20160254352).
As per claim 1, Tsuboi discloses a light-emitting device (Fig. 1, #101; [0048]) comprising:
a light-emitting element (Fig. 2, #201; [0048]);
a first transistor (#203) and a second transistor (#202) disposed on a first surface of a silicon substrate ([0051]; [0070]-[0072]); and
a third transistor disposed in a peripheral circuit (#104) configured to supply a video signal to the first transistor ([0048]-[0050]; where a third transistor is inherently present),
wherein one of a source or a drain of the first transistor (#203) is connected to a gate electrode of the second transistor (#202; [0054]),
wherein one of a source or a drain of the second transistor (#202) is connected to the light-emitting element (#201; [0053]).
However, Tsuboi does not teach the first transistor includes a halo injection layer in diffusion regions of the source and the drain, and the halo injection layer is opposite in polarity to the diffusion regions.
Cheng teaches the transistor (Figs. 6-7, #700) includes a halo injection layer (#610) in diffusion regions of the source (#620a/710a) and the drain (#620b/710b), and the halo injection layer (#610) is opposite in polarity to the diffusion regions ([0029]-[0032]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have included the halo injection layer disclosed by Cheng to the first transistor of Tsuboi so as to provide an in-situ dopant with an opposite polarity in the halo layer may provide an energy barrier to the resulting semiconductor device and reduce leakage current in the device (Cheng: [0032]).
As per claim 2, Tsuboi in view of Cheng discloses the light-emitting device according to claim 1, wherein the second transistor (Tsuboi: #202) does not include a halo injection layer in diffusion regions of the source and the drain, and the halo injection layer is opposite in polarity to the diffusion regions (Cheng: [0032]).
As per claim 3, Tsuboi in view of Cheng discloses the light-emitting device according to claim 2, wherein the third transistor (Tsuboi: [0048]-[0050]; where a third transistor is inherently present) includes a halo injection layer (Cheng: #610) in diffusion regions of a source and a drain, and the halo injection layer is opposite in polarity to the diffusion regions (Cheng: [0032]).
As per claim 4, Tsuboi in view of Cheng discloses the light-emitting device according to claim 3, wherein a peak impurity concentration (Cheng: i.e., peak impurity concentration of 1×1019 cm−3) in the halo injection layer (Cheng: #610) of the first transistor (Tsuboi: #203) is different from a peak impurity concentration (Cheng: i.e., peak impurity concentration of 1×1021 cm−3) in the halo injection layer (Cheng: #610) of the third transistor (Tsuboi: [0048]-[0050]) (Cheng: [0033]).
As per claim 5, Tsuboi in view of Cheng discloses the light-emitting device according to claim 4, wherein the peak impurity concentration (Cheng: i.e., peak impurity concentration of 1×1021 cm−3) in the halo injection layer (Cheng: #610) of the first transistor (Tsuboi: #203) is higher than the peak impurity concentration (Cheng: i.e., peak impurity concentration of 1×1019 cm−3) in the halo injection layer (Cheng: #610) of the third transistor (Tsuboi: [0048]-[0050]) (Cheng: [0033]).
As per claim 6, Tsuboi in view of Cheng discloses the light-emitting device according to claim 3, further comprising a fourth transistor (Tsuboi: Fig. 15, #1501) disposed between the second transistor (Tsuboi: #202) and a power source (Tsuboi: #205) configured to supply electric current to the light-emitting element (Tsuboi: #201; [0081]; [0083]-[0084]),
wherein the fourth transistor (Tsuboi: #1501) includes a halo injection layer (Cheng: #610) in diffusion regions of a source and a drain (Cheng: [0032]),
wherein the halo injection layer is opposite in polarity to the diffusion regions (Cheng: [0032]),
wherein a peak impurity concentration (Cheng: i.e., peak impurity concentration of 1×1021 cm−3) in the halo injection layer (Cheng: #610) of the third transistor (Tsuboi: [0048]-[0050]) is different from a peak impurity concentration (Cheng: i.e., peak impurity concentration of 1×1019 cm−3) in the halo injection layer (Cheng: #610) of the fourth transistor (Tsuboi: #1501) (Cheng: [0033]).
As per claim 7, Tsuboi in view of Cheng discloses the light-emitting device according to claim 6, wherein the peak impurity concentration (Cheng: i.e., peak impurity concentration of 1×1021 cm−3) in the halo injection layer (Cheng: #610) of the fourth transistor (Tsuboi: #1501) is higher than the peak impurity concentration (Cheng: i.e., peak impurity concentration of 1×1019 cm−3) in the halo injection layer (Cheng: #610) of the third transistor (Tsuboi: [0048]-[0050]) (Cheng: [0033]).
As per claim 8, Tsuboi in view of Cheng discloses the light-emitting device according to claim 6, wherein the peak impurity concentration (Cheng: i.e., peak impurity concentration of 1×1021 cm−3) in the halo injection layer (Cheng: #610) of the first transistor (Tsuboi: #203) is the same as the peak impurity concentration (Cheng: i.e., peak impurity concentration of 1×1021 cm−3) in the halo injection layer (Cheng: #610) of the fourth transistor (Tsuboi: #1501) (Cheng: [0033]).
As per claim 9, Tsuboi in view of Cheng discloses the light-emitting device according to claim 3, further comprising a fifth transistor (Tsuboi: Fig. 20, #2001) disposed between a terminal of the second transistor (Tsuboi: #202), the terminal being either the drain or source of the second transistor (Tsuboi: #202), which is connected to the light-emitting element (Tsuboi: #201), and a terminal (Tsuboi: #206) lower in potential than a power source (Tsuboi: #205) configured to supply electric current to the light-emitting element (Tsuboi: #201; [0105]),
wherein the fifth transistor (Tsuboi: #2001) includes a halo injection layer (Cheng: #610) in diffusion regions of a source and a drain, and the halo injection layer is opposite in polarity to the diffusion regions (Cheng: [0032]), and
wherein a peak impurity concentration (Cheng: i.e., peak impurity concentration of 1×1021 cm−3) in the halo injection layer (Cheng: #610) of the third transistor (Tsuboi: [0048]-[0050]) is different from a peak impurity concentration (Cheng: i.e., peak impurity concentration of 1×1019 cm−3) in the halo injection layer (Cheng: #610) of the fifth transistor (Tsuboi: #2001) (Cheng: [0033]).
As per claim 10, Tsuboi in view of Cheng discloses the light-emitting device according to claim 9, wherein the peak impurity concentration (Cheng: i.e., peak impurity concentration of 1×1021 cm−3) in the halo injection layer (Cheng: #610) of the fifth transistor (Tsuboi: #2001) is higher than the peak impurity concentration (Cheng: i.e., peak impurity concentration of 1×1019 cm−3) in the halo injection layer (Cheng: #610) of the third transistor (Tsuboi: [0048]-[0050]) (Cheng: [0033]).
As per claim 11, Tsuboi in view of Cheng discloses the light-emitting device according to claim 9, wherein a peak impurity concentration (Cheng: i.e., peak impurity concentration of 1×1021 cm−3) in the halo injection layer (Cheng: #610) of the first transistor (Tsuboi: #203) is the same as the peak impurity concentration (Cheng: i.e., peak impurity concentration of 1×1021 cm−3) in the halo injection layer (Cheng: #610) of the fifth transistor (Tsuboi: #2001) (Cheng: [0033]).
As per claims 12 and 13, Tsuboi in view of Cheng discloses the light-emitting device according to claim 1 except for the peripheral circuit is disposed on the first surface of the silicon substrate, wherein the peripheral circuit is disposed on a second silicon substrate different from the silicon substrate. Official Notice is taken that it would have been an obvious to one of ordinary skill to provide the peripheral circuit is disposed on the first surface of the silicon substrate, wherein the peripheral circuit is disposed on a second silicon substrate different from the silicon substrate since it has been held that mere rearrangement of parts of an invention in a way that does not modify the operation of the device is not a patentable improvement. In re Japikse, 181 F.2d 1019, 86 USPQ 70 (CCPA 1950) and In re Kuhle, 526 F.2d 553, 188 USPQ 7 (CCPA 1975).
As per claim 14, Tsuboi in view of Cheng discloses the light emitting device according to claim 1, further comprising an image control unit configured to transmit an image control signal to the peripheral circuit (Tsuboi: [0057]-[0058]),
wherein the light-emitting element is configured to emit light in response to the image control signal (Tsuboi: [0057]-[0058]).
As per claim 15, Tsuboi in view of Cheng discloses a photoelectric conversion device, comprising:
an optical unit having a plurality of lenses (Tsuboi: [0166]-[0167]; [0169]);
an imaging element configured to receive light that has passed through the optical unit (Tsuboi: [0166]); and
a display unit configured to display an image captured by the imaging element, wherein the display unit includes the light emitting device according to claim 14 (Tsuboi: Fig. 33A; [0166]-[0167]).
As per claim 16, Tsuboi in view of Cheng discloses electronic equipment (Tsuboi: Fig. 33B; [0170]), comprising:
the light emitting device according to claim 14 (Tsuboi: [0170]);
a housing in which the light emitting device is disposed (Tsuboi: [0170]); and
a communication unit disposed in the housing and configured to communicate with an outside (Tsuboi: [0170]).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Nelson Lam whose telephone number is (571)272-8044. The examiner can normally be reached 1pm-9pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ke Xiao can be reached at 571 272-7776. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Nelson Lam/Examiner, Art Unit 2627
/KE XIAO/Supervisory Patent Examiner, Art Unit 2627
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